gcc-athlon-move-costs.patch

   1 (From http://gcc.gnu.org/ml/gcc-patches/2002-10/msg00197.html)
   2
   3 The attached patch fixes the move costs according to the updated AMD
   4 documentation.  It also fixes several PRS crashing on reloading MMX to
   5 SSE as the previous costs made this very fast and thus made SSE to
   6 appear in preffered class.
   7 I am installing the patch to mainline as obvious, OK for the 3.2 branch too?
   8
   9 Honza
  10
  11         * i386.c (athlon_cost): Fix the move costs.
  12
  13 Index: i386.c
  14 ===================================================================
  15 RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.c,v
  16 retrieving revision 1.462
  17 diff -c -3 -p -r1.462 i386.c
  18 *** gcc/gcc/config/i386/i386.c  27 Sep 2002 13:30:08 -0000      1.462
  19 --- gcc/gcc/config/i386/i386.c  2 Oct 2002 15:00:24 -0000
  20 *************** struct processor_costs athlon_cost = {
  21 *** 285,309 ****
  22     8,                                  /* "large" insn */
  23     9,                                  /* MOVE_RATIO */
  24     4,                                  /* cost for loading QImode using movzbl */
  25 !   {4, 5, 4},                          /* cost of loading integer registers
  26                                            in QImode, HImode and SImode.
  27                                            Relative to reg-reg move (2).  */
  28 !   {2, 3, 2},                          /* cost of storing integer registers */
  29     4,                                  /* cost of reg,reg fld/fst */
  30 !   {6, 6, 20},                         /* cost of loading fp registers
  31                                            in SFmode, DFmode and XFmode */
  32 !   {4, 4, 16},                         /* cost of loading integer registers */
  33     2,                                  /* cost of moving MMX register */
  34 !   {2, 2},                             /* cost of loading MMX registers
  35                                            in SImode and DImode */
  36 !   {2, 2},                             /* cost of storing MMX registers
  37                                            in SImode and DImode */
  38     2,                                  /* cost of moving SSE register */
  39 !   {2, 2, 8},                          /* cost of loading SSE registers
  40                                            in SImode, DImode and TImode */
  41 !   {2, 2, 8},                          /* cost of storing SSE registers
  42                                            in SImode, DImode and TImode */
  43 !   6,                                  /* MMX or SSE register to integer */
  44     64,                                 /* size of prefetch block */
  45     6,                                  /* number of parallel prefetches */
  46   };
  47 --- 285,309 ----
  48     8,                                  /* "large" insn */
  49     9,                                  /* MOVE_RATIO */
  50     4,                                  /* cost for loading QImode using movzbl */
  51 !   {3, 4, 3},                          /* cost of loading integer registers
  52                                            in QImode, HImode and SImode.
  53                                            Relative to reg-reg move (2).  */
  54 !   {3, 4, 3},                          /* cost of storing integer registers */
  55     4,                                  /* cost of reg,reg fld/fst */
  56 !   {4, 4, 12},                         /* cost of loading fp registers
  57                                            in SFmode, DFmode and XFmode */
  58 !   {6, 6, 8},                          /* cost of loading integer registers */
  59     2,                                  /* cost of moving MMX register */
  60 !   {4, 4},                             /* cost of loading MMX registers
  61                                            in SImode and DImode */
  62 !   {4, 4},                             /* cost of storing MMX registers
  63                                            in SImode and DImode */
  64     2,                                  /* cost of moving SSE register */
  65 !   {4, 4, 6},                          /* cost of loading SSE registers
  66                                            in SImode, DImode and TImode */
  67 !   {4, 4, 5},                          /* cost of storing SSE registers
  68                                            in SImode, DImode and TImode */
  69 !   5,                                  /* MMX or SSE register to integer */
  70     64,                                 /* size of prefetch block */
  71     6,                                  /* number of parallel prefetches */
  72   };
  73