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Commit | Line | Data |
---|---|---|
b628c20b JB |
1 | --- xavs2-1.3/source/common/quant.c.orig 2018-12-20 04:20:35.000000000 +0100 |
2 | +++ xavs2-1.3/source/common/quant.c 2019-07-29 20:07:07.159480992 +0200 | |
3 | @@ -220,7 +220,7 @@ | |
4 | dctf->add_sign = add_sign_c;\r | |
5 | \r | |
6 | /* init asm function handles */\r | |
7 | -#if HAVE_MMX\r | |
8 | +#if HAVE_MMX && ARCH_X86_64 /* only 64-bit asm for now */\r | |
9 | if (cpuid & XAVS2_CPU_SSE4) {\r | |
10 | dctf->quant = FPFX(quant_sse4);\r | |
11 | dctf->dequant = FPFX(dequant_sse4);\r | |
12 | --- xavs2-1.3/source/common/filter_alf.c.orig 2018-12-20 04:20:35.000000000 +0100 | |
13 | +++ xavs2-1.3/source/common/filter_alf.c 2019-07-29 20:08:33.552346295 +0200 | |
14 | @@ -236,7 +236,7 @@ | |
15 | /* set function handles */\r | |
16 | pf->alf_flt[0] = alf_filter_block1;\r | |
17 | pf->alf_flt[1] = alf_filter_block2;\r | |
18 | -#if HAVE_MMX\r | |
19 | +#if HAVE_MMX && ARCH_X86_64 /* only 64-bit asm for now */\r | |
20 | if (cpuid & XAVS2_CPU_SSE42) {\r | |
21 | pf->alf_flt[0] = alf_flt_one_block_sse128;\r | |
22 | }\r | |
23 | --- xavs2-1.3/source/common/filter_deblock.c.orig 2018-12-20 04:20:35.000000000 +0100 | |
24 | +++ xavs2-1.3/source/common/filter_deblock.c 2019-07-29 20:09:12.135470605 +0200 | |
25 | @@ -526,7 +526,7 @@ | |
26 | lf->deblock_chroma[0] = deblock_edge_ver_c;\r | |
27 | lf->deblock_chroma[1] = deblock_edge_hor_c;\r | |
28 | \r | |
29 | -#if HAVE_MMX\r | |
30 | +#if HAVE_MMX && ARCH_X86_64 /* only 64-bit asm for now */\r | |
31 | if (cpuid & XAVS2_CPU_SSE42) {\r | |
32 | lf->deblock_luma[0] = deblock_edge_ver_sse128;\r | |
33 | lf->deblock_luma[1] = deblock_edge_hor_sse128;\r | |
34 | --- xavs2-1.3/source/common/filter_sao.c.orig 2018-12-20 04:20:35.000000000 +0100 | |
35 | +++ xavs2-1.3/source/common/filter_sao.c 2019-07-29 20:10:02.731863168 +0200 | |
36 | @@ -234,7 +234,7 @@ | |
37 | void xavs2_sao_init(uint32_t cpuid, intrinsic_func_t *pf)\r | |
38 | {\r | |
39 | pf->sao_block = sao_block_c;\r | |
40 | -#if HAVE_MMX\r | |
41 | +#if HAVE_MMX && ARCH_X86_64 /* only 64-bit asm for now */\r | |
42 | if (cpuid & XAVS2_CPU_SSE4) {\r | |
43 | pf->sao_block = SAO_on_block_sse128;\r | |
44 | }\r | |
45 | --- xavs2-1.3/source/common/cg_scan.c.orig 2018-12-20 04:20:35.000000000 +0100 | |
46 | +++ xavs2-1.3/source/common/cg_scan.c 2019-07-29 20:12:49.534292855 +0200 | |
47 | @@ -977,7 +977,7 @@ | |
48 | pf->transpose_coeff_4x4[0] = coeff_scan4_xy_c;\r | |
49 | pf->transpose_coeff_4x4[1] = coeff_scan4_yx_c;\r | |
50 | \r | |
51 | -#if HAVE_MMX\r | |
52 | +#if HAVE_MMX && ARCH_X86_64 /* only 64-bit asm for now */\r | |
53 | /* SSE 128bit */\r | |
54 | if (cpuid & XAVS2_CPU_SSE42) {\r | |
55 | pf->transpose_coeff_scan[LUMA_4x4][0] = coeff_scan_4x4_xy_sse128;\r | |
78efc24c JB |
56 | --- xavs2-1.4/source/common/intra.c.orig 2023-04-09 08:05:35.401489788 +0200 |
57 | +++ xavs2-1.4/source/common/intra.c 2023-04-09 08:06:31.667851633 +0200 | |
58 | @@ -1926,7 +1926,7 @@ void xavs2_intra_pred_init(uint32_t cpui | |
b628c20b JB |
59 | ipred[INTRA_ANG_Y_32] = intra_pred_ang_y_32_c;\r |
60 | \r | |
78efc24c | 61 |