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Commit | Line | Data |
---|---|---|
f3dfbd7c | 1 | Patch carried over from the prior iasl package and updated. This allows |
77760c90 JB |
2 | |
3 | From: Al Stone <ahs3@redhat.com> | |
4 | ||
f3dfbd7c ER |
5 | for builds on systems requiring aligned memory access. Please see |
6 | http://lists.acpica.org/pipermail/devel/2010-July/000159.html. Resolves | |
7 | BZ#865013 and BZ#856856. | |
8 | -- | |
9 | ||
10 | Add more platforms to the list of the ones requiring aligned memory access. | |
11 | Also fix callsites where wrong assumptions where made in terms of aligment. | |
12 | ||
13 | Signed-off-by: Mattia Dongili <malattia@linux.it> | |
14 | Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> | |
15 | --- | |
77760c90 JB |
16 | source/compiler/asltree.c | 15 ++++++++++----- |
17 | source/components/executer/exoparg2.c | 12 +++++++++--- | |
18 | source/include/actypes.h | 26 +++++++++++++------------- | |
19 | 3 files changed, 32 insertions(+), 21 deletions(-) | |
f3dfbd7c | 20 | |
77760c90 JB |
21 | Index: acpica-unix2-20170224/source/compiler/asltree.c |
22 | =================================================================== | |
23 | --- acpica-unix2-20170224.orig/source/compiler/asltree.c | |
24 | +++ acpica-unix2-20170224/source/compiler/asltree.c | |
25 | @@ -998,28 +998,31 @@ TrCreateValuedLeafNode ( | |
26 | "Op %s Value %8.8X%8.8X ", | |
f3dfbd7c ER |
27 | Op->Asl.LineNumber, Op->Asl.Column, Op, UtGetOpName(ParseOpcode), |
28 | ACPI_FORMAT_UINT64 (Value)); | |
29 | - Op->Asl.Value.Integer = Value; | |
30 | ||
31 | switch (ParseOpcode) | |
32 | { | |
33 | case PARSEOP_STRING_LITERAL: | |
77760c90 | 34 | |
f3dfbd7c ER |
35 | - DbgPrint (ASL_PARSE_OUTPUT, "STRING->%s", Value); |
36 | + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value; | |
37 | + DbgPrint (ASL_PARSE_OUTPUT, "STRING->%s", Op->Asl.Value.String); | |
38 | break; | |
39 | ||
40 | case PARSEOP_NAMESEG: | |
77760c90 | 41 | |
f3dfbd7c ER |
42 | - DbgPrint (ASL_PARSE_OUTPUT, "NAMESEG->%s", Value); |
43 | + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value; | |
44 | + DbgPrint (ASL_PARSE_OUTPUT, "NAMESEG->%s", Op->Asl.Value.String); | |
45 | break; | |
46 | ||
47 | case PARSEOP_NAMESTRING: | |
77760c90 | 48 | |
f3dfbd7c ER |
49 | - DbgPrint (ASL_PARSE_OUTPUT, "NAMESTRING->%s", Value); |
50 | + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value; | |
51 | + DbgPrint (ASL_PARSE_OUTPUT, "NAMESTRING->%s", Op->Asl.Value.String); | |
52 | break; | |
53 | ||
54 | case PARSEOP_EISAID: | |
77760c90 | 55 | |
f3dfbd7c ER |
56 | - DbgPrint (ASL_PARSE_OUTPUT, "EISAID->%s", Value); |
57 | + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value; | |
58 | + DbgPrint (ASL_PARSE_OUTPUT, "EISAID->%s", Op->Asl.Value.String); | |
59 | break; | |
60 | ||
61 | case PARSEOP_METHOD: | |
77760c90 | 62 | @@ -1029,12 +1032,14 @@ TrCreateValuedLeafNode ( |
f3dfbd7c ER |
63 | |
64 | case PARSEOP_INTEGER: | |
77760c90 | 65 | |
f3dfbd7c | 66 | + Op->Asl.Value.Integer = Value; |
77760c90 JB |
67 | DbgPrint (ASL_PARSE_OUTPUT, "INTEGER->%8.8X%8.8X", |
68 | ACPI_FORMAT_UINT64 (Value)); | |
f3dfbd7c ER |
69 | break; |
70 | ||
71 | default: | |
77760c90 | 72 | |
f3dfbd7c ER |
73 | + Op->Asl.Value.Integer = Value; |
74 | break; | |
75 | } | |
76 | ||
77760c90 JB |
77 | Index: acpica-unix2-20170224/source/components/executer/exoparg2.c |
78 | =================================================================== | |
79 | --- acpica-unix2-20170224.orig/source/components/executer/exoparg2.c | |
80 | +++ acpica-unix2-20170224/source/components/executer/exoparg2.c | |
81 | @@ -172,6 +172,8 @@ AcpiExOpcode_2A_2T_1R ( | |
f3dfbd7c ER |
82 | ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0]; |
83 | ACPI_OPERAND_OBJECT *ReturnDesc1 = NULL; | |
84 | ACPI_OPERAND_OBJECT *ReturnDesc2 = NULL; | |
85 | + UINT64 ReturnValue1 = 0; | |
86 | + UINT64 ReturnValue2 = 0; | |
87 | ACPI_STATUS Status; | |
88 | ||
89 | ||
77760c90 JB |
90 | @@ -206,8 +208,10 @@ AcpiExOpcode_2A_2T_1R ( |
91 | Status = AcpiUtDivide ( | |
92 | Operand[0]->Integer.Value, | |
93 | Operand[1]->Integer.Value, | |
94 | - &ReturnDesc1->Integer.Value, | |
95 | - &ReturnDesc2->Integer.Value); | |
96 | + &ReturnValue1, &ReturnValue2); | |
f3dfbd7c ER |
97 | + ReturnDesc1->Integer.Value = ReturnValue1; |
98 | + ReturnDesc2->Integer.Value = ReturnValue2; | |
99 | + | |
100 | if (ACPI_FAILURE (Status)) | |
101 | { | |
102 | goto Cleanup; | |
77760c90 | 103 | @@ -282,6 +286,7 @@ AcpiExOpcode_2A_1T_1R ( |
f3dfbd7c ER |
104 | ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0]; |
105 | ACPI_OPERAND_OBJECT *ReturnDesc = NULL; | |
106 | UINT64 Index; | |
107 | + UINT64 ReturnValue = 0; | |
108 | ACPI_STATUS Status = AE_OK; | |
109 | ACPI_SIZE Length = 0; | |
110 | ||
77760c90 JB |
111 | @@ -327,7 +332,8 @@ AcpiExOpcode_2A_1T_1R ( |
112 | Operand[0]->Integer.Value, | |
113 | Operand[1]->Integer.Value, | |
114 | NULL, | |
115 | - &ReturnDesc->Integer.Value); | |
116 | + &ReturnValue); | |
f3dfbd7c ER |
117 | + ReturnDesc->Integer.Value = ReturnValue; |
118 | break; | |
119 | ||
77760c90 JB |
120 | case AML_CONCATENATE_OP: /* Concatenate (Data1, Data2, Result) */ |
121 | Index: acpica-unix2-20170224/source/include/actypes.h | |
122 | =================================================================== | |
123 | --- acpica-unix2-20170224.orig/source/include/actypes.h | |
124 | +++ acpica-unix2-20170224/source/include/actypes.h | |
125 | @@ -143,6 +143,19 @@ typedef COMPILER_DEPENDENT_INT64 | |
f3dfbd7c ER |
126 | */ |
127 | #define ACPI_THREAD_ID UINT64 | |
128 | ||
129 | +/* | |
130 | + * In the case of the Itanium Processor Family (IPF), the hardware does not | |
131 | + * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag | |
132 | + * to indicate that special precautions must be taken to avoid alignment faults. | |
133 | + * (IA64 or ia64 is currently used by existing compilers to indicate IPF.) | |
134 | + * | |
135 | + * Note: EM64T and other X86-64 processors support misaligned transfers, | |
136 | + * so there is no need to define this flag. | |
137 | + */ | |
138 | +#if defined (__IA64__) || defined (__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__hppa__) || defined(__arm__) | |
139 | +#define ACPI_MISALIGNMENT_NOT_SUPPORTED | |
140 | +#endif | |
141 | + | |
142 | ||
143 | /******************************************************************************* | |
144 | * | |
77760c90 | 145 | @@ -169,19 +182,6 @@ typedef UINT64 |
f3dfbd7c ER |
146 | #define ACPI_SIZE_MAX ACPI_UINT64_MAX |
147 | #define ACPI_USE_NATIVE_DIVIDE /* Has native 64-bit integer support */ | |
148 | ||
149 | -/* | |
150 | - * In the case of the Itanium Processor Family (IPF), the hardware does not | |
151 | - * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag | |
152 | - * to indicate that special precautions must be taken to avoid alignment faults. | |
153 | - * (IA64 or ia64 is currently used by existing compilers to indicate IPF.) | |
154 | - * | |
155 | - * Note: EM64T and other X86-64 processors support misaligned transfers, | |
156 | - * so there is no need to define this flag. | |
157 | - */ | |
158 | -#if defined (__IA64__) || defined (__ia64__) | |
159 | -#define ACPI_MISALIGNMENT_NOT_SUPPORTED | |
160 | -#endif | |
161 | - | |
162 | ||
163 | /******************************************************************************* | |
164 | * |