- more ppc assembler fixes

Changed files:
    kernel-ppc_asm_and_initializers-from-rc3-bk9.patch -> 1.2

diff --git a/kernel-ppc_asm_and_initializers-from-rc3-bk9.patch b/kernel-ppc_asm_and_initializers-from-rc3-bk9.patch
index cdc818a6cef1bead90d24998bbd2a159642c99ee..89176f5914d32f563fa777248db84437c6ff020e 100644 (file)
--- a/kernel-ppc_asm_and_initializers-from-rc3-bk9.patch
+++ b/kernel-ppc_asm_and_initializers-from-rc3-bk9.patch
@@ -275,6 +275,32 @@ diff -Nru a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
        beq     1f
        mtspr   DBAT3L,r8
        mtspr   DBAT3U,r11
+diff -Nru a/arch/ppc/kernel/head_e500.S b/arch/ppc/kernel/head_e500.S
+--- a/arch/ppc/kernel/head_e500.S      2004-10-10 21:13:08.000000000 +0200
++++ b/arch/ppc/kernel/head_e500.S      2004-10-10 21:13:08.000000000 +0200
+@@ -1057,7 +1057,7 @@
+ #ifndef CONFIG_SMP
+       lis     r3,last_task_used_spe@ha
+       lwz     r4,last_task_used_spe@l(r3)
+-      cmpi    0,r4,0
++      cmpwi   0,r4,0
+       beq     1f
+       addi    r4,r4,THREAD    /* want THREAD of last_task_used_spe */
+       SAVE_32EVR(0,r10,r4)
+@@ -1167,11 +1167,11 @@
+       SYNC
+       mtmsr   r5                      /* enable use of SPE now */
+       isync
+-      cmpi    0,r3,0
++      cmpwi   0,r3,0
+       beqlr-                          /* if no previous owner, done */
+       addi    r3,r3,THREAD            /* want THREAD of task */
+       lwz     r5,PT_REGS(r3)
+-      cmpi    0,r5,0
++      cmpwi   0,r5,0
+       SAVE_32EVR(0, r4, r3)
+       evxor   evr6, evr6, evr6        /* clear out evr6 */
+       evmwumiaa evr6, evr6, evr6      /* evr6 <- ACC = 0 * 0 + ACC */
 diff -Nru a/arch/ppc/kernel/idle_6xx.S b/arch/ppc/kernel/idle_6xx.S
 --- a/arch/ppc/kernel/idle_6xx.S       2003-09-22 17:12:45 -07:00
 +++ b/arch/ppc/kernel/idle_6xx.S       2004-10-07 09:47:04 -07:00
@@ -362,6 +388,33 @@ diff -Nru a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
        beqlr                   /* for 601, do nothing */
        /* 603/604 processor - use invalidate-all bit in HID0 */
        mfspr   r3,HID0
+@@ -619,7 +619,7 @@
+ _GLOBAL(flush_icache_range)
+       mfspr   r5,PVR
+       rlwinm  r5,r5,16,16,31
+-      cmpi    0,r5,1
++      cmpwi   0,r5,1
+       beqlr                           /* for 601, do nothing */
+       li      r5,L1_CACHE_LINE_SIZE-1
+       andc    r3,r3,r5
+@@ -737,7 +737,7 @@
+ _GLOBAL(__flush_dcache_icache)
+       mfspr   r5,PVR
+       rlwinm  r5,r5,16,16,31
+-      cmpi    0,r5,1
++      cmpwi   0,r5,1
+       beqlr                                   /* for 601, do nothing */
+       rlwinm  r3,r3,0,0,19                    /* Get page base address */
+       li      r4,4096/L1_CACHE_LINE_SIZE      /* Number of lines in a page */
+@@ -766,7 +766,7 @@
+ _GLOBAL(__flush_dcache_icache_phys)
+       mfspr   r5,PVR
+       rlwinm  r5,r5,16,16,31
+-      cmpi    0,r5,1
++      cmpwi   0,r5,1
+       beqlr                                   /* for 601, do nothing */
+       mfmsr   r10
+       rlwinm  r0,r10,0,28,26                  /* clear DR */
 @@ -1141,7 +1141,7 @@
        li      r4,0            /* new sp (unused) */
        li      r0,__NR_clone