--- /dev/null
+Index: qemu-snapshot-2007-02-09_05/hw/piix_pci.c
+===================================================================
+--- qemu-snapshot-2007-02-09_05.orig/hw/piix_pci.c
++++ qemu-snapshot-2007-02-09_05/hw/piix_pci.c
+@@ -155,7 +155,7 @@ static int i440fx_load(QEMUFile* f, void
+ return 0;
+ }
+
+-PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic)
++PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic, int ram_size)
+ {
+ PCIBus *b;
+ PCIDevice *d;
+@@ -186,6 +186,10 @@ PCIBus *i440fx_init(PCIDevice **pi440fx_
+ d->config[0x0a] = 0x00; // class_sub = host2pci
+ d->config[0x0b] = 0x06; // class_base = PCI_bridge
+ d->config[0x0e] = 0x00; // header_type
++ ram_size = ram_size / 8 / 1024 / 1024;
++ if (ram_size > 255)
++ ram_size = 255;
++ d->config[0x57] = ram_size;
+
+ d->config[0x72] = 0x02; /* SMRAM */
+
+Index: qemu-snapshot-2007-02-09_05/hw/pc.c
+===================================================================
+--- qemu-snapshot-2007-02-09_05.orig/hw/pc.c
++++ qemu-snapshot-2007-02-09_05/hw/pc.c
+@@ -623,7 +623,7 @@ static void pc_init1(int ram_size, int v
+ }
+
+ if (pci_enabled) {
+- pci_bus = i440fx_init(&i440fx_state, i8259);
++ pci_bus = i440fx_init(&i440fx_state, i8259, ram_size);
+ piix3_devfn = piix3_init(pci_bus, -1);
+ } else {
+ pci_bus = NULL;
+Index: qemu-snapshot-2007-02-09_05/hw/pc.h
+===================================================================
+--- qemu-snapshot-2007-02-09_05.orig/hw/pc.h
++++ qemu-snapshot-2007-02-09_05/hw/pc.h
+@@ -841,7 +841,7 @@ PCIBus *pci_apb_init(target_ulong specia
+ PCIBus *pci_vpb_init(void *pic, int irq, int realview);
+
+ /* piix_pci.c */
+-PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic);
++PCIBus *i440fx_init(PCIDevice **pi440fx_state, qemu_irq *pic, int ram_size);
+ void i440fx_set_smm(PCIDevice *d, int val);
+ int piix3_init(PCIBus *bus, int devfn);
+ void i440fx_init_memory_mappings(PCIDevice *d);