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- fix unresolved symbols in ipv6 netfilter
[packages/kernel.git] / linux-2.4.21-ac4-ide.patch
1 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/Config.in linux.21-ac4/drivers/ide/Config.in
2 --- linux.vanilla/drivers/ide/Config.in 2003-06-14 00:11:30.000000000 +0100
3 +++ linux.21-ac4/drivers/ide/Config.in  2003-06-03 23:15:18.000000000 +0100
4 @@ -27,8 +27,6 @@
5  
6     comment 'IDE chipset support/bugfixes'
7     if [ "$CONFIG_BLK_DEV_IDE" != "n" ]; then
8 -      dep_bool '  CMD640 chipset bugfix/support' CONFIG_BLK_DEV_CMD640 $CONFIG_X86
9 -      dep_bool '    CMD640 enhanced support' CONFIG_BLK_DEV_CMD640_ENHANCED $CONFIG_BLK_DEV_CMD640
10        dep_bool '  ISA-PNP EIDE support' CONFIG_BLK_DEV_ISAPNP $CONFIG_ISAPNP
11        if [ "$CONFIG_PCI" = "y" ]; then
12          bool '  PCI IDE chipset support' CONFIG_BLK_DEV_IDEPCI
13 @@ -47,7 +47,9 @@
14             dep_tristate '    AEC62XX chipset support' CONFIG_BLK_DEV_AEC62XX $CONFIG_BLK_DEV_IDEDMA_PCI
15             dep_tristate '    ALI M15x3 chipset support' CONFIG_BLK_DEV_ALI15X3 $CONFIG_BLK_DEV_IDEDMA_PCI
16             dep_mbool    '      ALI M15x3 WDC support (DANGEROUS)' CONFIG_WDC_ALI15X3 $CONFIG_BLK_DEV_ALI15X3
17 -           dep_tristate '    AMD Viper support' CONFIG_BLK_DEV_AMD74XX $CONFIG_BLK_DEV_IDEDMA_PCI
18 +           dep_tristate '    AMD and nVidia IDE support' CONFIG_BLK_DEV_AMD74XX $CONFIG_BLK_DEV_IDEDMA_PCI
19             dep_mbool    '      AMD Viper ATA-66 Override' CONFIG_AMD74XX_OVERRIDE $CONFIG_BLK_DEV_AMD74XX
20 +           dep_tristate '    CMD640 chipset bugfix/support' CONFIG_BLK_DEV_CMD640 $CONFIG_X86
21 +           dep_mbool    '      CMD640 enhanced support' CONFIG_BLK_DEV_CMD640_ENHANCED $CONFIG_BLK_DEV_CMD640
22             dep_tristate '    CMD64{3|6|8|9} chipset support' CONFIG_BLK_DEV_CMD64X $CONFIG_BLK_DEV_IDEDMA_PCI
23             dep_tristate '    Compaq Triflex IDE support' CONFIG_BLK_DEV_TRIFLEX $CONFIG_BLK_DEV_IDEDMA_PCI
24 @@ -63,7 +63,7 @@
25             dep_tristate '    NS87415 chipset support' CONFIG_BLK_DEV_NS87415 $CONFIG_BLK_DEV_IDEDMA_PCI
26             dep_tristate '    OPTi 82C621 chipset enhanced support (EXPERIMENTAL)' CONFIG_BLK_DEV_OPTI621 $CONFIG_EXPERIMENTAL
27             dep_tristate '    PROMISE PDC202{46|62|65|67} support' CONFIG_BLK_DEV_PDC202XX_OLD $CONFIG_BLK_DEV_IDEDMA_PCI
28 -           dep_mbool    '      Special UDMA Feature' CONFIG_PDC202XX_BURST $CONFIG_BLK_DEV_PDC202XX_OLD $CONFIG_BLK_DEV_IDEDMA_PCI
29 +           dep_mbool     '      Special UDMA Feature' CONFIG_PDC202XX_BURST $CONFIG_BLK_DEV_PDC202XX_OLD $CONFIG_BLK_DEV_IDEDMA_PCI
30             dep_tristate '    PROMISE PDC202{68|69|70|71|75|76|77} support' CONFIG_BLK_DEV_PDC202XX_NEW $CONFIG_BLK_DEV_IDEDMA_PCI
31             if [ "$CONFIG_BLK_DEV_PDC202XX_OLD" = "y" -o "$CONFIG_BLK_DEV_PDC202XX_OLD" = "m" -o "$CONFIG_BLK_DEV_PDC202XX_NEW" = "y" -o "$CONFIG_BLK_DEV_PDC202XX_NEW" = "m" ]; then
32                 bool     '    Special FastTrak Feature' CONFIG_PDC202XX_FORCE
33 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/ide.c linux.21-ac4/drivers/ide/ide.c
34 --- linux.vanilla/drivers/ide/ide.c     2003-06-14 00:11:30.000000000 +0100
35 +++ linux.21-ac4/drivers/ide/ide.c      2003-05-30 22:42:04.000000000 +0100
36 @@ -1414,6 +1414,8 @@
37  #endif         
38  }
39  
40 +EXPORT_SYMBOL_GPL(ide_add_generic_settings);
41 +
42  /*
43   * Delay for *at least* 50ms.  As we don't know how much time is left
44   * until the next tick occurs, we wait an extra tick to be safe.
45 @@ -2110,8 +2112,8 @@
46  #ifdef CONFIG_BLK_DEV_CMD640
47                         case -14: /* "cmd640_vlb" */
48                         {
49 -                               extern int cmd640_vlb; /* flag for cmd640.c */
50 -                               cmd640_vlb = 1;
51 +                               extern void init_cmd640_vlb (void);
52 +                               init_cmd640_vlb();
53                                 goto done;
54                         }
55  #endif /* CONFIG_BLK_DEV_CMD640 */
56 @@ -2210,6 +2212,37 @@
57  }
58  
59  /*
60 + *     Legacy interface registration
61 + */
62 +#define NUM_DRIVER             32
63 +
64 +/*
65 + *     Yes this is moronically simple, but why not - it works!
66 + */
67 +
68 +static __initdata ide_driver_call ide_scan[NUM_DRIVER];
69 +
70 +void __init ide_register_driver(ide_driver_call scan)
71 +{
72 +       static int ide_scans = 0;
73 +       if(ide_scans == NUM_DRIVER)
74 +               panic("Too many IDE drivers");
75 +       ide_scan[ide_scans++]=scan;
76 +}
77 +
78 +EXPORT_SYMBOL(ide_register_driver);
79 +
80 +static void __init ide_scan_drivers(void)
81 +{
82 +       int i = 0;
83 +       while(ide_scan[i])
84 +       {
85 +               (ide_scan[i])();
86 +               i++;
87 +       }
88 +}
89 +
90 +/*
91   * probe_for_hwifs() finds/initializes "known" IDE interfaces
92   */
93  static void __init probe_for_hwifs (void)
94 @@ -2220,25 +2253,17 @@
95                 ide_scan_pcibus(ide_scan_direction);
96         }
97  #endif /* CONFIG_BLK_DEV_IDEPCI */
98 +       ide_scan_drivers();
99  
100 +       /*
101 +        *      Unconverted drivers
102 +        */     
103  #ifdef CONFIG_ETRAX_IDE
104         {
105                 extern void init_e100_ide(void);
106                 init_e100_ide();
107         }
108  #endif /* CONFIG_ETRAX_IDE */
109 -#ifdef CONFIG_BLK_DEV_CMD640
110 -       {
111 -               extern void ide_probe_for_cmd640x(void);
112 -               ide_probe_for_cmd640x();
113 -       }
114 -#endif /* CONFIG_BLK_DEV_CMD640 */
115 -#ifdef CONFIG_BLK_DEV_PDC4030
116 -       {
117 -               extern int ide_probe_for_pdc4030(void);
118 -               (void) ide_probe_for_pdc4030();
119 -       }
120 -#endif /* CONFIG_BLK_DEV_PDC4030 */
121  #ifdef CONFIG_BLK_DEV_IDE_PMAC
122         {
123                 extern void pmac_ide_probe(void);
124 @@ -2293,12 +2318,6 @@
125                 buddha_init();
126         }
127  #endif /* CONFIG_BLK_DEV_BUDDHA */
128 -#if defined(CONFIG_BLK_DEV_ISAPNP) && defined(CONFIG_ISAPNP)
129 -       {
130 -               extern void pnpide_init(int enable);
131 -               pnpide_init(1);
132 -       }
133 -#endif /* CONFIG_BLK_DEV_ISAPNP */
134  }
135  
136  void __init ide_init_builtin_subdrivers (void)
137 @@ -2355,6 +2374,10 @@
138  void __init ide_init_builtin_drivers (void)
139  {
140         /*
141 +        * Attach null driver
142 +        */
143 +       idedefault_init();
144 +       /*
145          * Probe for special PCI and other "known" interface chipsets
146          */
147         probe_for_hwifs ();
148 @@ -2604,9 +2627,6 @@
149                 up(&ide_setting_sem);
150                 return 1;
151         }
152 -#if defined(CONFIG_BLK_DEV_ISAPNP) && defined(CONFIG_ISAPNP) && defined(MODULE)
153 -       pnpide_init(0);
154 -#endif /* CONFIG_BLK_DEV_ISAPNP */
155  #ifdef CONFIG_PROC_FS
156         ide_remove_proc_entries(drive->proc, DRIVER(drive)->proc);
157         ide_remove_proc_entries(drive->proc, generic_subdriver_entries);
158 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/ide-default.c linux.21-ac4/drivers/ide/ide-default.c
159 --- linux.vanilla/drivers/ide/ide-default.c     2003-06-14 00:11:30.000000000 +0100
160 +++ linux.21-ac4/drivers/ide/ide-default.c      2003-05-30 19:44:32.000000000 +0100
161 @@ -85,13 +85,10 @@
162         return ret;
163  }
164  
165 -MODULE_DESCRIPTION("IDE Default Driver");
166 -
167  int idedefault_init (void)
168  {
169         ide_register_module(&idedefault_module);
170         return 0;
171  }
172  
173 -module_init(idedefault_init);
174  MODULE_LICENSE("GPL");
175 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/ide-dma.c linux.21-ac4/drivers/ide/ide-dma.c
176 --- linux.vanilla/drivers/ide/ide-dma.c 2003-06-14 00:11:30.000000000 +0100
177 +++ linux.21-ac4/drivers/ide/ide-dma.c  2003-05-29 01:38:47.000000000 +0100
178 @@ -528,9 +528,10 @@
179   *     the driver to resolve the problem, if a DMA transfer is still
180   *     in progress we continue to wait (arguably we need to add a 
181   *     secondary 'I dont care what the drive thinks' timeout here)
182 - *     Finally if we have an interrupt but for some reason got the
183 - *     timeout first we complete the I/O. This can occur if an 
184 - *     interrupt is lost or due to bugs.
185 + *     Finally if we have an interrupt we let it complete the I/O.
186 + *     But only one time - we clear expiry and if it's still not
187 + *     completed after WAIT_CMD, we error and retry in PIO.
188 + *     This can occur if an interrupt is lost or due to hang or bugs.
189   */
190   
191  static int dma_timer_expiry (ide_drive_t *drive)
192 @@ -544,22 +545,24 @@
193         if ((dma_stat & 0x18) == 0x18)  /* BUSY Stupid Early Timer !! */
194                 return WAIT_CMD;
195  
196 -       HWGROUP(drive)->expiry = NULL;  /* one free ride for now */
197 +       /*
198 +        * Clear the expiry handler in case we decide to wait more,
199 +        * next time timer expires it is an error 
200 +        */
201 +       HWGROUP(drive)->expiry = NULL;
202  
203         /* 1 dmaing, 2 error, 4 intr */
204         
205 -       if (dma_stat & 2) {     /* ERROR */
206 -               (void) hwif->ide_dma_end(drive);
207 -               return DRIVER(drive)->error(drive,
208 -                       "dma_timer_expiry", hwif->INB(IDE_STATUS_REG));
209 -       }
210 +       if (dma_stat & 2)       /* ERROR */
211 +               return -1;
212 +
213         if (dma_stat & 1)       /* DMAing */
214                 return WAIT_CMD;
215  
216         if (dma_stat & 4)       /* Got an Interrupt */
217 -               HWGROUP(drive)->handler(drive);
218 +               return WAIT_CMD;
219  
220 -       return 0;
221 +       return 0;       /* Unknown status -- reset the bus */
222  }
223  
224  /**
225 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/ide-geometry.c linux.21-ac4/drivers/ide/ide-geometry.c
226 --- linux.vanilla/drivers/ide/ide-geometry.c    2003-06-14 00:11:30.000000000 +0100
227 +++ linux.21-ac4/drivers/ide/ide-geometry.c     2003-05-30 19:58:14.000000000 +0100
228 @@ -215,3 +215,4 @@
229                        drive->bios_cyl, drive->bios_head, drive->bios_sect);
230         return ret;
231  }
232 +
233 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/ide-io.c linux.21-ac4/drivers/ide/ide-io.c
234 --- linux.vanilla/drivers/ide/ide-io.c  2003-06-14 00:11:30.000000000 +0100
235 +++ linux.21-ac4/drivers/ide/ide-io.c   2003-05-30 19:56:36.000000000 +0100
236 @@ -896,15 +896,18 @@
237         ide_do_request(q->queuedata, IDE_NO_IRQ);
238  }
239  
240 +EXPORT_SYMBOL(do_ide_request);
241 +
242  /*
243   * un-busy the hwgroup etc, and clear any pending DMA status. we want to
244   * retry the current request in pio mode instead of risking tossing it
245   * all away
246   */
247 -void ide_dma_timeout_retry(ide_drive_t *drive)
248 +static ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
249  {
250         ide_hwif_t *hwif = HWIF(drive);
251         struct request *rq;
252 +       ide_startstop_t ret = ide_stopped;
253  
254         /*
255          * end current dma transaction
256 @@ -914,8 +917,16 @@
257         /*
258          * complain a little, later we might remove some of this verbosity
259          */
260 -       printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
261 -       (void) hwif->ide_dma_timeout(drive);
262 +
263 +       if (error < 0) {
264 +               printk(KERN_ERR "%s: error waiting for DMA\n", drive->name);
265 +               (void)HWIF(drive)->ide_dma_end(drive);
266 +               ret = DRIVER(drive)->error(drive, "dma timeout retry",
267 +                               hwif->INB(IDE_STATUS_REG));
268 +       } else {
269 +               printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
270 +               (void) hwif->ide_dma_timeout(drive);
271 +       }
272  
273         /*
274          * disable dma for now, but remember that we did so because of
275 @@ -938,9 +949,9 @@
276         rq->current_nr_sectors = rq->bh->b_size >> 9;
277         rq->hard_cur_sectors = rq->current_nr_sectors;
278         rq->buffer = rq->bh->b_data;
279 -}
280  
281 -EXPORT_SYMBOL(ide_dma_timeout_retry);
282 +       return ret;
283 +}
284  
285  /**
286   *     ide_timer_expiry        -       handle lack of an IDE interrupt
287 @@ -962,10 +973,9 @@
288         ide_handler_t   *handler;
289         ide_expiry_t    *expiry;
290         unsigned long   flags;
291 -       unsigned long   wait;
292 +       unsigned long   wait = -1;
293  
294         spin_lock_irqsave(&io_request_lock, flags);
295 -       del_timer(&hwgroup->timer);
296  
297         if ((handler = hwgroup->handler) == NULL) {
298                 /*
299 @@ -992,7 +1002,7 @@
300                         }
301                         if ((expiry = hwgroup->expiry) != NULL) {
302                                 /* continue */
303 -                               if ((wait = expiry(drive)) != 0) {
304 +                               if ((wait = expiry(drive)) > 0) {
305                                         /* reset timer */
306                                         hwgroup->timer.expires  = jiffies + wait;
307                                         add_timer(&hwgroup->timer);
308 @@ -1028,16 +1038,15 @@
309                                 startstop = handler(drive);
310                         } else {
311                                 if (drive->waiting_for_dma) {
312 -                                       startstop = ide_stopped;
313 -                                       ide_dma_timeout_retry(drive);
314 +                                       startstop = ide_dma_timeout_retry(drive, wait);
315                                 } else {
316                                         startstop = DRIVER(drive)->error(drive, "irq timeout", hwif->INB(IDE_STATUS_REG));
317                                 }
318                         }
319                         set_recovery_timer(hwif);
320                         drive->service_time = jiffies - drive->service_start;
321 -                       enable_irq(hwif->irq);
322                         spin_lock_irq(&io_request_lock);
323 +                       enable_irq(hwif->irq);
324                         if (startstop == ide_stopped)
325                                 hwgroup->busy = 0;
326                 }
327 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/ide-pnp.c linux.21-ac4/drivers/ide/ide-pnp.c
328 --- linux.vanilla/drivers/ide/ide-pnp.c 2003-06-14 00:11:30.000000000 +0100
329 +++ linux.21-ac4/drivers/ide/ide-pnp.c  2003-05-30 20:54:38.000000000 +0100
330 @@ -16,6 +16,7 @@
331   * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  
332   */
333  
334 +#include <linux/module.h>
335  #include <linux/ide.h>
336  #include <linux/init.h>
337  
338 @@ -98,7 +99,7 @@
339   * Probe for ISA PnP IDE interfaces.
340   */
341  
342 -void __init pnpide_init(int enable)
343 +static void pnpide_init(int enable)
344  {
345         struct pci_dev *dev = NULL;
346         struct pnp_dev_t *dev_type;
347 @@ -155,3 +156,26 @@
348                 }
349         }
350  }
351 +
352 +static void __init pnpide_begin(void)
353 +{
354 +       pnpide_init(1);
355 +}
356 +
357 +static int pnpide_init_module(void)
358 +{
359 +       ide_register_driver(pnpide_begin);
360 +       return 0;
361 +}
362 +
363 +static void pnpide_unload(void)
364 +{
365 +       pnpide_init(0);
366 +}
367 +
368 +module_init(pnpide_init_module);
369 +module_exit(pnpide_unload);
370 +
371 +MODULE_AUTHOR("Andrey Panin");
372 +MODULE_DESCRIPTION("Enabler for ISAPNP IDE devices");
373 +MODULE_LICENSE("GPL");
374 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/ide-proc.c linux.21-ac4/drivers/ide/ide-proc.c
375 --- linux.vanilla/drivers/ide/ide-proc.c        2003-06-14 00:11:30.000000000 +0100
376 +++ linux.21-ac4/drivers/ide/ide-proc.c 2003-06-03 18:18:09.000000000 +0100
377 @@ -982,16 +982,11 @@
378  void proc_ide_destroy(void)
379  {
380  #ifdef CONFIG_BLK_DEV_IDEPCI
381 -       ide_pci_host_proc_t *p = ide_pci_host_proc_list;
382 -       char name[32];
383 +       ide_pci_host_proc_t *p;
384  
385 -       while ((p->name != NULL) && (p->set) && (p->get_info != NULL)) {
386 -               name[0] = '\0';
387 -               sprintf(name, "ide/%s", p->name);
388 +       for (p = ide_pci_host_proc_list; p; p = p->next) {
389                 if (p->set == 2)
390                         remove_proc_entry(p->name, p->parent);
391 -               if (p->next == NULL) break;
392 -               p = p->next;
393         }
394  #endif /* CONFIG_BLK_DEV_IDEPCI */
395         remove_proc_entry("ide/drivers", proc_ide_root);
396 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/legacy/pdc4030.c linux.21-ac4/drivers/ide/legacy/pdc4030.c
397 --- linux.vanilla/drivers/ide/legacy/pdc4030.c  2003-06-14 00:11:30.000000000 +0100
398 +++ linux.21-ac4/drivers/ide/legacy/pdc4030.c   2003-05-30 20:22:40.000000000 +0100
399 @@ -147,8 +147,6 @@
400         return pdc4030_cmd(drive, PROMISE_IDENTIFY);
401  }
402  
403 -int enable_promise_support;
404 -
405  /*
406   * setup_pdc4030()
407   * Completes the setup of a Promise DC4030 controller card, once found.
408 @@ -308,11 +306,6 @@
409         unsigned int    index;
410         ide_hwif_t      *hwif;
411  
412 -#ifndef MODULE
413 -       if (enable_promise_support == 0)
414 -               return;
415 -#endif
416 -
417         for (index = 0; index < MAX_HWIFS; index++) {
418                 hwif = &ide_hwifs[index];
419                 if (hwif->chipset == ide_unknown && detect_pdc4030(hwif)) {
420 @@ -362,7 +355,7 @@
421  
422  void __init init_pdc4030(void)
423  {
424 -       enable_promise_support = 1;
425 +       ide_register_driver(ide_probe_for_pdc4030);
426  }
427  
428  #else
429 @@ -373,9 +366,6 @@
430  
431  int __init pdc4030_mod_init(void)
432  {
433 -       if (enable_promise_support == 0)
434 -               enable_promise_support = 1;
435 -
436         if (!ide_probe_for_pdc4030())
437                 return -ENODEV;
438          return 0;
439 @@ -387,9 +377,6 @@
440         unsigned int    index;
441         ide_hwif_t      *hwif;
442  
443 -       if (enable_promise_support == 0)
444 -               return;
445
446         for (index = 0; index < MAX_HWIFS; index++) {
447                 hwif = &ide_hwifs[index];
448                 if (hwif->chipset == ide_pdc4030) {
449 @@ -400,7 +387,6 @@
450                                 release_pdc4030(hwif, NULL);
451                  }
452          }
453 -       enable_promise_support = 0;
454  }
455  module_exit(pdc4030_mod_exit);
456  #endif
457 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/Makefile linux.21-ac4/drivers/ide/Makefile
458 --- linux.vanilla/drivers/ide/Makefile  2003-06-14 00:11:30.000000000 +0100
459 +++ linux.21-ac4/drivers/ide/Makefile   2003-05-30 23:14:43.000000000 +0100
460 @@ -8,7 +8,6 @@
461  # In the future, some of these should be built conditionally.
462  #
463  
464 -O_TARGET := idedriver.o
465  
466  export-objs := ide-iops.o ide-taskfile.o ide-proc.o ide.o ide-probe.o ide-dma.o ide-lib.o setup-pci.o ide-io.o ide-disk.o
467  
468 @@ -29,24 +28,25 @@
469  
470  # Core IDE code - must come before legacy
471  
472 -obj-$(CONFIG_BLK_DEV_IDE)              += ide-probe.o ide-geometry.o ide-iops.o ide-taskfile.o ide.o ide-lib.o ide-io.o ide-default.o
473 -obj-$(CONFIG_BLK_DEV_IDEDISK)          += ide-disk.o
474 -obj-$(CONFIG_BLK_DEV_IDECD)            += ide-cd.o
475 -obj-$(CONFIG_BLK_DEV_IDETAPE)          += ide-tape.o
476 -obj-$(CONFIG_BLK_DEV_IDEFLOPPY)                += ide-floppy.o
477 +ide-core-objs  := ide-iops.o ide-taskfile.o ide.o ide-lib.o ide-io.o ide-default.o ide-proc.o
478 +ide-detect-objs        := ide-probe.o ide-geometry.o
479 +
480  
481  ifeq ($(CONFIG_BLK_DEV_IDEPCI),y)
482 -obj-$(CONFIG_BLK_DEV_IDE)              += setup-pci.o
483 +ide-core-objs += setup-pci.o
484  endif
485  ifeq ($(CONFIG_BLK_DEV_IDEDMA_PCI),y)
486 -obj-$(CONFIG_BLK_DEV_IDE)              += ide-dma.o
487 +ide-core-objs += ide-dma.o
488  endif
489 -obj-$(CONFIG_BLK_DEV_ISAPNP)           += ide-pnp.o
490  
491 +# Initialisation order:
492 +#      Core sets up
493 +#      Legacy drivers may register a callback
494 +#      Drivers are pre initialised
495 +#      Probe inits the drivers and driver callbacks
496 +#      Raid scans the devices
497  
498 -ifeq ($(CONFIG_BLK_DEV_IDE),y)
499 -obj-$(CONFIG_PROC_FS)                  += ide-proc.o
500 -endif
501 +obj-$(CONFIG_BLK_DEV_IDE)              += ide-core.o
502  
503  ifeq ($(CONFIG_BLK_DEV_IDE),y)
504    obj-y                += legacy/idedriver-legacy.o
505 @@ -58,10 +58,28 @@
506    endif
507  endif
508  
509 +obj-$(CONFIG_BLK_DEV_ISAPNP)           += ide-pnp.o
510 +
511 +obj-$(CONFIG_BLK_DEV_IDEDISK)          += ide-disk.o
512 +obj-$(CONFIG_BLK_DEV_IDECD)            += ide-cd.o
513 +obj-$(CONFIG_BLK_DEV_IDETAPE)          += ide-tape.o
514 +obj-$(CONFIG_BLK_DEV_IDEFLOPPY)                += ide-floppy.o
515 +
516 +obj-$(CONFIG_BLK_DEV_IDE) += ide-detect.o
517  
518  ifeq ($(CONFIG_BLK_DEV_IDE),y)
519  # RAID must be last of all
520    obj-y                += raid/idedriver-raid.o
521  endif
522  
523 +list-multi     := ide-core.o ide-detect.o
524 +O_TARGET := idedriver.o
525 +
526  include $(TOPDIR)/Rules.make
527 +
528 +ide-core.o:    $(ide-core-objs)
529 +       $(LD) -r -o $@ $(ide-core-objs)
530 +
531 +ide-detect.o:  $(ide-detect-objs)
532 +       $(LD) -r -o $@ $(ide-detect-objs)
533 +
534 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/cmd640.c linux.21-ac4/drivers/ide/pci/cmd640.c
535 --- linux.vanilla/drivers/ide/pci/cmd640.c      2003-06-14 00:11:31.000000000 +0100
536 +++ linux.21-ac4/drivers/ide/pci/cmd640.c       2003-05-30 23:16:59.000000000 +0100
537 @@ -102,6 +102,7 @@
538  #define CMD640_PREFETCH_MASKS 1
539  
540  #include <linux/config.h>
541 +#include <linux/module.h>
542  #include <linux/types.h>
543  #include <linux/kernel.h>
544  #include <linux/delay.h>
545 @@ -120,7 +121,8 @@
546  /*
547   * This flag is set in ide.c by the parameter:  ide0=cmd640_vlb
548   */
549 -int cmd640_vlb = 0;
550 +
551 +static int cmd640_vlb = 0;
552  
553  /*
554   * CMD640 specific registers definition.
555 @@ -716,7 +718,7 @@
556  /*
557   * Probe for a cmd640 chipset, and initialize it if found.  Called from ide.c
558   */
559 -int __init ide_probe_for_cmd640x (void)
560 +static void __init ide_probe_for_cmd640x (void)
561  {
562  #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
563         int second_port_toggled = 0;
564 @@ -731,13 +733,13 @@
565         } else {
566                 cmd640_vlb = 0;
567                 /* Find out what kind of PCI probing is supported otherwise
568 -                  Justin Gibbs will sulk.. */
569 +                  we break some Adaptec cards...  */
570                 if (pci_conf1() && probe_for_cmd640_pci1())
571                         bus_type = "PCI (type1)";
572                 else if (pci_conf2() && probe_for_cmd640_pci2())
573                         bus_type = "PCI (type2)";
574                 else
575 -                       return 0;
576 +                       return;
577         }
578         /*
579          * Undocumented magic (there is no 0x5b reg in specs)
580 @@ -745,7 +747,7 @@
581         put_cmd640_reg(0x5b, 0xbd);
582         if (get_cmd640_reg(0x5b) != 0xbd) {
583                 printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
584 -               return 0;
585 +               return;
586         }
587         put_cmd640_reg(0x5b, 0);
588  
589 @@ -760,7 +762,7 @@
590         cmd640_chip_version = cfr & CFR_DEVREV;
591         if (cmd640_chip_version == 0) {
592                 printk ("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
593 -               return 0;
594 +               return;
595         }
596  
597         /*
598 @@ -874,6 +876,28 @@
599  #ifdef CMD640_DUMP_REGS
600         CMD640_DUMP_REGS;
601  #endif
602 -       return 1;
603 +       return;
604 +}
605 +
606 +static int __init cmd640_init(void)
607 +{
608 +       ide_register_driver(ide_probe_for_cmd640x);
609 +       return 0;
610 +}
611 +
612 +/*
613 + *     Called by the IDE core when compiled in and cmd640=vlb is
614 + *     selected.
615 + */
616 +void init_cmd640_vlb(void)
617 +{
618 +       cmd640_vlb = 1;
619  }
620  
621 +module_init(cmd640_init);
622 +
623 +MODULE_AUTHOR("See Source");
624 +MODULE_DESCRIPTION("IDE support for CMD640 controller");
625 +MODULE_PARM(cmd640_vlb, "i");
626 +MODULE_PARM_DESC(cmd640_vlb, "Set to enable scanning for VLB controllers");
627 +MODULE_LICENSE("GPL");
628 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/generic.c linux.21-ac4/drivers/ide/pci/generic.c
629 --- linux.vanilla/drivers/ide/pci/generic.c     2003-06-14 00:11:31.000000000 +0100
630 +++ linux.21-ac4/drivers/ide/pci/generic.c      2003-06-02 17:46:35.000000000 +0100
631 @@ -140,6 +140,7 @@
632         { PCI_VENDOR_ID_HINT,   PCI_DEVICE_ID_HINT_VXPROII_IDE,    PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
633         { PCI_VENDOR_ID_VIA,    PCI_DEVICE_ID_VIA_82C561,          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7},
634         { PCI_VENDOR_ID_OPTI,   PCI_DEVICE_ID_OPTI_82C558,         PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8},
635 +       { PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_PICCOLO,    PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9},
636         { 0, },
637  };
638  
639 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/generic.h linux.21-ac4/drivers/ide/pci/generic.h
640 --- linux.vanilla/drivers/ide/pci/generic.h     2003-06-14 00:11:31.000000000 +0100
641 +++ linux.21-ac4/drivers/ide/pci/generic.h      2003-06-27 17:13:09.000000000 +0100
642 @@ -127,6 +127,19 @@
643                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
644                 .bootable       = ON_BOARD,
645                 .extra          = 0,
646 +       },{     /* 9 */
647 +               .vendor         = PCI_VENDOR_ID_TOSHIBA,
648 +               .device         = PCI_DEVICE_ID_TOSHIBA_PICCOLO,
649 +               .name           = "Piccolo",
650 +               .init_chipset   = init_chipset_generic,
651 +               .init_iops      = NULL,
652 +               .init_hwif      = init_hwif_generic,
653 +               .init_dma       = init_dma_generic,
654 +               .channels       = 2,
655 +               .autodma        = NOAUTODMA,
656 +               .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
657 +               .bootable       = ON_BOARD,
658 +               .extra          = 0,
659         },{
660                 .vendor         = 0,
661                 .device         = 0,
662 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/hpt366.c linux.21-ac4/drivers/ide/pci/hpt366.c
663 --- linux.vanilla/drivers/ide/pci/hpt366.c      2003-06-14 00:11:31.000000000 +0100
664 +++ linux.21-ac4/drivers/ide/pci/hpt366.c       2003-06-22 18:18:49.000000000 +0100
665 @@ -484,9 +484,12 @@
666  {
667         u8 speed = ide_dma_speed(drive, hpt3xx_ratemask(drive));
668  
669 -       if (!(speed))
670 +       if (!speed)
671                 return 0;
672  
673 +       if (pci_get_drvdata(HWIF(drive)->pci_dev) == NULL)
674 +               return 0;
675 +               
676         (void) hpt3xx_tune_chipset(drive, speed);
677         return ide_dma_enable(drive);
678  }
679 @@ -919,6 +922,8 @@
680          * Currently we always set up the PLL for the 372N
681          */
682          
683 +       pci_set_drvdata(dev, NULL);
684 +       
685         if(is_372n)
686         {
687                 printk(KERN_INFO "hpt: HPT372N detected, using 372N timing.\n");
688 @@ -957,6 +962,7 @@
689                                 pci_set_drvdata(dev, (void *) thirty_three_base_hpt370);
690                         printk("HPT37X: using 33MHz PCI clock\n");
691                 } else if (pll == F_LOW_PCI_40) {
692 +                       /* Unsupported */
693                 } else if (pll == F_LOW_PCI_50) {
694                         if (hpt_minimum_revision(dev,8))
695                                 pci_set_drvdata(dev, NULL);
696 @@ -971,7 +977,6 @@
697                         if (hpt_minimum_revision(dev,8))
698                         {
699                                 printk(KERN_ERR "HPT37x: 66MHz timings are not supported.\n");
700 -                               pci_set_drvdata(dev, NULL);
701                         }
702                         else if (hpt_minimum_revision(dev,5))
703                                 pci_set_drvdata(dev, (void *) sixty_six_base_hpt372);
704 @@ -996,6 +1001,11 @@
705         if (pci_get_drvdata(dev)) 
706                 goto init_hpt37X_done;
707         
708 +       if (hpt_minimum_revision(dev,8))
709 +       {
710 +               printk(KERN_ERR "HPT374: Only 33MHz PCI timings are supported.\n");
711 +               return -EOPNOTSUPP;
712 +       }
713         /*
714          * adjust PLL based upon PCI clock, enable it, and wait for
715          * stabilization.
716 @@ -1021,9 +1031,7 @@
717                                 pci_write_config_dword(dev, 0x5c, 
718                                                        pll & ~0x100);
719                                 pci_write_config_byte(dev, 0x5b, 0x21);
720 -                               if (hpt_minimum_revision(dev,8))
721 -                                       return -EOPNOTSUPP;
722 -                               else if (hpt_minimum_revision(dev,5))
723 +                               if (hpt_minimum_revision(dev,5))
724                                         pci_set_drvdata(dev, (void *) fifty_base_hpt372);
725                                 else if (hpt_minimum_revision(dev,4))
726                                         pci_set_drvdata(dev, (void *) fifty_base_hpt370a);
727 @@ -1334,7 +1342,7 @@
728         struct pci_dev *findev = NULL;
729         u8 pin1 = 0, pin2 = 0;
730         unsigned int class_rev;
731 -       char *chipset_names[] = {"HPT366", "HPT366",  "HPT368",
732 +       static char *chipset_names[] = {"HPT366", "HPT366",  "HPT368",
733                                  "HPT370", "HPT370A", "HPT372"};
734  
735         if (PCI_FUNC(dev->devfn) & 1)
736 @@ -1349,7 +1357,8 @@
737         if(d->device == PCI_DEVICE_ID_TTI_HPT372N)
738                 class_rev = 5;
739                 
740 -       strcpy(d->name, chipset_names[class_rev]);
741 +       if(class_rev < 6)
742 +               d->name = chipset_names[class_rev];
743  
744         switch(class_rev) {
745                 case 5:
746 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/pdc202xx_new.h linux.21-ac4/drivers/ide/pci/pdc202xx_new.h
747 --- linux.vanilla/drivers/ide/pci/pdc202xx_new.h        2003-06-14 00:11:31.000000000 +0100
748 +++ linux.21-ac4/drivers/ide/pci/pdc202xx_new.h 2003-06-27 17:13:09.000000000 +0100
749 @@ -255,7 +255,7 @@
750                 .vendor         = PCI_VENDOR_ID_PROMISE,
751                 .device         = PCI_DEVICE_ID_PROMISE_20275,
752                 .name           = "PDC20275",
753 -               .init_setup     = init_setup_pdcnew,
754 +               .init_setup     = init_setup_pdc20276,
755                 .init_chipset   = init_chipset_pdcnew,
756                 .init_iops      = NULL,
757                 .init_hwif      = init_hwif_pdc202new,
758 @@ -287,7 +287,7 @@
759                 .vendor         = PCI_VENDOR_ID_PROMISE,
760                 .device         = PCI_DEVICE_ID_PROMISE_20277,
761                 .name           = "PDC20277",
762 -               .init_setup     = init_setup_pdcnew,
763 +               .init_setup     = init_setup_pdc20276,
764                 .init_chipset   = init_chipset_pdcnew,
765                 .init_iops      = NULL,
766                 .init_hwif      = init_hwif_pdc202new,
767 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/pdc202xx_old.c linux.21-ac4/drivers/ide/pci/pdc202xx_old.c
768 --- linux.vanilla/drivers/ide/pci/pdc202xx_old.c        2003-06-14 00:11:31.000000000 +0100
769 +++ linux.21-ac4/drivers/ide/pci/pdc202xx_old.c 2003-06-02 15:23:26.000000000 +0100
770 @@ -168,9 +168,6 @@
771                 pdc202xx_pio_verbose(reg64h),
772                 pdc202xx_pio_verbose(reg68h),
773                 pdc202xx_pio_verbose(reg6ch));
774 -#if 0
775 -       p += sprintf(p, "--------------- Can ATAPI DMA ---------------\n");
776 -#endif
777         return (char *)p;
778  }
779  
780 @@ -635,42 +632,7 @@
781         
782         pdc202xx_reset_host(hwif);
783         pdc202xx_reset_host(mate);
784 -#if 0
785 -       /*
786 -        * FIXME: Have to kick all the drives again :-/
787 -        * What a pain in the ACE!
788 -        */
789 -       if (hwif->present) {
790 -               u16 hunit = 0;
791 -               hwif->initializing = 1;
792 -               for (hunit = 0; hunit < MAX_DRIVES; ++hunit) {
793 -                       ide_drive_t *hdrive = &hwif->drives[hunit];
794 -                       if (hdrive->present) {
795 -                               if (hwif->ide_dma_check)
796 -                                       hwif->ide_dma_check(hdrive);
797 -                               else
798 -                                       hwif->tuneproc(hdrive, 5);
799 -                       }
800 -               }
801 -               hwif->initializing = 0;
802 -       }
803 -       if (mate->present) {
804 -               u16 munit = 0;
805 -               mate->initializing = 1;
806 -               for (munit = 0; munit < MAX_DRIVES; ++munit) {
807 -                       ide_drive_t *mdrive = &mate->drives[munit];
808 -                       if (mdrive->present) {
809 -                               if (mate->ide_dma_check) 
810 -                                       mate->ide_dma_check(mdrive);
811 -                               else
812 -                                       mate->tuneproc(mdrive, 5);
813 -                       }
814 -               }
815 -               mate->initializing = 0;
816 -       }
817 -#else
818         hwif->tuneproc(drive, 5);
819 -#endif
820  }
821  
822  /*
823 @@ -726,20 +688,6 @@
824          * reset leaves the timing registers intact,
825          * but resets the drives.
826          */
827 -#if 0
828 -       if ((dev->device == PCI_DEVICE_ID_PROMISE_20267) ||
829 -           (dev->device == PCI_DEVICE_ID_PROMISE_20265) ||
830 -           (dev->device == PCI_DEVICE_ID_PROMISE_20263) ||
831 -           (dev->device == PCI_DEVICE_ID_PROMISE_20262)) {
832 -               unsigned long high_16   = pci_resource_start(dev, 4);
833 -               byte udma_speed_flag    = inb(high_16 + 0x001f);
834 -               outb(udma_speed_flag | 0x10, high_16 + 0x001f);
835 -               mdelay(100);
836 -               outb(udma_speed_flag & ~0x10, high_16 + 0x001f);
837 -               mdelay(2000);   /* 2 seconds ?! */
838 -       }
839 -
840 -#endif
841         return dev->irq;
842  }
843  
844 @@ -859,18 +807,6 @@
845                 }
846         }
847  
848 -#if 0
849 -        if (dev->device == PCI_DEVICE_ID_PROMISE_20262)
850 -        if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
851 -             (tmp & e->mask) != e->val))
852 -
853 -        if (d->enablebits[0].reg != d->enablebits[1].reg) {
854 -                d->enablebits[0].reg    = d->enablebits[1].reg;
855 -                d->enablebits[0].mask   = d->enablebits[1].mask;
856 -                d->enablebits[0].val    = d->enablebits[1].val;
857 -        }
858 -#endif
859 -
860         ide_setup_pci_device(dev, d);
861  }
862  
863 @@ -884,22 +820,6 @@
864                         "attached to I2O RAID controller.\n");
865                 return;
866         }
867 -
868 -#if 0
869 -        {
870 -                u8 pri = 0, sec = 0;
871 -
872 -        if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
873 -             (tmp & e->mask) != e->val))
874 -
875 -        if (d->enablebits[0].reg != d->enablebits[1].reg) {
876 -                d->enablebits[0].reg    = d->enablebits[1].reg;
877 -                d->enablebits[0].mask   = d->enablebits[1].mask;
878 -                d->enablebits[0].val    = d->enablebits[1].val;
879 -        }
880 -        }
881 -#endif
882 -
883         ide_setup_pci_device(dev, d);
884  }
885  
886 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/piix.c linux.21-ac4/drivers/ide/pci/piix.c
887 --- linux.vanilla/drivers/ide/pci/piix.c        2003-06-14 00:11:31.000000000 +0100
888 +++ linux.21-ac4/drivers/ide/pci/piix.c 2003-06-22 20:24:21.000000000 +0100
889 @@ -811,7 +811,9 @@
890         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15},
891         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_11, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16},
892         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_10,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17},
893 +#if 0 /* SATA is covered by ata_piix scsi driver */
894         { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18},
895 +#endif
896         { 0, },
897  };
898  
899 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/siimage.c linux.21-ac4/drivers/ide/pci/siimage.c
900 --- linux.vanilla/drivers/ide/pci/siimage.c     2003-06-14 00:11:31.000000000 +0100
901 +++ linux.21-ac4/drivers/ide/pci/siimage.c      2003-06-27 17:49:44.000000000 +0100
902 @@ -1,10 +1,24 @@
903  /*
904 - * linux/drivers/ide/pci/siimage.c             Version 1.02    Jan 30, 2003
905 + * linux/drivers/ide/pci/siimage.c             Version 1.06    June 11, 2003
906   *
907   * Copyright (C) 2001-2002     Andre Hedrick <andre@linux-ide.org>
908   * Copyright (C) 2003          Red Hat <alan@redhat.com>
909   *
910   *  May be copied or modified under the terms of the GNU General Public License
911 + *
912 + *  Documentation available under NDA only
913 + *
914 + *
915 + *  FAQ Items:
916 + *     If you are using Marvell SATA-IDE adapters with Maxtor drives
917 + *     ensure the system is set up for ATA100/UDMA5 not UDMA6.
918 + *
919 + *     If you are using WD drives with SATA bridges you must set the
920 + *     drive to "Single". "Master" will hang
921 + *
922 + *     If you have strange problems with nVidia chipset systems please
923 + *     see the SI support documentation and update your system BIOS
924 + *     if neccessary
925   */
926  
927  #include <linux/config.h>
928 @@ -30,12 +44,102 @@
929  static struct pci_dev *siimage_devs[SIIMAGE_MAX_DEVS];
930  static int n_siimage_devs;
931  
932 -static char * print_siimage_get_info (char *buf, struct pci_dev *dev, int index)
933 +/**
934 + *     pdev_is_sata            -       check if device is SATA
935 + *     @pdev:  PCI device to check
936 + *     
937 + *     Returns true if this is a SATA controller
938 + */
939
940 +static int pdev_is_sata(struct pci_dev *pdev)
941 +{
942 +       switch(pdev->device)
943 +       {
944 +               case PCI_DEVICE_ID_SII_3112:
945 +               case PCI_DEVICE_ID_SII_1210SA:
946 +                       return 1;
947 +               case PCI_DEVICE_ID_SII_680:
948 +                       return 0;
949 +       }
950 +       BUG();
951 +}
952
953 +/**
954 + *     is_sata                 -       check if hwif is SATA
955 + *     @hwif:  interface to check
956 + *     
957 + *     Returns true if this is a SATA controller
958 + */
959
960 +static inline int is_sata(ide_hwif_t *hwif)
961 +{
962 +       return pdev_is_sata(hwif->pci_dev);
963 +}
964 +
965 +/**
966 + *     siimage_selreg          -       return register base
967 + *     @hwif: interface
968 + *     @r: config offset
969 + *
970 + *     Turn a config register offset into the right address in either
971 + *     PCI space or MMIO space to access the control register in question
972 + *     Thankfully this is a configuration operation so isnt performance
973 + *     criticial. 
974 + */
975
976 +static unsigned long siimage_selreg(ide_hwif_t *hwif, int r)
977 +{
978 +       unsigned long base = (unsigned long)hwif->hwif_data;
979 +       base += 0xA0 + r;
980 +       if(hwif->mmio)
981 +               base += (hwif->channel << 6);
982 +       else
983 +               base += (hwif->channel << 4);
984 +       return base;
985 +}
986 +       
987 +/**
988 + *     siimage_seldev          -       return register base
989 + *     @hwif: interface
990 + *     @r: config offset
991 + *
992 + *     Turn a config register offset into the right address in either
993 + *     PCI space or MMIO space to access the control register in question
994 + *     including accounting for the unit shift.
995 + */
996
997 +static inline unsigned long siimage_seldev(ide_drive_t *drive, int r)
998 +{
999 +       ide_hwif_t *hwif        = HWIF(drive);
1000 +       unsigned long base = (unsigned long)hwif->hwif_data;
1001 +       base += 0xA0 + r;
1002 +       if(hwif->mmio)
1003 +               base += (hwif->channel << 6);
1004 +       else
1005 +               base += (hwif->channel << 4);
1006 +       base |= drive->select.b.unit << drive->select.b.unit;
1007 +       return base;
1008 +}
1009 +       
1010 +/**
1011 + *     print_siimage_get_info  -       print minimal proc information
1012 + *     @buf: buffer to write into (kernel space)
1013 + *     @dev: PCI device we are describing
1014 + *     @index: Controller number
1015 + *
1016 + *     Print the basic information for the state of the CMD680/SI3112
1017 + *     channel. We don't actually dump a lot of information out for
1018 + *     this controller although we could expand it if we needed.
1019 + */
1020
1021 +static char *print_siimage_get_info (char *buf, struct pci_dev *dev, int index)
1022  {
1023         char *p         = buf;
1024         u8 mmio         = (pci_get_drvdata(dev) != NULL) ? 1 : 0;
1025 -       unsigned long bmdma     = (mmio) ? ((unsigned long) pci_get_drvdata(dev)) :
1026 -                                   (pci_resource_start(dev, 4));
1027 +       unsigned long bmdma = pci_resource_start(dev, 4);
1028 +       
1029 +       if(mmio)
1030 +               bmdma = pci_resource_start(dev, 5);
1031  
1032         p += sprintf(p, "\nController: %d\n", index);
1033         p += sprintf(p, "SiI%x Chipset.\n", dev->device);
1034 @@ -43,18 +147,20 @@
1035                 p += sprintf(p, "MMIO Base 0x%lx\n", bmdma);
1036         p += sprintf(p, "%s-DMA Base 0x%lx\n", (mmio)?"MMIO":"BM", bmdma);
1037         p += sprintf(p, "%s-DMA Base 0x%lx\n", (mmio)?"MMIO":"BM", bmdma+8);
1038 -
1039 -       p += sprintf(p, "--------------- Primary Channel "
1040 -                       "---------------- Secondary Channel "
1041 -                       "-------------\n");
1042 -       p += sprintf(p, "--------------- drive0 --------- drive1 "
1043 -                       "-------- drive0 ---------- drive1 ------\n");
1044 -       p += sprintf(p, "PIO Mode:       %s                %s"
1045 -                       "               %s                 %s\n",
1046 -                       "?", "?", "?", "?");
1047         return (char *)p;
1048  }
1049  
1050 +/**
1051 + *     siimage_get_info        -       proc callback
1052 + *     @buffer: kernel buffer to complete
1053 + *     @addr: written with base of data to return
1054 + *     offset: seek offset
1055 + *     count: bytes to fill in 
1056 + *
1057 + *     Called when the user reads data from the virtual file for this
1058 + *     controller from /proc
1059 + */
1060
1061  static int siimage_get_info (char *buffer, char **addr, off_t offset, int count)
1062  {
1063         char *p = buffer;
1064 @@ -89,44 +195,56 @@
1065  {
1066         ide_hwif_t *hwif        = HWIF(drive);
1067         u8 mode = 0, scsc = 0;
1068 +       unsigned long base = (unsigned long) hwif->hwif_data;
1069  
1070         if (hwif->mmio)
1071 -               scsc = hwif->INB(HWIFADDR(0x4A));
1072 +               scsc = hwif->INB(base + 0x4A);
1073         else
1074                 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
1075  
1076 -       switch(hwif->pci_dev->device) {
1077 -               case PCI_DEVICE_ID_SII_3112:
1078 -                       return 4;
1079 -               case PCI_DEVICE_ID_SII_680:
1080 -                       if ((scsc & 0x30) == 0x10)      /* 133 */
1081 -                               mode = 4;
1082 -                       else if ((scsc & 0x30) == 0x20) /* 2xPCI */
1083 -                               mode = 4;
1084 -                       else if ((scsc & 0x30) == 0x00) /* 100 */
1085 -                               mode = 3;
1086 -                       else    /* Disabled ? */
1087 -                               BUG();
1088 -                       break;
1089 -               default:        return 0;
1090 +       if(is_sata(hwif))
1091 +       {
1092 +               if(strstr(drive->id->model, "Maxtor"))
1093 +                       return 3;
1094 +               return 4;
1095         }
1096 +       
1097 +       if ((scsc & 0x30) == 0x10)      /* 133 */
1098 +               mode = 4;
1099 +       else if ((scsc & 0x30) == 0x20) /* 2xPCI */
1100 +               mode = 4;
1101 +       else if ((scsc & 0x30) == 0x00) /* 100 */
1102 +               mode = 3;
1103 +       else    /* Disabled ? */
1104 +               BUG();
1105 +
1106         if (!eighty_ninty_three(drive))
1107                 mode = min(mode, (u8)1);
1108         return mode;
1109  }
1110  
1111 +/**
1112 + *     siimage_taskfile_timing -       turn timing data to a mode
1113 + *     @hwif: interface to query
1114 + *
1115 + *     Read the timing data for the interface and return the 
1116 + *     mode that is being used.
1117 + */
1118
1119  static byte siimage_taskfile_timing (ide_hwif_t *hwif)
1120  {
1121         u16 timing      = 0x328a;
1122 +       unsigned long addr = siimage_selreg(hwif, 2);
1123  
1124         if (hwif->mmio)
1125 -               timing = hwif->INW(SELADDR(2));
1126 +               timing = hwif->INW(addr);
1127         else
1128 -               pci_read_config_word(hwif->pci_dev, SELREG(2), &timing);
1129 +               pci_read_config_word(hwif->pci_dev, addr, &timing);
1130  
1131         switch (timing) {
1132                 case 0x10c1:    return 4;
1133                 case 0x10c3:    return 3;
1134 +               case 0x1104:
1135                 case 0x1281:    return 2;
1136                 case 0x2283:    return 1;
1137                 case 0x328a:
1138 @@ -140,37 +258,82 @@
1139   *     @mode_wanted: the target operating mode
1140   *
1141   *     Load the timing settings for this device mode into the
1142 - *     controller
1143 + *     controller. If we are in PIO mode 3 or 4 turn on IORDY
1144 + *     monitoring (bit 9). The TF timing is bits 31:16
1145   */
1146   
1147  static void siimage_tuneproc (ide_drive_t *drive, byte mode_wanted)
1148  {
1149         ide_hwif_t *hwif        = HWIF(drive);
1150 -       struct pci_dev *dev     = hwif->pci_dev;
1151 -       u16 speedt              = 0;
1152 -       u8 unit                 = drive->select.b.unit;
1153 -
1154 -       if (hwif->mmio)
1155 -               speedt = hwif->INW(SELADDR(0x04|(unit<<unit)));
1156 -       else
1157 -               pci_read_config_word(dev, SELADDR(0x04|(unit<<unit)), &speedt);
1158 -
1159 +       u32 speedt              = 0;
1160 +       u16 speedp              = 0;
1161 +       unsigned long addr      = siimage_seldev(drive, 0x04);
1162 +       unsigned long tfaddr    = siimage_selreg(hwif, 0x02);
1163 +       
1164         /* cheat for now and use the docs */
1165 -//     switch(siimage_taskfile_timing(hwif)) {
1166         switch(mode_wanted) {
1167 -               case 4:         speedt = 0x10c1; break;
1168 -               case 3:         speedt = 0x10C3; break;
1169 -               case 2:         speedt = 0x1104; break;
1170 -               case 1:         speedt = 0x2283; break;
1171 +               case 4: 
1172 +                       speedp = 0x10c1; 
1173 +                       speedt = 0x10c1;
1174 +                       break;
1175 +               case 3: 
1176 +                       speedp = 0x10C3; 
1177 +                       speedt = 0x10C3;
1178 +                       break;
1179 +               case 2: 
1180 +                       speedp = 0x1104; 
1181 +                       speedt = 0x1281;
1182 +                       break;
1183 +               case 1:         
1184 +                       speedp = 0x2283; 
1185 +                       speedt = 0x1281;
1186 +                       break;
1187                 case 0:
1188 -               default:        speedt = 0x328A; break;
1189 +               default:
1190 +                       speedp = 0x328A; 
1191 +                       speedt = 0x328A;
1192 +                       break;
1193         }
1194         if (hwif->mmio)
1195 -               hwif->OUTW(speedt, SELADDR(0x04|(unit<<unit)));
1196 +       {
1197 +               hwif->OUTW(speedt, addr);
1198 +               hwif->OUTW(speedp, tfaddr);
1199 +               /* Now set up IORDY */
1200 +               if(mode_wanted == 3 || mode_wanted == 4)
1201 +                       hwif->OUTW(hwif->INW(tfaddr-2)|0x200, tfaddr-2);
1202 +               else
1203 +                       hwif->OUTW(hwif->INW(tfaddr-2)&~0x200, tfaddr-2);
1204 +       }
1205         else
1206 -               pci_write_config_word(dev, SELADDR(0x04|(unit<<unit)), speedt);
1207 +       {
1208 +               pci_write_config_word(hwif->pci_dev, addr, speedp);
1209 +               pci_write_config_word(hwif->pci_dev, tfaddr, speedt);
1210 +               pci_read_config_word(hwif->pci_dev, tfaddr-2, &speedp);
1211 +               speedp &= ~0x200;
1212 +               /* Set IORDY for mode 3 or 4 */
1213 +               if(mode_wanted == 3 || mode_wanted == 4)
1214 +                       speedp |= 0x200;
1215 +               pci_write_config_word(hwif->pci_dev, tfaddr-2, speedp);
1216 +       }
1217  }
1218  
1219 +/**
1220 + *     config_siimage_chipset_for_pio  -       set drive timings
1221 + *     @drive: drive to tune
1222 + *     @speed we want
1223 + *
1224 + *     Compute the best pio mode we can for a given device. Also honour
1225 + *     the timings for the driver when dealing with mixed devices. Some
1226 + *     of this is ugly but its all wrapped up here
1227 + *
1228 + *     The SI680 can also do VDMA - we need to start using that
1229 + *
1230 + *     FIXME: we use the BIOS channel timings to avoid driving the task
1231 + *     files too fast at the disk. We need to compute the master/slave
1232 + *     drive PIO mode properly so that we can up the speed on a hotplug
1233 + *     system.
1234 + */
1235
1236  static void config_siimage_chipset_for_pio (ide_drive_t *drive, byte set_speed)
1237  {
1238         u8 channel_timings      = siimage_taskfile_timing(HWIF(drive));
1239 @@ -191,6 +354,16 @@
1240         config_siimage_chipset_for_pio(drive, set_speed);
1241  }
1242  
1243 +/**
1244 + *     siimage_tune_chipset    -       set controller timings
1245 + *     @drive: Drive to set up
1246 + *     @xferspeed: speed we want to achieve
1247 + *
1248 + *     Tune the SII chipset for the desired mode. If we can't achieve
1249 + *     the desired mode then tune for a lower one, but ultimately
1250 + *     make the thing work.
1251 + */
1252
1253  static int siimage_tune_chipset (ide_drive_t *drive, byte xferspeed)
1254  {
1255         u8 ultra6[]             = { 0x0F, 0x0B, 0x07, 0x05, 0x03, 0x02, 0x01 };
1256 @@ -200,30 +373,32 @@
1257         ide_hwif_t *hwif        = HWIF(drive);
1258         u16 ultra = 0, multi    = 0;
1259         u8 mode = 0, unit       = drive->select.b.unit;
1260 -       u8 speed        = ide_rate_filter(siimage_ratemask(drive), xferspeed);
1261 +       u8 speed                = ide_rate_filter(siimage_ratemask(drive), xferspeed);
1262 +       unsigned long base      = (unsigned long)hwif->hwif_data;
1263         u8 scsc = 0, addr_mask  = ((hwif->channel) ?
1264                                     ((hwif->mmio) ? 0xF4 : 0x84) :
1265                                     ((hwif->mmio) ? 0xB4 : 0x80));
1266 +                                   
1267 +       unsigned long ma        = siimage_seldev(drive, 0x08);
1268 +       unsigned long ua        = siimage_seldev(drive, 0x0C);
1269  
1270         if (hwif->mmio) {
1271 -               scsc = hwif->INB(HWIFADDR(0x4A));
1272 -               mode = hwif->INB(HWIFADDR(addr_mask));
1273 -               multi = hwif->INW(SELADDR(0x08|(unit<<unit)));
1274 -               ultra = hwif->INW(SELADDR(0x0C|(unit<<unit)));
1275 +               scsc = hwif->INB(base + 0x4A);
1276 +               mode = hwif->INB(base + addr_mask);
1277 +               multi = hwif->INW(ma);
1278 +               ultra = hwif->INW(ua);
1279         } else {
1280                 pci_read_config_byte(hwif->pci_dev, 0x8A, &scsc);
1281                 pci_read_config_byte(hwif->pci_dev, addr_mask, &mode);
1282 -               pci_read_config_word(hwif->pci_dev,
1283 -                               SELREG(0x08|(unit<<unit)), &multi);
1284 -               pci_read_config_word(hwif->pci_dev,
1285 -                               SELREG(0x0C|(unit<<unit)), &ultra);
1286 +               pci_read_config_word(hwif->pci_dev, ma, &multi);
1287 +               pci_read_config_word(hwif->pci_dev, ua, &ultra);
1288         }
1289  
1290         mode &= ~((unit) ? 0x30 : 0x03);
1291         ultra &= ~0x3F;
1292         scsc = ((scsc & 0x30) == 0x00) ? 0 : 1;
1293  
1294 -       scsc = (hwif->pci_dev->device == PCI_DEVICE_ID_SII_3112) ? 1 : scsc;
1295 +       scsc = is_sata(hwif) ? 1 : scsc;
1296  
1297         switch(speed) {
1298                 case XFER_PIO_4:
1299 @@ -259,20 +434,26 @@
1300         }
1301  
1302         if (hwif->mmio) {
1303 -               hwif->OUTB(mode, HWIFADDR(addr_mask));
1304 -               hwif->OUTW(multi, SELADDR(0x08|(unit<<unit)));
1305 -               hwif->OUTW(ultra, SELADDR(0x0C|(unit<<unit)));
1306 +               hwif->OUTB(mode, base + addr_mask);
1307 +               hwif->OUTW(multi, ma);
1308 +               hwif->OUTW(ultra, ua);
1309         } else {
1310                 pci_write_config_byte(hwif->pci_dev, addr_mask, mode);
1311 -               pci_write_config_word(hwif->pci_dev,
1312 -                               SELREG(0x08|(unit<<unit)), multi);
1313 -               pci_write_config_word(hwif->pci_dev,
1314 -                               SELREG(0x0C|(unit<<unit)), ultra);
1315 +               pci_write_config_word(hwif->pci_dev, ma, multi);
1316 +               pci_write_config_word(hwif->pci_dev, ua, ultra);
1317         }
1318 -
1319         return (ide_config_drive_speed(drive, speed));
1320  }
1321  
1322 +/**
1323 + *     config_chipset_for_dma  -       configure for DMA
1324 + *     @drive: drive to configure
1325 + *
1326 + *     Called by the IDE layer when it wants the timings set up.
1327 + *     For the CMD680 we also need to set up the PIO timings and
1328 + *     enable DMA.
1329 + */
1330
1331  static int config_chipset_for_dma (ide_drive_t *drive)
1332  {
1333         u8 speed        = ide_dma_speed(drive, siimage_ratemask(drive));
1334 @@ -291,6 +472,16 @@
1335         return ide_dma_enable(drive);
1336  }
1337  
1338 +/**
1339 + *     siimage_configure_drive_for_dma -       set up for DMA transfers
1340 + *     @drive: drive we are going to set up
1341 + *
1342 + *     Set up the drive for DMA, tune the controller and drive as 
1343 + *     required. If the drive isn't suitable for DMA or we hit
1344 + *     other problems then we will drop down to PIO and set up
1345 + *     PIO appropriately
1346 + */
1347
1348  static int siimage_config_drive_for_dma (ide_drive_t *drive)
1349  {
1350         ide_hwif_t *hwif        = HWIF(drive);
1351 @@ -340,18 +531,28 @@
1352  {
1353         ide_hwif_t *hwif        = HWIF(drive);
1354         u8 dma_altstat          = 0;
1355 +       unsigned long addr      = siimage_selreg(hwif, 1);
1356  
1357         /* return 1 if INTR asserted */
1358         if ((hwif->INB(hwif->dma_status) & 4) == 4)
1359                 return 1;
1360  
1361         /* return 1 if Device INTR asserted */
1362 -       pci_read_config_byte(hwif->pci_dev, SELREG(1), &dma_altstat);
1363 +       pci_read_config_byte(hwif->pci_dev, addr, &dma_altstat);
1364         if (dma_altstat & 8)
1365                 return 0;       //return 1;
1366         return 0;
1367  }
1368  
1369 +/**
1370 + *     siimage_mmio_ide_dma_count      -       DMA bytes done
1371 + *     @drive
1372 + *
1373 + *     If we are doing VDMA the CMD680 requires a little bit
1374 + *     of more careful handling and we have to read the counts
1375 + *     off ourselves. For non VDMA life is normal.
1376 + */
1377
1378  static int siimage_mmio_ide_dma_count (ide_drive_t *drive)
1379  {
1380  #ifdef SIIMAGE_VIRTUAL_DMAPIO
1381 @@ -359,9 +560,10 @@
1382         ide_hwif_t *hwif        = HWIF(drive);
1383         u32 count               = (rq->nr_sectors * SECTOR_SIZE);
1384         u32 rcount              = 0;
1385 +       unsigned long addr      = siimage_selreg(hwif, 0x1C);
1386  
1387 -       hwif->OUTL(count, SELADDR(0x1C));
1388 -       rcount = hwif->INL(SELADDR(0x1C));
1389 +       hwif->OUTL(count, addr);
1390 +       rcount = hwif->INL(addr);
1391  
1392         printk("\n%s: count = %d, rcount = %d, nr_sectors = %lu\n",
1393                 drive->name, count, rcount, rq->nr_sectors);
1394 @@ -370,13 +572,22 @@
1395         return __ide_dma_count(drive);
1396  }
1397  
1398 -/* returns 1 if dma irq issued, 0 otherwise */
1399 +/**
1400 + *     siimage_mmio_ide_dma_test_irq   -       check we caused an IRQ
1401 + *     @drive: drive we are testing
1402 + *
1403 + *     Check if we caused an IDE DMA interrupt. We may also have caused
1404 + *     SATA status interrupts, if so we clean them up and continue.
1405 + */
1406
1407  static int siimage_mmio_ide_dma_test_irq (ide_drive_t *drive)
1408  {
1409         ide_hwif_t *hwif        = HWIF(drive);
1410 +       unsigned long base      = (unsigned long)hwif->hwif_data;
1411 +       unsigned long addr      = siimage_selreg(hwif, 0x1);
1412  
1413         if (SATA_ERROR_REG) {
1414 -               u32 ext_stat = hwif->INL(HWIFADDR(0x10));
1415 +               u32 ext_stat = hwif->INL(base + 0x10);
1416                 u8 watchdog = 0;
1417                 if (ext_stat & ((hwif->channel) ? 0x40 : 0x10)) {
1418                         u32 sata_error = hwif->INL(SATA_ERROR_REG);
1419 @@ -403,7 +614,7 @@
1420                 return 1;
1421  
1422         /* return 1 if Device INTR asserted */
1423 -       if ((hwif->INB(SELADDR(1)) & 8) == 8)
1424 +       if ((hwif->INB(addr) & 8) == 8)
1425                 return 0;       //return 1;
1426  
1427         return 0;
1428 @@ -412,9 +623,6 @@
1429  static int siimage_mmio_ide_dma_verbose (ide_drive_t *drive)
1430  {
1431         int temp = __ide_dma_verbose(drive);
1432 -#if 0
1433 -       drive->using_dma = 0;
1434 -#endif
1435         return temp;
1436  }
1437  
1438 @@ -432,11 +640,12 @@
1439  {
1440         ide_hwif_t *hwif        = HWIF(drive);
1441         u32 stat_config         = 0;
1442 +       unsigned long addr      = siimage_selreg(hwif, 0);
1443  
1444         if (hwif->mmio) {
1445 -               stat_config = hwif->INL(SELADDR(0));
1446 +               stat_config = hwif->INL(addr);
1447         } else
1448 -               pci_read_config_dword(hwif->pci_dev, SELREG(0), &stat_config);
1449 +               pci_read_config_dword(hwif->pci_dev, addr, &stat_config);
1450  
1451         switch (state) {
1452                 case BUSSTATE_ON:
1453 @@ -458,6 +667,14 @@
1454         return 0;
1455  }
1456  
1457 +/**
1458 + *     siimage_reset_poll      -       wait for sata reset
1459 + *     @drive: drive we are resetting
1460 + *
1461 + *     Poll the SATA phy and see whether it has come back from the dead
1462 + *     yet.
1463 + */
1464
1465  static int siimage_reset_poll (ide_drive_t *drive)
1466  {
1467         if (SATA_STATUS_REG) {
1468 @@ -488,7 +705,8 @@
1469         if (drive->media != ide_disk)
1470                 return;
1471  
1472 -       if (HWIF(drive)->pci_dev->device == PCI_DEVICE_ID_SII_3112) {
1473 +       if (is_sata(HWIF(drive)))
1474 +       {
1475                 drive->special.b.set_geometry = 0;
1476                 drive->special.b.recalibrate = 0;
1477         }
1478 @@ -506,19 +724,21 @@
1479  {
1480         ide_hwif_t *hwif        = HWIF(drive);
1481         u8 reset                = 0;
1482 +       unsigned long addr      = siimage_selreg(hwif, 0);
1483  
1484         if (hwif->mmio) {
1485 -               reset = hwif->INB(SELADDR(0));
1486 -               hwif->OUTB((reset|0x03), SELADDR(0));
1487 +               reset = hwif->INB(addr);
1488 +               hwif->OUTB((reset|0x03), addr);
1489 +               /* FIXME:posting */
1490                 udelay(25);
1491 -               hwif->OUTB(reset, SELADDR(0));
1492 -               (void) hwif->INB(SELADDR(0));
1493 +               hwif->OUTB(reset, addr);
1494 +               (void) hwif->INB(addr);
1495         } else {
1496 -               pci_read_config_byte(hwif->pci_dev, SELREG(0), &reset);
1497 -               pci_write_config_byte(hwif->pci_dev, SELREG(0), reset|0x03);
1498 +               pci_read_config_byte(hwif->pci_dev, addr, &reset);
1499 +               pci_write_config_byte(hwif->pci_dev, addr, reset|0x03);
1500                 udelay(25);
1501 -               pci_write_config_byte(hwif->pci_dev, SELREG(0), reset);
1502 -               pci_read_config_byte(hwif->pci_dev, SELREG(0), &reset);
1503 +               pci_write_config_byte(hwif->pci_dev, addr, reset);
1504 +               pci_read_config_byte(hwif->pci_dev, addr, &reset);
1505         }
1506  
1507         if (SATA_STATUS_REG) {
1508 @@ -546,11 +766,11 @@
1509   
1510  static void proc_reports_siimage (struct pci_dev *dev, u8 clocking, const char *name)
1511  {
1512 -       if (dev->device == PCI_DEVICE_ID_SII_3112)
1513 +       if(pdev_is_sata(dev))
1514                 goto sata_skip;
1515  
1516         printk(KERN_INFO "%s: BASE CLOCK ", name);
1517 -       clocking &= ~0x03;
1518 +       clocking &= 0x03;
1519         switch(clocking) {
1520                 case 0x03: printk("DISABLED !\n"); break;
1521                 case 0x02: printk("== 2X PCI \n"); break;
1522 @@ -570,10 +790,20 @@
1523  #endif /* DISPLAY_SIIMAGE_TIMINGS && CONFIG_PROC_FS */
1524  }
1525  
1526 +/**
1527 + *     setup_mmio_siimage      -       switch an SI controller into MMIO
1528 + *     @dev: PCI device we are configuring
1529 + *     @name: device name
1530 + *
1531 + *     Attempt to put the device into mmio mode. There are some slight
1532 + *     complications here with certain systems where the mmio bar isnt
1533 + *     mapped so we have to be sure we can fall back to I/O.
1534 + */
1535
1536  static unsigned int setup_mmio_siimage (struct pci_dev *dev, const char *name)
1537  {
1538         unsigned long bar5      = pci_resource_start(dev, 5);
1539 -       unsigned long len5      = pci_resource_len(dev, 5);
1540 +       unsigned long barsize   = pci_resource_len(dev, 5);
1541         u8 tmpbyte      = 0;
1542         unsigned long addr;
1543         void *ioaddr;
1544 @@ -584,34 +814,37 @@
1545          *      spaces.
1546          */
1547          
1548 -       if(check_mem_region(bar5, len5)!=0)
1549 +       if(!request_mem_region(bar5, barsize, name))
1550         {
1551                 printk(KERN_WARNING "siimage: IDE controller MMIO ports not available.\n");
1552                 return 0;
1553         }
1554                 
1555 -       ioaddr = ioremap_nocache(bar5, len5);
1556 +       ioaddr = ioremap(bar5, barsize);
1557  
1558         if (ioaddr == NULL)
1559 +       {
1560 +               release_mem_region(bar5, barsize);
1561                 return 0;
1562 +       }
1563  
1564         pci_set_master(dev);
1565         pci_set_drvdata(dev, ioaddr);
1566         addr = (unsigned long) ioaddr;
1567  
1568 -       if (dev->device == PCI_DEVICE_ID_SII_3112) {
1569 -               writel(0, DEVADDR(0x148));
1570 -               writel(0, DEVADDR(0x1C8));
1571 +       if (pdev_is_sata(dev)) {
1572 +               writel(0, addr + 0x148);
1573 +               writel(0, addr + 0x1C8);
1574         }
1575  
1576 -       writeb(0, DEVADDR(0xB4));
1577 -       writeb(0, DEVADDR(0xF4));
1578 -       tmpbyte = readb(DEVADDR(0x4A));
1579 +       writeb(0, addr + 0xB4);
1580 +       writeb(0, addr + 0xF4);
1581 +       tmpbyte = readb(addr + 0x4A);
1582  
1583         switch(tmpbyte & 0x30) {
1584                 case 0x00:
1585                         /* In 100 MHz clocking, try and switch to 133 */
1586 -                       writeb(tmpbyte|0x10, DEVADDR(0x4A));
1587 +                       writeb(tmpbyte|0x10, addr + 0x4A);
1588                         break;
1589                 case 0x10:
1590                         /* On 133Mhz clocking */
1591 @@ -622,34 +855,43 @@
1592                 case 0x30:
1593                         /* Clocking is disabled */
1594                         /* 133 clock attempt to force it on */
1595 -                       writeb(tmpbyte & ~0x20, DEVADDR(0x4A));
1596 +                       writeb(tmpbyte & ~0x20, addr + 0x4A);
1597                         break;
1598         }
1599         
1600 -       writeb(0x72, DEVADDR(0xA1));
1601 -       writew(0x328A, DEVADDR(0xA2));
1602 -       writel(0x62DD62DD, DEVADDR(0xA4));
1603 -       writel(0x43924392, DEVADDR(0xA8));
1604 -       writel(0x40094009, DEVADDR(0xAC));
1605 -       writeb(0x72, DEVADDR(0xE1));
1606 -       writew(0x328A, DEVADDR(0xE2));
1607 -       writel(0x62DD62DD, DEVADDR(0xE4));
1608 -       writel(0x43924392, DEVADDR(0xE8));
1609 -       writel(0x40094009, DEVADDR(0xEC));
1610 -
1611 -       if (dev->device == PCI_DEVICE_ID_SII_3112) {
1612 -               writel(0xFFFF0000, DEVADDR(0x108));
1613 -               writel(0xFFFF0000, DEVADDR(0x188));
1614 -               writel(0x00680000, DEVADDR(0x148));
1615 -               writel(0x00680000, DEVADDR(0x1C8));
1616 +       writeb(      0x72, addr + 0xA1);
1617 +       writew(    0x328A, addr + 0xA2);
1618 +       writel(0x62DD62DD, addr + 0xA4);
1619 +       writel(0x43924392, addr + 0xA8);
1620 +       writel(0x40094009, addr + 0xAC);
1621 +       writeb(      0x72, addr + 0xE1);
1622 +       writew(    0x328A, addr + 0xE2);
1623 +       writel(0x62DD62DD, addr + 0xE4);
1624 +       writel(0x43924392, addr + 0xE8);
1625 +       writel(0x40094009, addr + 0xEC);
1626 +
1627 +       if (pdev_is_sata(dev)) {
1628 +               writel(0xFFFF0000, addr + 0x108);
1629 +               writel(0xFFFF0000, addr + 0x188);
1630 +               writel(0x00680000, addr + 0x148);
1631 +               writel(0x00680000, addr + 0x1C8);
1632         }
1633  
1634 -       tmpbyte = readb(DEVADDR(0x4A));
1635 +       tmpbyte = readb(addr + 0x4A);
1636  
1637 -       proc_reports_siimage(dev, (tmpbyte>>=4), name);
1638 +       proc_reports_siimage(dev, (tmpbyte>>4), name);
1639         return 1;
1640  }
1641  
1642 +/**
1643 + *     init_chipset_siimage    -       set up an SI device
1644 + *     @dev: PCI device
1645 + *     @name: device name
1646 + *
1647 + *     Perform the initial PCI set up for this device. Attempt to switch
1648 + *     to 133MHz clocking if the system isn't already set up to do it.
1649 + */
1650 +
1651  static unsigned int __init init_chipset_siimage (struct pci_dev *dev, const char *name)
1652  {
1653         u32 class_rev   = 0;
1654 @@ -686,115 +928,134 @@
1655                         break;
1656         }
1657  
1658 -       pci_read_config_byte(dev, 0x8A, &tmpbyte);
1659 -       pci_write_config_byte(dev, 0xA1, 0x72);
1660 -       pci_write_config_word(dev, 0xA2, 0x328A);
1661 +       pci_read_config_byte(dev,   0x8A, &tmpbyte);
1662 +
1663 +       pci_write_config_byte(dev,  0xA1, 0x72);
1664 +       pci_write_config_word(dev,  0xA2, 0x328A);
1665         pci_write_config_dword(dev, 0xA4, 0x62DD62DD);
1666         pci_write_config_dword(dev, 0xA8, 0x43924392);
1667         pci_write_config_dword(dev, 0xAC, 0x40094009);
1668 -       pci_write_config_byte(dev, 0xB1, 0x72);
1669 -       pci_write_config_word(dev, 0xB2, 0x328A);
1670 +       pci_write_config_byte(dev,  0xB1, 0x72);
1671 +       pci_write_config_word(dev,  0xB2, 0x328A);
1672         pci_write_config_dword(dev, 0xB4, 0x62DD62DD);
1673         pci_write_config_dword(dev, 0xB8, 0x43924392);
1674         pci_write_config_dword(dev, 0xBC, 0x40094009);
1675  
1676 -       pci_read_config_byte(dev, 0x8A, &tmpbyte);
1677 -       proc_reports_siimage(dev, (tmpbyte>>=4), name);
1678 +       proc_reports_siimage(dev, (tmpbyte>>4), name);
1679         return 0;
1680  }
1681  
1682 +/**
1683 + *     init_mmio_iops_siimage  -       set up the iops for MMIO
1684 + *     @hwif: interface to set up
1685 + *
1686 + *     The basic setup here is fairly simple, we can use standard MMIO
1687 + *     operations. However we do have to set the taskfile register offsets
1688 + *     by hand as there isnt a standard defined layout for them this
1689 + *     time.
1690 + *
1691 + *     The hardware supports buffered taskfiles and also some rather nice
1692 + *     extended PRD tables. Unfortunately right now we don't.
1693 + */
1694
1695  static void __init init_mmio_iops_siimage (ide_hwif_t *hwif)
1696  {
1697         struct pci_dev *dev     = hwif->pci_dev;
1698 -       unsigned long addr      = (unsigned long) pci_get_drvdata(hwif->pci_dev);
1699 +       void *addr              = pci_get_drvdata(dev);
1700         u8 ch                   = hwif->channel;
1701 -//     u16 i                   = 0;
1702 -       hw_regs_t hw;
1703 +       hw_regs_t               hw;
1704 +       unsigned long           base;
1705 +
1706 +       /*
1707 +        *      Fill in the basic HWIF bits
1708 +        */
1709  
1710         default_hwif_mmiops(hwif);
1711 +       hwif->hwif_data                 = addr;
1712 +
1713 +       /*
1714 +        *      Now set up the hw. We have to do this ourselves as
1715 +        *      the MMIO layout isnt the same as the the standard port
1716 +        *      based I/O
1717 +        */
1718 +        
1719         memset(&hw, 0, sizeof(hw_regs_t));
1720 +       hw.priv                         = addr;
1721  
1722 -#if 1
1723 -#ifdef SIIMAGE_BUFFERED_TASKFILE
1724 -       hw.io_ports[IDE_DATA_OFFSET]    = DEVADDR((ch) ? 0xD0 : 0x90);
1725 -       hw.io_ports[IDE_ERROR_OFFSET]   = DEVADDR((ch) ? 0xD1 : 0x91);
1726 -       hw.io_ports[IDE_NSECTOR_OFFSET] = DEVADDR((ch) ? 0xD2 : 0x92);
1727 -       hw.io_ports[IDE_SECTOR_OFFSET]  = DEVADDR((ch) ? 0xD3 : 0x93);
1728 -       hw.io_ports[IDE_LCYL_OFFSET]    = DEVADDR((ch) ? 0xD4 : 0x94);
1729 -       hw.io_ports[IDE_HCYL_OFFSET]    = DEVADDR((ch) ? 0xD5 : 0x95);
1730 -       hw.io_ports[IDE_SELECT_OFFSET]  = DEVADDR((ch) ? 0xD6 : 0x96);
1731 -       hw.io_ports[IDE_STATUS_OFFSET]  = DEVADDR((ch) ? 0xD7 : 0x97);
1732 -       hw.io_ports[IDE_CONTROL_OFFSET] = DEVADDR((ch) ? 0xDA : 0x9A);
1733 -#else /* ! SIIMAGE_BUFFERED_TASKFILE */
1734 -       hw.io_ports[IDE_DATA_OFFSET]    = DEVADDR((ch) ? 0xC0 : 0x80);
1735 -       hw.io_ports[IDE_ERROR_OFFSET]   = DEVADDR((ch) ? 0xC1 : 0x81);
1736 -       hw.io_ports[IDE_NSECTOR_OFFSET] = DEVADDR((ch) ? 0xC2 : 0x82);
1737 -       hw.io_ports[IDE_SECTOR_OFFSET]  = DEVADDR((ch) ? 0xC3 : 0x83);
1738 -       hw.io_ports[IDE_LCYL_OFFSET]    = DEVADDR((ch) ? 0xC4 : 0x84);
1739 -       hw.io_ports[IDE_HCYL_OFFSET]    = DEVADDR((ch) ? 0xC5 : 0x85);
1740 -       hw.io_ports[IDE_SELECT_OFFSET]  = DEVADDR((ch) ? 0xC6 : 0x86);
1741 -       hw.io_ports[IDE_STATUS_OFFSET]  = DEVADDR((ch) ? 0xC7 : 0x87);
1742 -       hw.io_ports[IDE_CONTROL_OFFSET] = DEVADDR((ch) ? 0xCA : 0x8A);
1743 -#endif /* SIIMAGE_BUFFERED_TASKFILE */
1744 -#else
1745 -#ifdef SIIMAGE_BUFFERED_TASKFILE
1746 -       for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
1747 -               hw.io_ports[i] = DEVADDR((ch) ? 0xD0 : 0x90)|(i);
1748 -       hw.io_ports[IDE_CONTROL_OFFSET] = DEVADDR((ch) ? 0xDA : 0x9A);
1749 -#else /* ! SIIMAGE_BUFFERED_TASKFILE */
1750 -       for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
1751 -               hw.io_ports[i] = DEVADDR((ch) ? 0xC0 : 0x80)|(i);
1752 -       hw.io_ports[IDE_CONTROL_OFFSET] = DEVADDR((ch) ? 0xCA : 0x8A);
1753 -#endif /* SIIMAGE_BUFFERED_TASKFILE */
1754 -#endif
1755 +       base                            = (unsigned long)addr;
1756 +       if(ch)
1757 +               base += 0xC0;
1758 +       else
1759 +               base += 0x80;
1760  
1761 -#if 0
1762 -       printk(KERN_DEBUG "%s: ", hwif->name);
1763 -       for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++)
1764 -               printk("0x%08x ", DEVADDR((ch) ? 0xC0 : 0x80)|(i));
1765 -       printk("0x%08x ", DEVADDR((ch) ? 0xCA : 0x8A)|(i));
1766 -#endif
1767 +       /*
1768 +        *      The buffered task file doesn't have status/control
1769 +        *      so we can't currently use it sanely since we want to
1770 +        *      use LBA48 mode.
1771 +        */     
1772 +//     base += 0x10;
1773 +//      hwif->addressing = 1;
1774 +
1775 +       hw.io_ports[IDE_DATA_OFFSET]    = base;
1776 +       hw.io_ports[IDE_ERROR_OFFSET]   = base + 1;
1777 +       hw.io_ports[IDE_NSECTOR_OFFSET] = base + 2;
1778 +       hw.io_ports[IDE_SECTOR_OFFSET]  = base + 3;
1779 +       hw.io_ports[IDE_LCYL_OFFSET]    = base + 4;
1780 +       hw.io_ports[IDE_HCYL_OFFSET]    = base + 5;
1781 +       hw.io_ports[IDE_SELECT_OFFSET]  = base + 6;
1782 +       hw.io_ports[IDE_STATUS_OFFSET]  = base + 7;
1783 +       hw.io_ports[IDE_CONTROL_OFFSET] = base + 10;
1784  
1785         hw.io_ports[IDE_IRQ_OFFSET]     = 0;
1786  
1787 -        if (dev->device == PCI_DEVICE_ID_SII_3112) {
1788 -               hw.sata_scr[SATA_STATUS_OFFSET] = DEVADDR((ch) ? 0x184 : 0x104);
1789 -               hw.sata_scr[SATA_ERROR_OFFSET]  = DEVADDR((ch) ? 0x188 : 0x108);
1790 -               hw.sata_scr[SATA_CONTROL_OFFSET]= DEVADDR((ch) ? 0x180 : 0x100);
1791 -               hw.sata_misc[SATA_MISC_OFFSET]  = DEVADDR((ch) ? 0x1C0 : 0x140);
1792 -               hw.sata_misc[SATA_PHY_OFFSET]   = DEVADDR((ch) ? 0x1C4 : 0x144);
1793 -               hw.sata_misc[SATA_IEN_OFFSET]   = DEVADDR((ch) ? 0x1C8 : 0x148);
1794 +        if (pdev_is_sata(dev)) {
1795 +               base = (unsigned long) addr;
1796 +               if(ch)
1797 +                       base += 0x80;
1798 +               hw.sata_scr[SATA_STATUS_OFFSET] = base + 0x104;
1799 +               hw.sata_scr[SATA_ERROR_OFFSET]  = base + 0x108;
1800 +               hw.sata_scr[SATA_CONTROL_OFFSET]= base + 0x100;
1801 +               hw.sata_misc[SATA_MISC_OFFSET]  = base + 0x140;
1802 +               hw.sata_misc[SATA_PHY_OFFSET]   = base + 0x144;
1803 +               hw.sata_misc[SATA_IEN_OFFSET]   = base + 0x148;
1804         }
1805  
1806 -       hw.priv                         = (void *) addr;
1807 -//     hw.priv                         = pci_get_drvdata(hwif->pci_dev);
1808         hw.irq                          = hwif->pci_dev->irq;
1809  
1810         memcpy(&hwif->hw, &hw, sizeof(hw));
1811         memcpy(hwif->io_ports, hwif->hw.io_ports, sizeof(hwif->hw.io_ports));
1812  
1813 -       if (hwif->pci_dev->device == PCI_DEVICE_ID_SII_3112) {
1814 +       if (is_sata(hwif)) {
1815                 memcpy(hwif->sata_scr, hwif->hw.sata_scr, sizeof(hwif->hw.sata_scr));
1816                 memcpy(hwif->sata_misc, hwif->hw.sata_misc, sizeof(hwif->hw.sata_misc));
1817         }
1818  
1819 -#ifdef SIIMAGE_BUFFERED_TASKFILE
1820 -        hwif->addressing = 1;
1821 -#endif /* SIIMAGE_BUFFERED_TASKFILE */
1822         hwif->irq                       = hw.irq;
1823 -       hwif->hwif_data                 = pci_get_drvdata(hwif->pci_dev);
1824 +
1825 +               base = (unsigned long) addr;
1826  
1827  #ifdef SIIMAGE_LARGE_DMA
1828 -       hwif->dma_base                  = DEVADDR((ch) ? 0x18 : 0x10);
1829 -       hwif->dma_base2                 = DEVADDR((ch) ? 0x08 : 0x00);
1830 -       hwif->dma_prdtable              = (hwif->dma_base2 + 4);
1831 +/* Watch the brackets - even Ken and Dennis get some language design wrong */
1832 +       hwif->dma_base                  = base + (ch ? 0x18 : 0x10);
1833 +       hwif->dma_base2                 = base + (ch ? 0x08 : 0x00);
1834 +       hwif->dma_prdtable              = hwif->dma_base2 + 4;
1835  #else /* ! SIIMAGE_LARGE_DMA */
1836 -       hwif->dma_base                  = DEVADDR((ch) ? 0x08 : 0x00);
1837 -       hwif->dma_base2                 = DEVADDR((ch) ? 0x18 : 0x10);
1838 +       hwif->dma_base                  = base + (ch ? 0x08 : 0x00);
1839 +       hwif->dma_base2                 = base + (ch ? 0x18 : 0x10);
1840  #endif /* SIIMAGE_LARGE_DMA */
1841         hwif->mmio                      = 2;
1842  }
1843  
1844 +/**
1845 + *     init_iops_siimage       -       set up iops
1846 + *     @hwif: interface to set up
1847 + *
1848 + *     Do the basic setup for the SIIMAGE hardware interface
1849 + *     and then do the MMIO setup if we can. This is the first
1850 + *     look in we get for setting up the hwif so that we
1851 + *     can get the iops right before using them.
1852 + */
1853
1854  static void __init init_iops_siimage (ide_hwif_t *hwif)
1855  {
1856         struct pci_dev *dev     = hwif->pci_dev;
1857 @@ -802,27 +1063,47 @@
1858  
1859         pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_rev);
1860         class_rev &= 0xff;
1861 +       
1862 +       hwif->hwif_data = 0;
1863  
1864         hwif->rqsize = 128;
1865 -       if ((dev->device == PCI_DEVICE_ID_SII_3112) && (!(class_rev)))
1866 -               hwif->rqsize = 16;
1867 +       if (is_sata(hwif))
1868 +               hwif->rqsize = 15;
1869  
1870         if (pci_get_drvdata(dev) == NULL)
1871                 return;
1872         init_mmio_iops_siimage(hwif);
1873  }
1874  
1875 +/**
1876 + *     ata66_siimage   -       check for 80 pin cable
1877 + *     @hwif: interface to check
1878 + *
1879 + *     Check for the presence of an ATA66 capable cable on the
1880 + *     interface.
1881 + */
1882
1883  static unsigned int __init ata66_siimage (ide_hwif_t *hwif)
1884  {
1885 +       unsigned long addr = siimage_selreg(hwif, 0);
1886         if (pci_get_drvdata(hwif->pci_dev) == NULL) {
1887                 u8 ata66 = 0;
1888 -               pci_read_config_byte(hwif->pci_dev, SELREG(0), &ata66);
1889 +               pci_read_config_byte(hwif->pci_dev, addr, &ata66);
1890                 return (ata66 & 0x01) ? 1 : 0;
1891         }
1892  
1893 -       return (hwif->INB(SELADDR(0)) & 0x01) ? 1 : 0;
1894 +       return (hwif->INB(addr) & 0x01) ? 1 : 0;
1895  }
1896  
1897 +/**
1898 + *     init_hwif_siimage       -       set up hwif structs
1899 + *     @hwif: interface to set up
1900 + *
1901 + *     We do the basic set up of the interface structure. The SIIMAGE
1902 + *     requires several custom handlers so we override the default
1903 + *     ide DMA handlers appropriately
1904 + */
1905
1906  static void __init init_hwif_siimage (ide_hwif_t *hwif)
1907  {
1908         hwif->autodma = 0;
1909 @@ -833,7 +1114,7 @@
1910         hwif->reset_poll = &siimage_reset_poll;
1911         hwif->pre_reset = &siimage_pre_reset;
1912  
1913 -       if(hwif->pci_dev->device == PCI_DEVICE_ID_SII_3112)
1914 +       if(is_sata(hwif))
1915                 hwif->busproc   = &siimage_busproc;
1916  
1917         if (!hwif->dma_base) {
1918 @@ -846,7 +1127,7 @@
1919         hwif->mwdma_mask = 0x07;
1920         hwif->swdma_mask = 0x07;
1921  
1922 -       if (hwif->pci_dev->device != PCI_DEVICE_ID_SII_3112)
1923 +       if (!is_sata(hwif))
1924                 hwif->atapi_dma = 1;
1925  
1926         hwif->ide_dma_check = &siimage_config_drive_for_dma;
1927 @@ -860,12 +1141,26 @@
1928         } else {
1929                 hwif->ide_dma_test_irq = & siimage_io_ide_dma_test_irq;
1930         }
1931 -       if (!noautodma)
1932 -               hwif->autodma = 1;
1933 +       
1934 +       /*
1935 +        *      The BIOS often doesn't set up DMA on this controller
1936 +        *      so we always do it.
1937 +        */
1938 +
1939 +       hwif->autodma = 1;
1940         hwif->drives[0].autodma = hwif->autodma;
1941         hwif->drives[1].autodma = hwif->autodma;
1942  }
1943  
1944 +/**
1945 + *     init_dma_siimage        -       set up IDE DMA
1946 + *     @hwif: interface
1947 + *     @dmabase: DMA base address to use
1948 + *     
1949 + *     For the SI chips this requires no special set up so we can just
1950 + *     let the IDE DMA core do the usual work.
1951 + */
1952
1953  static void __init init_dma_siimage (ide_hwif_t *hwif, unsigned long dmabase)
1954  {
1955         ide_setup_dma(hwif, dmabase, 8);
1956 @@ -874,6 +1169,15 @@
1957  extern void ide_setup_pci_device(struct pci_dev *, ide_pci_device_t *);
1958  
1959  
1960 +/**
1961 + *     siimage_init_one        -       pci layer discovery entry
1962 + *     @dev: PCI device
1963 + *     @id: ident table entry
1964 + *
1965 + *     Called by the PCI code when it finds an SI680 or SI3112 controller.
1966 + *     We then use the IDE PCI generic helper to do most of the work.
1967 + */
1968
1969  static int __devinit siimage_init_one(struct pci_dev *dev, const struct pci_device_id *id)
1970  {
1971         ide_pci_device_t *d = &siimage_chipsets[id->driver_data];
1972 @@ -887,6 +1191,7 @@
1973  static struct pci_device_id siimage_pci_tbl[] __devinitdata = {
1974         { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680,  PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1975         { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_3112, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
1976 +       { PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_1210SA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
1977         { 0, },
1978  };
1979  
1980 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/siimage.h linux.21-ac4/drivers/ide/pci/siimage.h
1981 --- linux.vanilla/drivers/ide/pci/siimage.h     2003-06-14 00:11:31.000000000 +0100
1982 +++ linux.21-ac4/drivers/ide/pci/siimage.h      2003-06-27 17:13:09.000000000 +0100
1983 @@ -13,12 +13,6 @@
1984  #undef SIIMAGE_BUFFERED_TASKFILE
1985  #undef SIIMAGE_LARGE_DMA
1986  
1987 -#if 0
1988 -typedef struct ide_io_ops_s siimage_iops {
1989 -
1990 -}
1991 -#endif
1992 -
1993  #define SII_DEBUG 0
1994  
1995  #if SII_DEBUG
1996 @@ -27,12 +21,6 @@
1997  #define siiprintk(x...)
1998  #endif
1999  
2000 -#define ADJREG(B,R)    ((B)|(R)|((hwif->channel)<<(4+(2*(!!hwif->mmio)))))
2001 -#define SELREG(R)      ADJREG((0xA0),(R))
2002 -#define SELADDR(R)     ((((unsigned long)hwif->hwif_data)*(!!hwif->mmio))|SELREG((R)))
2003 -#define HWIFADDR(R)    ((((unsigned long)hwif->hwif_data)*(!!hwif->mmio))|(R))
2004 -#define DEVADDR(R)     (((unsigned long) pci_get_drvdata(dev))|(R))
2005 -
2006  
2007  #if defined(DISPLAY_SIIMAGE_TIMINGS) && defined(CONFIG_PROC_FS)
2008  #include <linux/stat.h>
2009 @@ -85,6 +73,19 @@
2010                 .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
2011                 .bootable       = ON_BOARD,
2012                 .extra          = 0,
2013 +       },{     /* 2 */
2014 +               .vendor         = PCI_VENDOR_ID_CMD,
2015 +               .device         = PCI_DEVICE_ID_SII_1210SA,
2016 +               .name           = "Adaptec AAR-1210SA",
2017 +               .init_chipset   = init_chipset_siimage,
2018 +               .init_iops      = init_iops_siimage,
2019 +               .init_hwif      = init_hwif_siimage,
2020 +               .init_dma       = init_dma_siimage,
2021 +               .channels       = 2,
2022 +               .autodma        = AUTODMA,
2023 +               .enablebits     = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
2024 +               .bootable       = ON_BOARD,
2025 +               .extra          = 0,
2026         },{
2027                 .vendor         = 0,
2028                 .device         = 0,
2029 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/pci/sis5513.c linux.21-ac4/drivers/ide/pci/sis5513.c
2030 --- linux.vanilla/drivers/ide/pci/sis5513.c     2003-06-14 00:11:31.000000000 +0100
2031 +++ linux.21-ac4/drivers/ide/pci/sis5513.c      2003-06-22 13:51:39.000000000 +0100
2032 @@ -1,8 +1,9 @@
2033  /*
2034 - * linux/drivers/ide/pci/sis5513.c             Version 0.14ac  Sept 11, 2002
2035 + * linux/drivers/ide/pci/sis5513.c     Version 0.16ac+vp       Jun 18, 2003
2036   *
2037   * Copyright (C) 1999-2000     Andre Hedrick <andre@linux-ide.org>
2038   * Copyright (C) 2002          Lionel Bouton <Lionel.Bouton@inet6.fr>, Maintainer
2039 + * Copyright (C) 2003          Vojtech Pavlik <vojtech@suse.cz>
2040   * May be copied or modified under the terms of the GNU General Public License
2041   *
2042   *
2043 @@ -14,31 +15,33 @@
2044   *                       for checking code correctness, providing patches.
2045   *
2046   *
2047 - * Original tests and design on the SiS620/5513 chipset.
2048 - * ATA100 tests and design on the SiS735/5513 chipset.
2049 + * Original tests and design on the SiS620 chipset.
2050 + * ATA100 tests and design on the SiS735 chipset.
2051   * ATA16/33 support from specs
2052   * ATA133 support for SiS961/962 by L.C. Chang <lcchang@sis.com.tw>
2053 + * ATA133 961/962/963 fixes by Vojtech Pavlik <vojtech@suse.cz>
2054   *
2055   * Documentation:
2056 - *     SiS chipset documentation available under NDA to companies not
2057 - *     individuals only.
2058 + *     SiS chipset documentation available under NDA to companies only
2059 + *      (not to individuals).
2060   */
2061  
2062  /*
2063 - * Notes/Special cases:
2064 - * - SiS5513 derivatives usually have the same PCI IDE register layout when
2065 - *  supporting the same UDMA modes.
2066 - * - There are exceptions :
2067 - *  . SiS730 and SiS550 use the same layout than ATA_66 chipsets but support
2068 - *   ATA_100
2069 - *  . ATA_133 capable chipsets mark a shift in SiS chipset designs : previously
2070 - *   south and northbridge were integrated, making IDE (a southbridge function)
2071 - *   capabilities easily deduced from the northbridge PCI id. With ATA_133,
2072 - *   chipsets started to be split in the usual north/south bridges chips
2073 - *   -> the driver needs to detect the correct southbridge when faced to newest
2074 - *   northbridges.
2075 - *  . On ATA133 capable chipsets when bit 30 of dword at 0x54 is 1 the
2076 - *   configuration space is moved from 0x40 to 0x70.
2077 + * The original SiS5513 comes from a SiS5511/55112/5513 chipset. The original
2078 + * SiS5513 was also used in the SiS5596/5513 chipset. Thus if we see a SiS5511
2079 + * or SiS5596, we can assume we see the first MWDMA-16 capable SiS5513 chip.
2080 + *
2081 + * Later SiS chipsets integrated the 5513 functionality into the NorthBridge,
2082 + * starting with SiS5571 and up to SiS745. The PCI ID didn't change, though. We
2083 + * can figure out that we have a more modern and more capable 5513 by looking
2084 + * for the respective NorthBridge IDs.
2085 + *
2086 + * Even later (96x family) SiS chipsets use the MuTIOL link and place the 5513
2087 + * into the SouthBrige. Here we cannot rely on looking up the NorthBridge PCI
2088 + * ID, while the now ATA-133 capable 5513 still has the same PCI ID.
2089 + * Fortunately the 5513 can be 'unmasked' by fiddling with some config space
2090 + * bits, changing its device id to the true one - 5517 for 961 and 5518 for
2091 + * 962/963.
2092   */
2093  
2094  #include <linux/config.h>
2095 @@ -57,94 +60,23 @@
2096  #include <linux/init.h>
2097  #include <linux/ide.h>
2098  
2099 -#include <asm/io.h>
2100  #include <asm/irq.h>
2101  
2102 +#include "ide-timing.h"
2103  #include "ide_modes.h"
2104  #include "sis5513.h"
2105  
2106 -/* When DEBUG is defined it outputs initial PCI config register
2107 -   values and changes made to them by the driver */
2108 -// #define DEBUG
2109 -/* When BROKEN_LEVEL is defined it limits the DMA mode
2110 -   at boot time to its value */
2111 -// #define BROKEN_LEVEL XFER_SW_DMA_0
2112 -
2113 -/* Miscellaneous flags */
2114 -#define SIS5513_LATENCY                0x01
2115 -
2116  /* registers layout and init values are chipset family dependant */
2117 -/* 1/ define families */
2118 -#define ATA_00         0x00
2119 +
2120  #define ATA_16         0x01
2121  #define ATA_33         0x02
2122  #define ATA_66         0x03
2123 -#define ATA_100a       0x04 // SiS730 is ATA100 with ATA66 layout
2124 +#define ATA_100a       0x04 // SiS730/SiS550 is ATA100 with ATA66 layout
2125  #define ATA_100                0x05
2126  #define ATA_133a       0x06 // SiS961b with 133 support
2127 -#define ATA_133                0x07 // SiS962
2128 -/* 2/ variable holding the controller chipset family value */
2129 -static u8 chipset_family;
2130 -
2131 -
2132 -/*
2133 - * Debug code: following IDE config registers' changes
2134 - */
2135 -#ifdef DEBUG
2136 -/* Copy of IDE Config registers fewer will be used
2137 - * Some odd chipsets hang if unused registers are accessed
2138 - * -> We only access them in #DEBUG code (then we'll see if SiS did
2139 - * it right from day one) */
2140 -static u8 ide_regs_copy[0xff];
2141 -
2142 -/* Read config registers, print differences from previous read */
2143 -static void sis5513_load_verify_registers(struct pci_dev* dev, char* info) {
2144 -       int i;
2145 -       u8 reg_val;
2146 -       u8 changed=0;
2147 -
2148 -       printk("SIS5513: %s, changed registers:\n", info);
2149 -       for(i=0; i<=0xff; i++) {
2150 -               pci_read_config_byte(dev, i, &reg_val);
2151 -               if (reg_val != ide_regs_copy[i]) {
2152 -                       printk("%02x: %02x -> %02x\n",
2153 -                              i, ide_regs_copy[i], reg_val);
2154 -                       ide_regs_copy[i]=reg_val;
2155 -                       changed=1;
2156 -               }
2157 -       }
2158 -
2159 -       if (!changed) {
2160 -               printk("none\n");
2161 -       }
2162 -}
2163 -
2164 -/* Load config registers, no printing */
2165 -static void sis5513_load_registers(struct pci_dev* dev) {
2166 -       int i;
2167 -
2168 -       for(i=0; i<=0xff; i++) {
2169 -               pci_read_config_byte(dev, i, &(ide_regs_copy[i]));
2170 -       }
2171 -}
2172 -
2173 -/* Print config space registers a la "lspci -vxxx" */
2174 -static void sis5513_print_registers(struct pci_dev* dev, char* marker) {
2175 -       int i,j;
2176 -
2177 -       sis5513_load_registers(dev);
2178 -       printk("SIS5513 %s\n", marker);
2179 -
2180 -       for(i=0; i<=0xf; i++) {
2181 -               printk("SIS5513 dump: %d" "0:", i);
2182 -               for(j=0; j<=0xf; j++) {
2183 -                       printk(" %02x", ide_regs_copy[(i<<16)+j]);
2184 -               }
2185 -               printk("\n");
2186 -       }
2187 -}
2188 -#endif
2189 +#define ATA_133                0x07 // SiS962/963
2190  
2191 +static u8 chipset_family;
2192  
2193  /*
2194   * Devices supported
2195 @@ -155,41 +87,38 @@
2196         u8 chipset_family;
2197         u8 flags;
2198  } SiSHostChipInfo[] = {
2199 -       { "SiS752",     PCI_DEVICE_ID_SI_752,   ATA_133,        0 },
2200 -       { "SiS751",     PCI_DEVICE_ID_SI_751,   ATA_133,        0 },
2201 -       { "SiS750",     PCI_DEVICE_ID_SI_750,   ATA_133,        0 },
2202 -       { "SiS748",     PCI_DEVICE_ID_SI_748,   ATA_133,        0 },
2203 -       { "SiS746",     PCI_DEVICE_ID_SI_746,   ATA_133,        0 },
2204 -       { "SiS745",     PCI_DEVICE_ID_SI_745,   ATA_133,        0 },
2205 -       { "SiS740",     PCI_DEVICE_ID_SI_740,   ATA_100,        0 },
2206 -       { "SiS735",     PCI_DEVICE_ID_SI_735,   ATA_100,        SIS5513_LATENCY },
2207 -       { "SiS730",     PCI_DEVICE_ID_SI_730,   ATA_100a,       SIS5513_LATENCY },
2208 -       { "SiS652",     PCI_DEVICE_ID_SI_652,   ATA_133,        0 },
2209 -       { "SiS651",     PCI_DEVICE_ID_SI_651,   ATA_133,        0 },
2210 -       { "SiS650",     PCI_DEVICE_ID_SI_650,   ATA_133,        0 },
2211 -       { "SiS648",     PCI_DEVICE_ID_SI_648,   ATA_133,        0 },
2212 -       { "SiS646",     PCI_DEVICE_ID_SI_646,   ATA_133,        0 },
2213 -       { "SiS645",     PCI_DEVICE_ID_SI_645,   ATA_133,        0 },
2214 -       { "SiS635",     PCI_DEVICE_ID_SI_635,   ATA_100,        SIS5513_LATENCY },
2215 -       { "SiS640",     PCI_DEVICE_ID_SI_640,   ATA_66,         SIS5513_LATENCY },
2216 -       { "SiS630",     PCI_DEVICE_ID_SI_630,   ATA_66,         SIS5513_LATENCY },
2217 -       { "SiS620",     PCI_DEVICE_ID_SI_620,   ATA_66,         SIS5513_LATENCY },
2218 -       { "SiS550",     PCI_DEVICE_ID_SI_550,   ATA_100a,       0},
2219 -       { "SiS540",     PCI_DEVICE_ID_SI_540,   ATA_66,         0},
2220 -       { "SiS530",     PCI_DEVICE_ID_SI_530,   ATA_66,         0},
2221 -       { "SiS5600",    PCI_DEVICE_ID_SI_5600,  ATA_33,         0},
2222 -       { "SiS5598",    PCI_DEVICE_ID_SI_5598,  ATA_33,         0},
2223 -       { "SiS5597",    PCI_DEVICE_ID_SI_5597,  ATA_33,         0},
2224 -       { "SiS5591",    PCI_DEVICE_ID_SI_5591,  ATA_33,         0},
2225 -       { "SiS5513",    PCI_DEVICE_ID_SI_5513,  ATA_16,         0},
2226 -       { "SiS5511",    PCI_DEVICE_ID_SI_5511,  ATA_16,         0},
2227 +       { "SiS745",     PCI_DEVICE_ID_SI_745,   ATA_100  },
2228 +       { "SiS735",     PCI_DEVICE_ID_SI_735,   ATA_100  },
2229 +       { "SiS733",     PCI_DEVICE_ID_SI_733,   ATA_100  },
2230 +       { "SiS635",     PCI_DEVICE_ID_SI_635,   ATA_100  },
2231 +       { "SiS633",     PCI_DEVICE_ID_SI_633,   ATA_100  },
2232 +
2233 +       { "SiS730",     PCI_DEVICE_ID_SI_730,   ATA_100a },
2234 +       { "SiS550",     PCI_DEVICE_ID_SI_550,   ATA_100a },
2235 +
2236 +       { "SiS640",     PCI_DEVICE_ID_SI_640,   ATA_66   },
2237 +       { "SiS630",     PCI_DEVICE_ID_SI_630,   ATA_66   },
2238 +       { "SiS620",     PCI_DEVICE_ID_SI_620,   ATA_66   },
2239 +       { "SiS540",     PCI_DEVICE_ID_SI_540,   ATA_66   },
2240 +       { "SiS530",     PCI_DEVICE_ID_SI_530,   ATA_66   },
2241 +
2242 +       { "SiS5600",    PCI_DEVICE_ID_SI_5600,  ATA_33   },
2243 +       { "SiS5598",    PCI_DEVICE_ID_SI_5598,  ATA_33   },
2244 +       { "SiS5597",    PCI_DEVICE_ID_SI_5597,  ATA_33   },
2245 +       { "SiS5591/2",  PCI_DEVICE_ID_SI_5591,  ATA_33   },
2246 +       { "SiS5582",    PCI_DEVICE_ID_SI_5582,  ATA_33   },
2247 +       { "SiS5581",    PCI_DEVICE_ID_SI_5581,  ATA_33   },
2248 +
2249 +       { "SiS5596",    PCI_DEVICE_ID_SI_5596,  ATA_16   },
2250 +       { "SiS5571",    PCI_DEVICE_ID_SI_5571,  ATA_16   },
2251 +       { "SiS551x",    PCI_DEVICE_ID_SI_5511,  ATA_16   },
2252  };
2253  
2254  /* Cycle time bits and values vary across chip dma capabilities
2255     These three arrays hold the register layout and the values to set.
2256     Indexed by chipset_family and (dma_mode - XFER_UDMA_0) */
2257  
2258 -/* {ATA_00, ATA_16, ATA_33, ATA_66, ATA_100a, ATA_100, ATA_133} */
2259 +/* {0, ATA_16, ATA_33, ATA_66, ATA_100a, ATA_100, ATA_133} */
2260  static u8 cycle_time_offset[] = {0,0,5,4,4,0,0};
2261  static u8 cycle_time_range[] = {0,0,2,3,3,4,4};
2262  static u8 cycle_time_value[][XFER_UDMA_6 - XFER_UDMA_0 + 1] = {
2263 @@ -248,8 +177,6 @@
2264         {40,12,4,12,5,34,12,5},
2265  };
2266  
2267 -static struct pci_dev *host_dev = NULL;
2268 -
2269  /*
2270   * Printing configuration
2271   */
2272 @@ -257,8 +184,8 @@
2273  static char* chipset_capability[] = {
2274         "ATA", "ATA 16",
2275         "ATA 33", "ATA 66",
2276 -       "ATA 100", "ATA 100",
2277 -       "ATA 133", "ATA 133"
2278 +       "ATA 100 (1st gen)", "ATA 100 (2nd gen)",
2279 +       "ATA 133 (1st gen)", "ATA 133 (2nd gen)"
2280  };
2281  
2282  #if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS)
2283 @@ -331,8 +258,9 @@
2284                         // Configuration space remapped to 0x70
2285                         drive_pci = 0x70;
2286                 }
2287 -               pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+8*pos, &regdw0);
2288 -               pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+8*pos+4, &regdw1);
2289 +               pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos, &regdw0);
2290 +               pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos+8, &regdw1);
2291 +
2292                 p += sprintf(p, "Drive %d:\n", pos);
2293         }
2294  
2295 @@ -357,8 +285,7 @@
2296                         case ATA_100a:  p += sprintf(p, cycle_time[(reg01 & 0x70) >> 4]); break;
2297                         case ATA_100:
2298                         case ATA_133a:  p += sprintf(p, cycle_time[reg01 & 0x0F]); break;
2299 -                       case ATA_133:
2300 -                       default:        p += sprintf(p, "133+ ?"); break;
2301 +                       default:        p += sprintf(p, "?"); break;
2302                 }
2303                 p += sprintf(p, " \t UDMA Cycle Time    ");
2304                 switch(chipset_family) {
2305 @@ -367,42 +294,39 @@
2306                         case ATA_100a:  p += sprintf(p, cycle_time[(reg11 & 0x70) >> 4]); break;
2307                         case ATA_100:
2308                         case ATA_133a:  p += sprintf(p, cycle_time[reg11 & 0x0F]); break;
2309 -                       case ATA_133:
2310 -                       default:        p += sprintf(p, "133+ ?"); break;
2311 +                       default:        p += sprintf(p, "?"); break;
2312                 }
2313                 p += sprintf(p, "\n");
2314         }
2315  
2316 +
2317 +       if (chipset_family < ATA_133) { /* else case TODO */
2318 +
2319  /* Data Active */
2320 -       p += sprintf(p, "                Data Active Time   ");
2321 -       switch(chipset_family) {
2322 -               case ATA_00:
2323 -               case ATA_16: /* confirmed */
2324 -               case ATA_33:
2325 -               case ATA_66:
2326 -               case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break;
2327 -               case ATA_100:
2328 -               case ATA_133a: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break;
2329 -               case ATA_133:
2330 -               default: p += sprintf(p, "133+ ?"); break;
2331 -       }
2332 -       p += sprintf(p, " \t Data Active Time   ");
2333 -       switch(chipset_family) {
2334 -               case ATA_00:
2335 -               case ATA_16:
2336 -               case ATA_33:
2337 -               case ATA_66:
2338 -               case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break;
2339 -               case ATA_100:
2340 -               case ATA_133a: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break;
2341 -               case ATA_133:
2342 -               default: p += sprintf(p, "133+ ?"); break;
2343 -       }
2344 -       p += sprintf(p, "\n");
2345 +               p += sprintf(p, "                Data Active Time   ");
2346 +               switch(chipset_family) {
2347 +                       case ATA_16: /* confirmed */
2348 +                       case ATA_33:
2349 +                       case ATA_66:
2350 +                       case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break;
2351 +                       case ATA_100:
2352 +                       case ATA_133a: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break;
2353 +                       default: p += sprintf(p, "?"); break;
2354 +               }
2355 +               p += sprintf(p, " \t Data Active Time   ");
2356 +               switch(chipset_family) {
2357 +                       case ATA_16:
2358 +                       case ATA_33:
2359 +                       case ATA_66:
2360 +                       case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break;
2361 +                       case ATA_100:
2362 +                       case ATA_133a: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break;
2363 +                       default: p += sprintf(p, "?"); break;
2364 +               }
2365 +               p += sprintf(p, "\n");
2366  
2367  /* Data Recovery */
2368         /* warning: may need (reg&0x07) for pre ATA66 chips */
2369 -       if (chipset_family < ATA_133) {
2370                 p += sprintf(p, "                Data Recovery Time %s \t Data Recovery Time %s\n",
2371                              recovery_time[reg00 & 0x0f], recovery_time[reg10 & 0x0f]);
2372         }
2373 @@ -430,7 +354,6 @@
2374  
2375         p += sprintf(p, "\nSiS 5513 ");
2376         switch(chipset_family) {
2377 -               case ATA_00: p += sprintf(p, "Unknown???"); break;
2378                 case ATA_16: p += sprintf(p, "DMA 16"); break;
2379                 case ATA_33: p += sprintf(p, "Ultra 33"); break;
2380                 case ATA_66: p += sprintf(p, "Ultra 66"); break;
2381 @@ -497,39 +420,16 @@
2382  
2383         len = (p - buffer) - offset;
2384         *addr = buffer + offset;
2385 -       
2386 +
2387         return len > count ? count : len;
2388  }
2389  #endif /* defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS) */
2390  
2391  static u8 sis5513_ratemask (ide_drive_t *drive)
2392  {
2393 -#if 0
2394         u8 rates[] = { 0, 0, 1, 2, 3, 3, 4, 4 };
2395         u8 mode = rates[chipset_family];
2396 -#else
2397 -       u8 mode;
2398  
2399 -       switch(chipset_family) {
2400 -               case ATA_133:
2401 -               case ATA_133a:
2402 -                       mode = 4;
2403 -                       break;
2404 -               case ATA_100:
2405 -               case ATA_100a:
2406 -                       mode = 3;
2407 -                       break;
2408 -               case ATA_66:
2409 -                       mode = 2;
2410 -                       break;
2411 -               case ATA_33:
2412 -                       return 1;
2413 -               case ATA_16:
2414 -                case ATA_00:   
2415 -               default:
2416 -                       return 0;
2417 -       }
2418 -#endif
2419         if (!eighty_ninty_three(drive))
2420                 mode = min(mode, (u8)1);
2421         return mode;
2422 @@ -547,20 +447,12 @@
2423         u8 reg4bh               = 0;
2424         u8 rw_prefetch          = (0x11 << drive->dn);
2425  
2426 -#ifdef DEBUG
2427 -       printk("SIS5513: config_drive_art_rwp, drive %d\n", drive->dn);
2428 -       sis5513_load_verify_registers(dev, "config_drive_art_rwp start");
2429 -#endif
2430 -
2431         if (drive->media != ide_disk)
2432                 return;
2433         pci_read_config_byte(dev, 0x4b, &reg4bh);
2434  
2435         if ((reg4bh & rw_prefetch) != rw_prefetch)
2436                 pci_write_config_byte(dev, 0x4b, reg4bh|rw_prefetch);
2437 -#ifdef DEBUG
2438 -       sis5513_load_verify_registers(dev, "config_drive_art_rwp end");
2439 -#endif
2440  }
2441  
2442  
2443 @@ -575,10 +467,6 @@
2444         u16 eide_pio_timing[6] = {600, 390, 240, 180, 120, 90};
2445         u16 xfer_pio = drive->id->eide_pio_modes;
2446  
2447 -#ifdef DEBUG
2448 -       sis5513_load_verify_registers(dev, "config_drive_art_rwp_pio start");
2449 -#endif
2450 -
2451         config_drive_art_rwp(drive);
2452         pio = ide_get_best_pio_mode(drive, 255, pio, NULL);
2453  
2454 @@ -598,12 +486,6 @@
2455  
2456         timing = (xfer_pio >= pio) ? xfer_pio : pio;
2457  
2458 -#ifdef DEBUG
2459 -       printk("SIS5513: config_drive_art_rwp_pio, "
2460 -               "drive %d, pio %d, timing %d\n",
2461 -              drive->dn, pio, timing);
2462 -#endif
2463 -
2464         /* In pre ATA_133 case, drives sit at 0x40 + 4*drive->dn */
2465         drive_pci = 0x40;
2466         /* In SiS962 case drives sit at (0x40 or 0x70) + 8*drive->dn) */
2467 @@ -649,41 +531,24 @@
2468                 pci_read_config_dword(dev, drive_pci, &test3);
2469                 test3 &= 0xc0c00fff;
2470                 if (test3 & 0x08) {
2471 -                       test3 |= (unsigned long)ini_time_value[ATA_133-ATA_00][timing] << 12;
2472 -                       test3 |= (unsigned long)act_time_value[ATA_133-ATA_00][timing] << 16;
2473 -                       test3 |= (unsigned long)rco_time_value[ATA_133-ATA_00][timing] << 24;
2474 +                       test3 |= (unsigned long)ini_time_value[ATA_133][timing] << 12;
2475 +                       test3 |= (unsigned long)act_time_value[ATA_133][timing] << 16;
2476 +                       test3 |= (unsigned long)rco_time_value[ATA_133][timing] << 24;
2477                 } else {
2478 -                       test3 |= (unsigned long)ini_time_value[ATA_100-ATA_00][timing] << 12;
2479 -                       test3 |= (unsigned long)act_time_value[ATA_100-ATA_00][timing] << 16;
2480 -                       test3 |= (unsigned long)rco_time_value[ATA_100-ATA_00][timing] << 24;
2481 +                       test3 |= (unsigned long)ini_time_value[ATA_100][timing] << 12;
2482 +                       test3 |= (unsigned long)act_time_value[ATA_100][timing] << 16;
2483 +                       test3 |= (unsigned long)rco_time_value[ATA_100][timing] << 24;
2484                 }
2485                 pci_write_config_dword(dev, drive_pci, test3);
2486         }
2487 -
2488 -#ifdef DEBUG
2489 -       sis5513_load_verify_registers(dev, "config_drive_art_rwp_pio start");
2490 -#endif
2491  }
2492  
2493  static int config_chipset_for_pio (ide_drive_t *drive, u8 pio)
2494  {
2495 -#if 0
2496 +       if (pio == 255)
2497 +               pio = ide_find_best_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
2498         config_art_rwp_pio(drive, pio);
2499 -       return ide_config_drive_speed(drive, (XFER_PIO_0 + pio));
2500 -#else
2501 -       u8 speed;
2502 -
2503 -       switch(pio) {
2504 -               case 4:         speed = XFER_PIO_4; break;
2505 -               case 3:         speed = XFER_PIO_3; break;
2506 -               case 2:         speed = XFER_PIO_2; break;
2507 -               case 1:         speed = XFER_PIO_1; break;
2508 -               default:        speed = XFER_PIO_0; break;
2509 -       }
2510 -
2511 -       config_art_rwp_pio(drive, pio);
2512 -       return ide_config_drive_speed(drive, speed);
2513 -#endif
2514 +       return ide_config_drive_speed(drive, XFER_PIO_0 + min_t(u8, pio, 4));
2515  }
2516  
2517  static int sis5513_tune_chipset (ide_drive_t *drive, u8 xferspeed)
2518 @@ -694,24 +559,8 @@
2519         u8 drive_pci, reg, speed;
2520         u32 regdw;
2521  
2522 -#ifdef DEBUG
2523 -       sis5513_load_verify_registers(dev, "sis5513_tune_chipset start");
2524 -#endif
2525 -
2526 -#ifdef BROKEN_LEVEL
2527 -#ifdef DEBUG
2528 -       printk("SIS5513: BROKEN_LEVEL activated, speed=%d -> speed=%d\n", xferspeed, BROKEN_LEVEL);
2529 -#endif
2530 -       if (xferspeed > BROKEN_LEVEL) xferspeed = BROKEN_LEVEL;
2531 -#endif
2532 -
2533         speed = ide_rate_filter(sis5513_ratemask(drive), xferspeed);
2534  
2535 -#ifdef DEBUG
2536 -       printk("SIS5513: sis5513_tune_chipset, drive %d, speed %d\n",
2537 -              drive->dn, xferspeed);
2538 -#endif
2539 -
2540         /* See config_art_rwp_pio for drive pci config registers */
2541         drive_pci = 0x40;
2542         if (chipset_family >= ATA_133) {
2543 @@ -750,14 +599,14 @@
2544                                 regdw &= 0xfffff00f;
2545                                 /* check if ATA133 enable */
2546                                 if (regdw & 0x08) {
2547 -                                       regdw |= (unsigned long)cycle_time_value[ATA_133-ATA_00][speed-XFER_UDMA_0] << 4;
2548 -                                       regdw |= (unsigned long)cvs_time_value[ATA_133-ATA_00][speed-XFER_UDMA_0] << 8;
2549 +                                       regdw |= (unsigned long)cycle_time_value[ATA_133][speed-XFER_UDMA_0] << 4;
2550 +                                       regdw |= (unsigned long)cvs_time_value[ATA_133][speed-XFER_UDMA_0] << 8;
2551                                 } else {
2552                                 /* if ATA133 disable, we should not set speed above UDMA5 */
2553                                         if (speed > XFER_UDMA_5)
2554                                                 speed = XFER_UDMA_5;
2555 -                                       regdw |= (unsigned long)cycle_time_value[ATA_100-ATA_00][speed-XFER_UDMA_0] << 4;
2556 -                                       regdw |= (unsigned long)cvs_time_value[ATA_100-ATA_00][speed-XFER_UDMA_0] << 8;
2557 +                                       regdw |= (unsigned long)cycle_time_value[ATA_100][speed-XFER_UDMA_0] << 4;
2558 +                                       regdw |= (unsigned long)cvs_time_value[ATA_100][speed-XFER_UDMA_0] << 8;
2559                                 }
2560                                 pci_write_config_dword(dev, (unsigned long)drive_pci, regdw);
2561                         } else {
2562 @@ -767,7 +616,7 @@
2563                                 reg &= ~((0xFF >> (8 - cycle_time_range[chipset_family]))
2564                                          << cycle_time_offset[chipset_family]);
2565                                 /* set reg cycle time bits */
2566 -                               reg |= cycle_time_value[chipset_family-ATA_00][speed-XFER_UDMA_0]
2567 +                               reg |= cycle_time_value[chipset_family][speed-XFER_UDMA_0]
2568                                         << cycle_time_offset[chipset_family];
2569                                 pci_write_config_byte(dev, drive_pci+1, reg);
2570                         }
2571 @@ -786,9 +635,7 @@
2572                 case XFER_PIO_0:
2573                 default:         return((int) config_chipset_for_pio(drive, 0));        
2574         }
2575 -#ifdef DEBUG
2576 -       sis5513_load_verify_registers(dev, "sis5513_tune_chipset end");
2577 -#endif
2578 +
2579         return ((int) ide_config_drive_speed(drive, speed));
2580  }
2581  
2582 @@ -867,71 +714,121 @@
2583         return sis5513_config_drive_xfer_rate(drive);
2584  }
2585  
2586 +/*
2587 +  Future simpler config_xfer_rate :
2588 +   When ide_find_best_mode is made bad-drive aware
2589 +   - remove config_drive_xfer_rate and config_chipset_for_dma,
2590 +   - replace config_xfer_rate with the following
2591 +
2592 +static int sis5513_config_xfer_rate (ide_drive_t *drive)
2593 +{
2594 +       u16 w80 = HWIF(drive)->udma_four;
2595 +       u16 speed;
2596 +
2597 +       config_drive_art_rwp(drive);
2598 +       config_art_rwp_pio(drive, 5);
2599 +
2600 +       speed = ide_find_best_mode(drive,
2601 +               XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
2602 +               (chipset_family >= ATA_33 ? XFER_UDMA : 0) |
2603 +               (w80 && chipset_family >= ATA_66 ? XFER_UDMA_66 : 0) |
2604 +               (w80 && chipset_family >= ATA_100a ? XFER_UDMA_100 : 0) |
2605 +               (w80 && chipset_family >= ATA_133a ? XFER_UDMA_133 : 0));
2606 +
2607 +       sis5513_tune_chipset(drive, speed);
2608 +
2609 +       if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
2610 +               return HWIF(drive)->ide_dma_on(drive);
2611 +       return HWIF(drive)->ide_dma_off_quietly(drive);
2612 +}
2613 +*/
2614 +
2615  /* Chip detection and general config */
2616  static unsigned int __init init_chipset_sis5513 (struct pci_dev *dev, const char *name)
2617  {
2618         struct pci_dev *host;
2619         int i = 0;
2620  
2621 -       /* Find the chip */
2622 -       for (i = 0; i < ARRAY_SIZE(SiSHostChipInfo) && !host_dev; i++) {
2623 -               host = pci_find_device (PCI_VENDOR_ID_SI,
2624 -                                       SiSHostChipInfo[i].host_id,
2625 -                                       NULL);
2626 +       chipset_family = 0;
2627 +
2628 +       for (i = 0; i < ARRAY_SIZE(SiSHostChipInfo) && !chipset_family; i++) {
2629 +
2630 +               host = pci_find_device(PCI_VENDOR_ID_SI, SiSHostChipInfo[i].host_id, NULL);
2631 +
2632                 if (!host)
2633                         continue;
2634  
2635 -               host_dev = host;
2636                 chipset_family = SiSHostChipInfo[i].chipset_family;
2637 +
2638 +               /* Special case for SiS630 : 630S/ET is ATA_100a */
2639 +               if (SiSHostChipInfo[i].host_id == PCI_DEVICE_ID_SI_630) {
2640 +                       u8 hostrev;
2641 +                       pci_read_config_byte(host, PCI_REVISION_ID, &hostrev);
2642 +                       if (hostrev >= 0x30)
2643 +                               chipset_family = ATA_100a;
2644 +               }
2645         
2646 -               /* check 100/133 chipset family */
2647 -               if (chipset_family == ATA_133) {
2648 -                       u32 reg54h;
2649 -                       u16 reg02h;
2650 -                       pci_read_config_dword(dev, 0x54, &reg54h);
2651 -                       pci_write_config_dword(dev, 0x54, (reg54h & 0x7fffffff));
2652 -                       pci_read_config_word(dev, 0x02, &reg02h);
2653 -                       pci_write_config_dword(dev, 0x54, reg54h);
2654 -                       /* devid 5518 here means SiS962 or later
2655 -                          which supports ATA133 */
2656 -                       if (reg02h != 0x5518) {
2657 -                               u8 reg49h;
2658 -                               unsigned long sbrev;
2659 -                               /* SiS961 family */
2660 -
2661 -               /*
2662 -                * FIXME !!! GAK!!!!!!!!!! PCI DIRECT POKING 
2663 -                */
2664 -                               outl(0x80001008, 0x0cf8);
2665 -                               sbrev = inl(0x0cfc);
2666 +               printk(KERN_INFO "SIS5513: %s %s controller\n",
2667 +                        SiSHostChipInfo[i].name, chipset_capability[chipset_family]);
2668 +       }
2669  
2670 -                               pci_read_config_byte(dev, 0x49, &reg49h);
2671 -                               if (((sbrev & 0xff) == 0x10) && (reg49h & 0x80))
2672 -                                       chipset_family = ATA_133a;
2673 -                               else
2674 -                                       chipset_family = ATA_100;
2675 +       if (!chipset_family) { /* Belongs to pci-quirks */
2676 +
2677 +                       u32 idemisc;
2678 +                       u16 trueid;
2679 +
2680 +                       /* Disable ID masking and register remapping */
2681 +                       pci_read_config_dword(dev, 0x54, &idemisc);
2682 +                       pci_write_config_dword(dev, 0x54, (idemisc & 0x7fffffff));
2683 +                       pci_read_config_word(dev, PCI_DEVICE_ID, &trueid);
2684 +                       pci_write_config_dword(dev, 0x54, idemisc);
2685 +
2686 +                       if (trueid == 0x5518) {
2687 +                               printk(KERN_INFO "SIS5513: SiS 962/963 MuTIOL IDE UDMA133 controller\n");
2688 +                               chipset_family = ATA_133;
2689                         }
2690 -               }
2691 -               printk(SiSHostChipInfo[i].name);
2692 -               printk("    %s controller", chipset_capability[chipset_family]);
2693 -               printk("\n");
2694 +       }
2695  
2696 -#ifdef DEBUG
2697 -               sis5513_print_registers(dev, "pci_init_sis5513 start");
2698 -#endif
2699 +       if (!chipset_family) { /* Belongs to pci-quirks */
2700  
2701 -               if (SiSHostChipInfo[i].flags & SIS5513_LATENCY) {
2702 -                       u8 latency = (chipset_family == ATA_100)? 0x80 : 0x10; /* Lacking specs */
2703 -                       pci_write_config_byte(dev, PCI_LATENCY_TIMER, latency);
2704 -               }
2705 +                       struct pci_dev *lpc_bridge;
2706 +                       u16 trueid;
2707 +                       u8 prefctl;
2708 +                       u8 idecfg;
2709 +                       u8 sbrev;
2710 +
2711 +                       pci_read_config_byte(dev, 0x4a, &idecfg);
2712 +                       pci_write_config_byte(dev, 0x4a, idecfg | 0x10);
2713 +                       pci_read_config_word(dev, PCI_DEVICE_ID, &trueid);
2714 +                       pci_write_config_byte(dev, 0x4a, idecfg);
2715 +
2716 +                       if (trueid == 0x5517) { /* SiS 961/961B */
2717 +
2718 +                               lpc_bridge = pci_find_slot(0x00, 0x10); /* Bus 0, Dev 2, Fn 0 */
2719 +                               pci_read_config_byte(lpc_bridge, PCI_REVISION_ID, &sbrev);
2720 +                               pci_read_config_byte(dev, 0x49, &prefctl);
2721 +
2722 +                               if (sbrev == 0x10 && (prefctl & 0x80)) {
2723 +                                       printk(KERN_INFO "SIS5513: SiS 961B MuTIOL IDE UDMA133 controller\n");
2724 +                                       chipset_family = ATA_133a;
2725 +                               } else {
2726 +                                       printk(KERN_INFO "SIS5513: SiS 961 MuTIOL IDE UDMA100 controller\n");
2727 +                                       chipset_family = ATA_100;
2728 +                               }
2729 +                       }
2730         }
2731  
2732 +       if (!chipset_family)
2733 +               return -1;
2734 +
2735         /* Make general config ops here
2736            1/ tell IDE channels to operate in Compatibility mode only
2737            2/ tell old chips to allow per drive IDE timings */
2738 -       if (host_dev) {
2739 +
2740 +       {
2741                 u8 reg;
2742                 u16 regw;
2743 +
2744                 switch(chipset_family) {
2745                         case ATA_133:
2746                                 /* SiS962 operation mode */
2747 @@ -944,6 +841,8 @@
2748                                 break;
2749                         case ATA_133a:
2750                         case ATA_100:
2751 +                               /* Fixup latency */
2752 +                               pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x80);
2753                                 /* Set compatibility bit */
2754                                 pci_read_config_byte(dev, 0x49, &reg);
2755                                 if (!(reg & 0x01)) {
2756 @@ -952,6 +851,9 @@
2757                                 break;
2758                         case ATA_100a:
2759                         case ATA_66:
2760 +                               /* Fixup latency */
2761 +                               pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x10);
2762 +
2763                                 /* On ATA_66 chips the bit was elsewhere */
2764                                 pci_read_config_byte(dev, 0x52, &reg);
2765                                 if (!(reg & 0x04)) {
2766 @@ -972,8 +874,6 @@
2767                                         pci_write_config_byte(dev, 0x52, reg|0x08);
2768                                 }
2769                                 break;
2770 -                       case ATA_00:
2771 -                       default: break;
2772                 }
2773  
2774  #if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS)
2775 @@ -984,9 +884,7 @@
2776                 }
2777  #endif
2778         }
2779 -#ifdef DEBUG
2780 -       sis5513_load_verify_registers(dev, "pci_init_sis5513 end");
2781 -#endif
2782 +
2783         return 0;
2784  }
2785  
2786 @@ -1029,7 +927,7 @@
2787         hwif->mwdma_mask = 0x07;
2788         hwif->swdma_mask = 0x07;
2789  
2790 -       if (!host_dev)
2791 +       if (!chipset_family)
2792                 return;
2793  
2794         if (!(hwif->udma_four))
2795 @@ -1087,7 +985,7 @@
2796  module_init(sis5513_ide_init);
2797  module_exit(sis5513_ide_exit);
2798  
2799 -MODULE_AUTHOR("Lionel Bouton, L C Chang, Andre Hedrick");
2800 +MODULE_AUTHOR("Lionel Bouton, L C Chang, Andre Hedrick, Vojtech Pavlik");
2801  MODULE_DESCRIPTION("PCI driver module for SIS IDE");
2802  MODULE_LICENSE("GPL");
2803  
2804 @@ -1095,13 +993,10 @@
2805  
2806  /*
2807   * TODO:
2808 - *     - Get ridden of SisHostChipInfo[] completness dependancy.
2809 - *     - Study drivers/ide/ide-timing.h.
2810 - *     - Are there pre-ATA_16 SiS5513 chips ? -> tune init code for them
2811 - *       or remove ATA_00 define
2812 + *     - CLEANUP
2813 + *     - Use drivers/ide/ide-timing.h !
2814   *     - More checks in the config registers (force values instead of
2815   *       relying on the BIOS setting them correctly).
2816   *     - Further optimisations ?
2817   *       . for example ATA66+ regs 0x48 & 0x4A
2818   */
2819 -
2820 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/raid/hptraid.c linux.21-ac4/drivers/ide/raid/hptraid.c
2821 --- linux.vanilla/drivers/ide/raid/hptraid.c    2003-06-14 00:11:32.000000000 +0100
2822 +++ linux.21-ac4/drivers/ide/raid/hptraid.c     2003-06-22 14:13:46.000000000 +0100
2823 @@ -17,7 +17,30 @@
2824         Copyright (C) 1994-96 Marc ZYNGIER <zyngier@ufr-info-p7.ibp.fr>
2825     Based on work done by Søren Schmidt for FreeBSD
2826  
2827 -   
2828 +   Changelog:
2829 +   15.06.2003 wweissmann@gmx.at
2830 +       * correct values of raid-1 superbock
2831 +       * re-add check for availability of all disks
2832 +       * fix offset bug in raid-1 (introduced in raid 0+1 implementation)
2833 +
2834 +   14.06.2003 wweissmann@gmx.at
2835 +       * superblock has wrong "disks" value on raid-1
2836 +       * fixup for raid-1 disknumbering
2837 +       * do _NOT_ align size to 255*63 boundary
2838 +               I WILL NOT USE FDISK TO DETERMINE THE VOLUME SIZE.
2839 +               I WILL NOT USE FDISK TO DETERMINE THE VOLUME SIZE.
2840 +               I WILL NOT USE FDISK TO DETERMINE THE VOLUME SIZE.
2841 +               I WILL NOT ...
2842 +
2843 +   13.06.2003 wweissmann@gmx.at
2844 +       * raid 0+1 support
2845 +       * check if all disks of an array are available
2846 +       * bump version number
2847 +
2848 +   29.05.2003 wweissmann@gmx.at
2849 +       * release no more devices than available on unload
2850 +       * remove static variables in raid-1 read path
2851 +
2852  */
2853  
2854  #include <linux/module.h>
2855 @@ -34,6 +57,8 @@
2856  #include <asm/uaccess.h>
2857  
2858  #include "ataraid.h"
2859 +#include "hptraid.h"
2860 +
2861  
2862  static int hptraid_open(struct inode * inode, struct file * filp);
2863  static int hptraid_release(struct inode * inode, struct file * filp);
2864 @@ -41,26 +66,30 @@
2865  static int hptraidspan_make_request (request_queue_t *q, int rw, struct buffer_head * bh);
2866  static int hptraid0_make_request (request_queue_t *q, int rw, struct buffer_head * bh);
2867  static int hptraid1_make_request (request_queue_t *q, int rw, struct buffer_head * bh);
2868 +static int hptraid01_make_request (request_queue_t *q, int rw, struct buffer_head * bh);
2869  
2870  
2871  
2872  struct hptdisk {
2873 -       kdev_t  device;
2874 +       kdev_t  device;         /* disk-ID/raid 0+1 volume-ID */
2875         unsigned long sectors;
2876         struct block_device *bdev;
2877         unsigned long last_pos;
2878  };
2879  
2880  struct hptraid {
2881 -       unsigned int stride;
2882 -       unsigned int disks;
2883 -       unsigned long sectors;
2884 +       unsigned int stride;    /* stripesize */
2885 +       unsigned int disks;     /* number of disks in array */
2886 +       unsigned long sectors;  /* disksize in sectors */
2887          u_int32_t magic_0;
2888 +        u_int32_t magic_1;
2889         struct geom geom;
2890         
2891 +       int previous;           /* most recently accessed disk in mirror */
2892         struct hptdisk disk[8];
2893 -       unsigned long cutoff[8];
2894 +       unsigned long cutoff[8];        /* raid 0 cutoff */
2895         unsigned int cutoff_disks[8];   
2896 +       struct hptraid * raid01;        /* sub arrays for raid 0+1 */
2897  };
2898  
2899  struct hptraid_dev {
2900 @@ -109,9 +138,30 @@
2901         make_request:           hptraid1_make_request
2902  };
2903  
2904 +
2905 +static struct raid_device_operations hptraid01_ops = {
2906 +       open:                   hptraid_open,
2907 +       release:                hptraid_release,
2908 +       ioctl:                  hptraid_ioctl,
2909 +       make_request:           hptraid01_make_request
2910 +};
2911 +
2912 +static __init struct {
2913 +       struct raid_device_operations *op;
2914 +       u_int8_t type;
2915 +       char label[8];
2916 +} oplist[] = {
2917 +       {&hptraid0_ops, HPT_T_RAID_0, "RAID 0"},
2918 +       {&hptraid1_ops, HPT_T_RAID_1, "RAID 1"},
2919 +       {&hptraidspan_ops, HPT_T_SPAN, "SPAN"},
2920 +       {&hptraid01_ops, HPT_T_RAID_01_RAID_0, "RAID 0+1"},
2921 +       {0, 0}
2922 +};
2923 +
2924  static struct hptraid raid[14];
2925  
2926 -static int hptraid_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2927 +static int hptraid_ioctl(struct inode *inode, struct file *file,
2928 +               unsigned int cmd, unsigned long arg)
2929  {
2930         unsigned int minor;
2931         unsigned char val;
2932 @@ -185,7 +235,10 @@
2933         device = (bh->b_rdev >> SHIFT)&MAJOR_MASK;
2934         thisraid = &raid[device];
2935  
2936 -       /* Partitions need adding of the start sector of the partition to the requested sector */
2937 +       /*
2938 +        * Partitions need adding of the start sector of the partition to the
2939 +        * requested sector
2940 +        */
2941         
2942         rsect += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect;
2943  
2944 @@ -216,58 +269,58 @@
2945         return 1;
2946  }
2947  
2948 -static int hptraid0_make_request (request_queue_t *q, int rw, struct buffer_head * bh)
2949 +static int hptraid0_compute_request (struct hptraid *thisraid,
2950 +               request_queue_t *q,
2951 +               int rw, struct buffer_head * bh)
2952  {
2953 -       unsigned long rsect;
2954         unsigned long rsect_left,rsect_accum = 0;
2955         unsigned long block;
2956         unsigned int disk=0,real_disk=0;
2957         int i;
2958 -       int device;
2959 -       struct hptraid *thisraid;
2960 -
2961 -       rsect = bh->b_rsector;
2962  
2963 -       /* Ok. We need to modify this sector number to a new disk + new sector number. 
2964 +       /* Ok. We need to modify this sector number to a new disk + new sector
2965 +        * number. 
2966          * If there are disks of different sizes, this gets tricky. 
2967          * Example with 3 disks (1Gb, 4Gb and 5 GB):
2968          * The first 3 Gb of the "RAID" are evenly spread over the 3 disks.
2969 -        * Then things get interesting. The next 2Gb (RAID view) are spread across disk 2 and 3
2970 -        * and the last 1Gb is disk 3 only.
2971 +        * Then things get interesting. The next 2Gb (RAID view) are spread
2972 +        * across disk 2 and 3 and the last 1Gb is disk 3 only.
2973          *
2974 -        * the way this is solved is like this: We have a list of "cutoff" points where everytime
2975 -        * a disk falls out of the "higher" count, we mark the max sector. So once we pass a cutoff
2976 -        * point, we have to divide by one less.
2977 +        * the way this is solved is like this: We have a list of "cutoff"
2978 +        * points where everytime a disk falls out of the "higher" count, we
2979 +        * mark the max sector. So once we pass a cutoff point, we have to
2980 +        * divide by one less.
2981          */
2982         
2983 -       device = (bh->b_rdev >> SHIFT)&MAJOR_MASK;
2984 -       thisraid = &raid[device];
2985         if (thisraid->stride==0)
2986                 thisraid->stride=1;
2987  
2988 -       /* Partitions need adding of the start sector of the partition to the requested sector */
2989 -       
2990 -       rsect += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect;
2991 -
2992 -       /* Woops we need to split the request to avoid crossing a stride barrier */
2993 -       if ((rsect/thisraid->stride) != ((rsect+(bh->b_size/512)-1)/thisraid->stride)) {
2994 +       /*
2995 +        * Woops we need to split the request to avoid crossing a stride
2996 +        * barrier
2997 +        */
2998 +       if ((bh->b_rsector/thisraid->stride) !=
2999 +                       ((bh->b_rsector+(bh->b_size/512)-1)/thisraid->stride)) {
3000                 return -1;
3001         }
3002                         
3003 -       rsect_left = rsect;
3004 +       rsect_left = bh->b_rsector;;
3005         
3006         for (i=0;i<8;i++) {
3007                 if (thisraid->cutoff_disks[i]==0)
3008                         break;
3009 -               if (rsect > thisraid->cutoff[i]) {
3010 +               if (bh->b_rsector > thisraid->cutoff[i]) {
3011                         /* we're in the wrong area so far */
3012                         rsect_left -= thisraid->cutoff[i];
3013 -                       rsect_accum += thisraid->cutoff[i]/thisraid->cutoff_disks[i];
3014 +                       rsect_accum += thisraid->cutoff[i] /
3015 +                               thisraid->cutoff_disks[i];
3016                 } else {
3017                         block = rsect_left / thisraid->stride;
3018                         disk = block % thisraid->cutoff_disks[i];
3019 -                       block = (block / thisraid->cutoff_disks[i]) * thisraid->stride;
3020 -                       rsect = rsect_accum + (rsect_left % thisraid->stride) + block;
3021 +                       block = (block / thisraid->cutoff_disks[i]) *
3022 +                               thisraid->stride;
3023 +                       bh->b_rsector = rsect_accum +
3024 +                               (rsect_left % thisraid->stride) + block;
3025                         break;
3026                 }
3027         }
3028 @@ -286,7 +339,7 @@
3029         
3030         /* All but the first disk have a 10 sector offset */
3031         if (i>0)
3032 -               rsect+=10;
3033 +               bh->b_rsector+=10;
3034                 
3035         
3036         /*
3037 @@ -295,7 +348,6 @@
3038          */
3039          
3040         bh->b_rdev = thisraid->disk[disk].device;
3041 -       bh->b_rsector = rsect;
3042  
3043         /*
3044          * Let the main block layer submit the IO and resolve recursion:
3045 @@ -303,12 +355,39 @@
3046         return 1;
3047  }
3048  
3049 +static int hptraid0_make_request (request_queue_t *q, int rw, struct buffer_head * bh)
3050 +{
3051 +       unsigned long rsect;
3052 +       int device;
3053 +
3054 +       /*
3055 +        * save the sector, it must be restored before a request-split
3056 +        * is performed
3057 +        */
3058 +       rsect = bh->b_rsector;
3059 +
3060 +       /*
3061 +        * Partitions need adding of the start sector of the partition to the
3062 +        * requested sector
3063 +        */
3064 +       
3065 +       bh->b_rsector += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect;
3066 +
3067 +       device = (bh->b_rdev >> SHIFT)&MAJOR_MASK;
3068 +       if( hptraid0_compute_request(raid+device, q, rw, bh) != 1 ) {
3069 +                       /* request must be split => restore sector */
3070 +               bh->b_rsector = rsect;
3071 +               return -1;
3072 +       }
3073 +
3074 +       return 1;
3075 +}
3076 +
3077  static int hptraid1_read_request (request_queue_t *q, int rw, struct buffer_head * bh)
3078  {
3079         int device;
3080         int dist;
3081         int bestsofar,bestdist,i;
3082 -       static int previous;
3083  
3084         /* Reads are simple in principle. Pick a disk and go. 
3085            Initially I cheat by just picking the one which the last known
3086 @@ -331,11 +410,15 @@
3087                         dist = -dist;
3088                 if (dist>4095)
3089                         dist=4095;
3090 -               
3091 -               if (bestdist==dist) {  /* it's a tie; try to do some read balancing */
3092 -                       if ((previous>bestsofar)&&(previous<=i))  
3093 +
3094 +                 /* it's a tie; try to do some read balancing */
3095 +               if (bestdist==dist) {
3096 +                       if ( (raid[device].previous>bestsofar) &&
3097 +                                       (raid[device].previous<=i) )  
3098                                 bestsofar = i;
3099 -                       previous = (previous + 1) % raid[device].disks;
3100 +                       raid[device].previous =
3101 +                               (raid[device].previous + 1) %
3102 +                               raid[device].disks;
3103                 } else if (bestdist>dist) {
3104                         bestdist = dist;
3105                         bestsofar = i;
3106 @@ -343,7 +426,6 @@
3107         
3108         }
3109         
3110 -       bh->b_rsector += bestsofar?10:0;
3111         bh->b_rdev = raid[device].disk[bestsofar].device; 
3112         raid[device].disk[bestsofar].last_pos = bh->b_rsector+(bh->b_size>>9);
3113  
3114 @@ -377,24 +459,49 @@
3115                 if (!bh1)
3116                         BUG();
3117         
3118 -               /* dupe the bufferhead and update the parts that need to be different */
3119 +               /*
3120 +                * dupe the bufferhead and update the parts that need to be
3121 +                * different
3122 +                */
3123                 memcpy(bh1, bh, sizeof(*bh));
3124                 
3125                 bh1->b_end_io = ataraid_end_request;
3126                 bh1->b_private = private;
3127 -               bh1->b_rsector += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect+(i==0?0:10); /* partition offset */
3128 +               bh1->b_rsector += ataraid_gendisk.part[MINOR(bh->b_rdev)].start_sect; /* partition offset */
3129                 bh1->b_rdev = raid[device].disk[i].device;
3130  
3131                 /* update the last known head position for the drive */
3132                 raid[device].disk[i].last_pos = bh1->b_rsector+(bh1->b_size>>9);
3133  
3134 +               if( raid[device].raid01 ) {
3135 +                       if( hptraid0_compute_request(
3136 +                                               raid[device].raid01 +
3137 +                                                       (bh1->b_rdev-1),
3138 +                                               q, rw, bh1) != 1 ) {
3139 +                               /*
3140 +                                * If a split is requested then it is requested
3141 +                                * in the first iteration. This is true because
3142 +                                * of the cutoff is not used in raid 0+1.
3143 +                                */
3144 +                               if(unlikely(i)) {
3145 +                                       BUG();
3146 +                               }
3147 +                               else {
3148 +                                       kfree(private);
3149 +                                       return -1;
3150 +                               }
3151 +                       }
3152 +               }
3153                 generic_make_request(rw,bh1);
3154         }
3155         return 0;
3156  }
3157  
3158  static int hptraid1_make_request (request_queue_t *q, int rw, struct buffer_head * bh) {
3159 -       /* Read and Write are totally different cases; split them totally here */
3160 +       /*
3161 +        * Read and Write are totally different cases; split them totally
3162 +        * here
3163 +        */
3164         if (rw==READA)
3165                 rw = READ;
3166         
3167 @@ -404,7 +511,43 @@
3168                 return hptraid1_write_request(q,rw,bh);
3169  }
3170  
3171 -#include "hptraid.h"
3172 +static int hptraid01_read_request (request_queue_t *q, int rw, struct buffer_head * bh)
3173 +{
3174 +       int rsector=bh->b_rsector;
3175 +       int rdev=bh->b_rdev;
3176 +
3177 +               /* select mirror volume */
3178 +       hptraid1_read_request(q, rw, bh);
3179 +
3180 +               /* stripe volume is selected by "bh->b_rdev" */
3181 +       if( hptraid0_compute_request(
3182 +                               raid[(bh->b_rdev >> SHIFT)&MAJOR_MASK].
3183 +                                       raid01 + (bh->b_rdev-1) ,
3184 +                               q, rw, bh) != 1 ) {
3185 +
3186 +                       /* request must be split => restore sector and device */
3187 +               bh->b_rsector = rsector;
3188 +               bh->b_rdev = rdev;
3189 +               return -1;
3190 +
3191 +       }
3192 +
3193 +       return 1;
3194 +}
3195 +
3196 +static int hptraid01_make_request (request_queue_t *q, int rw, struct buffer_head * bh) {
3197 +       /*
3198 +        * Read and Write are totally different cases; split them totally
3199 +        * here
3200 +        */
3201 +       if (rw==READA)
3202 +               rw = READ;
3203 +       
3204 +       if (rw==READ)
3205 +               return hptraid01_read_request(q,rw,bh);
3206 +       else
3207 +               return hptraid1_write_request(q,rw,bh);
3208 +}
3209  
3210  static int read_disk_sb (int major, int minor, unsigned char *buffer,int bufsize)
3211  {
3212 @@ -456,77 +599,140 @@
3213         return lba;
3214  }
3215  
3216 -static void __init probedisk(struct hptraid_dev *disk, int device, u_int8_t type)
3217 +static void writeentry(struct hptraid * raid, struct hptraid_dev * disk,
3218 +               int index, struct highpoint_raid_conf * prom) {
3219 +
3220 +       int j=0;
3221 +       struct gendisk *gd;
3222 +       struct block_device *bdev;
3223 +
3224 +       bdev = bdget(MKDEV(disk->major,disk->minor));
3225 +       if (bdev && blkdev_get(bdev,FMODE_READ|FMODE_WRITE,0,BDEV_RAW) == 0) {
3226 +               raid->disk[index].bdev = bdev;
3227 +               /*
3228 +                * This is supposed to prevent others from stealing our
3229 +                * underlying disks now blank the /proc/partitions table for 
3230 +                * the wrong partition table, so that scripts don't
3231 +                * accidentally mount it and crash the kernel
3232 +                */
3233 +                /* XXX: the 0 is an utter hack  --hch */
3234 +               gd=get_gendisk(MKDEV(disk->major, 0));
3235 +               if (gd!=NULL) {
3236 +                       if (gd->major==disk->major)
3237 +                               for (j=1+(disk->minor<<gd->minor_shift);
3238 +                                       j<((disk->minor+1)<<gd->minor_shift);
3239 +                                       j++) gd->part[j].nr_sects=0;                                    
3240 +               }
3241 +        }
3242 +       raid->disk[index].device = MKDEV(disk->major,disk->minor);
3243 +       raid->disk[index].sectors = maxsectors(disk->major,disk->minor);
3244 +       raid->stride = (1<<prom->raid0_shift);
3245 +       raid->disks = prom->raid_disks;
3246 +       raid->sectors = prom->total_secs;
3247 +       raid->sectors += raid->sectors&1?1:0;
3248 +       raid->magic_0=prom->magic_0;
3249 +       raid->magic_1=prom->magic_1;
3250 +
3251 +}
3252 +
3253 +static int probedisk(struct hptraid_dev *disk, int device, u_int8_t type)
3254  {
3255 -       int i;
3256 +       int i, j;
3257          struct highpoint_raid_conf *prom;
3258         static unsigned char block[4096];
3259 -       struct block_device *bdev;
3260         
3261         if (disk->device != -1) /* disk is occupied? */
3262 -               return;
3263 +               return 0;
3264   
3265         if (maxsectors(disk->major,disk->minor)==0)
3266 -               return;
3267 +               return 0;
3268         
3269          if (read_disk_sb(disk->major,disk->minor,(unsigned char*)&block,sizeof(block)))
3270 -               return;
3271 +               return 0;
3272                                                                                                                   
3273          prom = (struct highpoint_raid_conf*)&block[512];
3274                  
3275          if (prom->magic!=  0x5a7816f0)
3276 -               return;
3277 +               return 0;
3278          switch (prom->type) {
3279                 case HPT_T_SPAN:
3280                 case HPT_T_RAID_0:
3281                 case HPT_T_RAID_1:
3282 +               case HPT_T_RAID_01_RAID_0:
3283                         if(prom->type != type)
3284 -                               return;
3285 +                               return 0;
3286                         break;
3287                 default:
3288 -                       printk(KERN_INFO "hptraid: only SPAN, RAID0 and RAID1 is currently supported \n");
3289 -                       return;
3290 +                       printk(KERN_INFO "hptraid: unknown raid level-id %i\n",
3291 +                                       prom->type);
3292 +                       return 0;
3293          }
3294  
3295                 /* disk from another array? */
3296 -       if(raid[device].disks && prom->magic_0 != raid[device].magic_0)
3297 -               return;
3298 +       if (raid[device].disks) {       /* only check if raid is not empty */
3299 +               if (type == HPT_T_RAID_01_RAID_0 ) {
3300 +                       if( prom->magic_1 != raid[device].magic_1) {
3301 +                               return 0;
3302 +                       }
3303 +               }
3304 +               else if (prom->magic_0 != raid[device].magic_0) {
3305 +                               return 0;
3306 +               }
3307 +       }
3308  
3309         i = prom->disk_number;
3310         if (i<0)
3311 -               return;
3312 +               return 0;
3313         if (i>8) 
3314 -               return;
3315 +               return 0;
3316  
3317 -       bdev = bdget(MKDEV(disk->major,disk->minor));
3318 -       if (bdev && blkdev_get(bdev,FMODE_READ|FMODE_WRITE,0,BDEV_RAW) == 0) {
3319 -               int j=0;
3320 -               struct gendisk *gd;
3321 -               raid[device].disk[i].bdev = bdev;
3322 -               /* This is supposed to prevent others from stealing our underlying disks */
3323 -               /* now blank the /proc/partitions table for the wrong partition table,
3324 -                  so that scripts don't accidentally mount it and crash the kernel */
3325 -                /* XXX: the 0 is an utter hack  --hch */
3326 -               gd=get_gendisk(MKDEV(disk->major, 0));
3327 -               if (gd!=NULL) {
3328 -                       if (gd->major==disk->major)
3329 -                               for (j=1+(disk->minor<<gd->minor_shift);
3330 -                                       j<((disk->minor+1)<<gd->minor_shift);
3331 -                                       j++) gd->part[j].nr_sects=0;                                    
3332 +       if ( type == HPT_T_RAID_01_RAID_0 ) {
3333 +
3334 +                       /* allocate helper raid devices for level 0+1 */
3335 +               if (raid[device].raid01 == NULL ) {
3336 +
3337 +                       raid[device].raid01=
3338 +                               kmalloc(2 * sizeof(struct hptraid),GFP_KERNEL);
3339 +                       if ( raid[device].raid01 == NULL ) {
3340 +                               printk(KERN_ERR "hptraid: out of memory\n");
3341 +                               raid[device].disks=-1;
3342 +                               return -ENOMEM;
3343 +                       }
3344 +                       memset(raid[device].raid01, 0,
3345 +                                       2 * sizeof(struct hptraid));
3346                 }
3347 -        }
3348 -       raid[device].disk[i].device = MKDEV(disk->major,disk->minor);
3349 -       raid[device].disk[i].sectors = maxsectors(disk->major,disk->minor);
3350 -       raid[device].stride = (1<<prom->raid0_shift);
3351 -       raid[device].disks = prom->raid_disks;
3352 -       raid[device].sectors = prom->total_secs-(prom->total_secs%(255*63));
3353 -       raid[device].sectors += raid[device].sectors&1?1:0;
3354 -       raid[device].magic_0=prom->magic_0;
3355 +
3356 +                       /* find free sub-stucture */
3357 +               for (j=0; j<2; j++) {
3358 +                       if ( raid[device].raid01[j].disks == 0 ||
3359 +                            raid[device].raid01[j].magic_0 == prom->magic_0 )
3360 +                       {
3361 +                               writeentry(raid[device].raid01+j, disk,
3362 +                                               i, prom);
3363 +                               break;
3364 +                       }
3365 +               }
3366 +
3367 +                       /* no free slot */
3368 +               if(j == 2)
3369 +                       return 0;
3370 +
3371 +               raid[device].stride=raid[device].raid01[j].stride;
3372 +               raid[device].disks=j+1;
3373 +               raid[device].sectors=raid[device].raid01[j].sectors;
3374 +               raid[device].disk[j].sectors=raid[device].raid01[j].sectors;
3375 +               raid[device].magic_1=prom->magic_1;
3376 +       }
3377 +       else {
3378 +               writeentry(raid+device, disk, i, prom);
3379 +       }
3380 +
3381         disk->device=device;
3382                         
3383 +       return 1;
3384  }
3385  
3386 -static void __init fill_cutoff(int device)
3387 +static void fill_cutoff(struct hptraid * device)
3388  {
3389         int i,j;
3390         unsigned long smallest;
3391 @@ -537,111 +743,154 @@
3392         for (i=0;i<8;i++) {
3393                 smallest = ~0;
3394                 for (j=0;j<8;j++) 
3395 -                       if ((raid[device].disk[j].sectors < smallest) && (raid[device].disk[j].sectors>bar))
3396 -                               smallest = raid[device].disk[j].sectors;
3397 +                       if ((device->disk[j].sectors < smallest) && (device->disk[j].sectors>bar))
3398 +                               smallest = device->disk[j].sectors;
3399                 count = 0;
3400                 for (j=0;j<8;j++) 
3401 -                       if (raid[device].disk[j].sectors >= smallest)
3402 +                       if (device->disk[j].sectors >= smallest)
3403                                 count++;
3404                 
3405                 smallest = smallest * count;            
3406                 bar = smallest;
3407 -               raid[device].cutoff[i] = smallest;
3408 -               raid[device].cutoff_disks[i] = count;
3409 +               device->cutoff[i] = smallest;
3410 +               device->cutoff_disks[i] = count;
3411                 
3412         }
3413  }
3414  
3415 +static int count_disks(struct hptraid * raid) {
3416 +       int i, count=0;
3417 +       for (i=0;i<8;i++) {
3418 +               if (raid->disk[i].device!=0) {
3419 +                       printk(KERN_INFO "Drive %i is %li Mb \n",
3420 +                               i,raid->disk[i].sectors/2048);
3421 +                       count++;
3422 +               }
3423 +       }
3424 +       return count;
3425 +}
3426 +
3427 +static void raid1_fixup(struct hptraid * raid) {
3428 +       int i, count=0;
3429 +       for (i=0;i<8;i++) {
3430 +                       /* disknumbers and total disks values are bogus */
3431 +               if (raid->disk[i].device!=0) {
3432 +                       raid->disk[count]=raid->disk[i];
3433 +                       if(i > count) {
3434 +                               memset(raid->disk+i, 0, sizeof(struct hptdisk));
3435 +                       }
3436 +                       count++;
3437 +               }
3438 +       }
3439 +       raid->disks=count;
3440 +}
3441  
3442 -static __init int hptraid_init_one(int device, u_int8_t type)
3443 +static int hptraid_init_one(int device, u_int8_t type, const char * label)
3444  {
3445         int i,count;
3446 -
3447         memset(raid+device, 0, sizeof(struct hptraid));
3448 -       for(i=0; i < 14; i++) {
3449 -               probedisk(devlist+i, device, type);
3450 +       for (i=0; i < 14; i++) {
3451 +               if( probedisk(devlist+i, device, type) < 0 )
3452 +                       return -EINVAL;
3453 +       }
3454 +
3455 +       /* Initialize raid levels */
3456 +       switch (type) {
3457 +               case HPT_T_RAID_0:
3458 +                       fill_cutoff(raid+device);
3459 +                       break;
3460 +
3461 +               case HPT_T_RAID_1:
3462 +                       raid1_fixup(raid+device);
3463 +                       break;
3464 +
3465 +               case HPT_T_RAID_01_RAID_0:
3466 +                       for(i=0; i < 2 && raid[device].raid01 && 
3467 +                                       raid[device].raid01[i].disks; i++) {
3468 +                               fill_cutoff(raid[device].raid01+i);
3469 +                                       /* initialize raid 0+1 volumes */
3470 +                               raid[device].disk[i].device=i+1;
3471 +                       }
3472 +                       break;
3473         }
3474  
3475 -       if(type == HPT_T_RAID_0)
3476 -               fill_cutoff(device);
3477 -       
3478         /* Initialize the gendisk structure */
3479         
3480         ataraid_register_disk(device,raid[device].sectors);
3481  
3482 -       count=0;
3483 +       /* Verify that we have all disks */
3484 +
3485 +       count=count_disks(raid+device);
3486                 
3487 -       for (i=0;i<8;i++) {
3488 -               if (raid[device].disk[i].device!=0) {
3489 -                       printk(KERN_INFO "Drive %i is %li Mb \n",
3490 -                               i,raid[device].disk[i].sectors/2048);
3491 -                       count++;
3492 -               }
3493 +       if (count != raid[device].disks) {
3494 +               printk(KERN_INFO "%s consists of %i drives but found %i drives\n",
3495 +                               label, raid[device].disks, count);
3496 +               return -ENODEV;
3497         }
3498 -       if (count) {
3499 -               printk(KERN_INFO "Raid array consists of %i drives. \n",count);
3500 +       else if (count) {
3501 +               printk(KERN_INFO "%s consists of %i drives.\n",
3502 +                               label, count);
3503 +               if (type == HPT_T_RAID_01_RAID_0 ) {
3504 +                       for(i=0;i<raid[device].disks;i++) {
3505 +                               count=count_disks(raid[device].raid01+i);
3506 +                               if(count == raid[device].raid01[i].disks) {
3507 +                                       printk(KERN_ERR "Sub-Raid %i array consists of %i drives.\n",
3508 +                                                       i, count);
3509 +                               }
3510 +                               else {
3511 +                                       printk(KERN_ERR "Sub-Raid %i array consists of %i drives but found %i disk members.\n",
3512 +                                                       i, raid[device].raid01[i].disks,
3513 +                                                       count);
3514 +                                       return -ENODEV;
3515 +                               }
3516 +                       }
3517 +               }
3518                 return 0;
3519 -       } else {
3520 -               printk(KERN_INFO "No raid array found\n");
3521 -               return -ENODEV;
3522         }
3523         
3524 +       return -ENODEV; /* No more raid volumes */
3525  }
3526  
3527 -static __init int hptraid_init(void)
3528 +static int hptraid_init(void)
3529  {
3530 -       int retval,device,count=0;
3531 +       int retval=-ENODEV;
3532 +       int device,i,count=0;
3533         
3534 -       printk(KERN_INFO "Highpoint HPT370 Softwareraid driver for linux version 0.01-ww1\n");
3535 +       printk(KERN_INFO "Highpoint HPT370 Softwareraid driver for linux version 0.02\n");
3536  
3537 -       do
3538 -       {
3539 -               device=ataraid_get_device(&hptraid0_ops);
3540 -               if (device<0)
3541 -                       return (count?0:-ENODEV);
3542 -               retval = hptraid_init_one(device, HPT_T_RAID_0);
3543 -               if (retval)
3544 -                       ataraid_release_device(device);
3545 -               else
3546 -                       count++;
3547 -       } while(!retval);
3548 -       do
3549 -       {
3550 -               device=ataraid_get_device(&hptraid1_ops);
3551 -               if (device<0)
3552 -                       return (count?0:-ENODEV);
3553 -               retval = hptraid_init_one(device, HPT_T_RAID_1);
3554 -               if (retval)
3555 -                       ataraid_release_device(device);
3556 -               else
3557 -                       count++;
3558 -       } while(!retval);
3559 -       do
3560 -       {
3561 -               device=ataraid_get_device(&hptraidspan_ops);
3562 -               if (device<0)
3563 -                       return (count?0:-ENODEV);
3564 -               retval = hptraid_init_one(device, HPT_T_SPAN);
3565 -               if (retval)
3566 -                       ataraid_release_device(device);
3567 -               else
3568 -                       count++;
3569 -       } while(!retval);
3570 +       for(i=0; oplist[i].op; i++) {
3571 +               do
3572 +               {
3573 +                       device=ataraid_get_device(oplist[i].op);
3574 +                       if (device<0)
3575 +                               return (count?0:-ENODEV);
3576 +                       retval = hptraid_init_one(device, oplist[i].type,
3577 +                                       oplist[i].label);
3578 +                       if (retval)
3579 +                               ataraid_release_device(device);
3580 +                       else
3581 +                               count++;
3582 +               } while(!retval);
3583 +       }
3584         return (count?0:retval);
3585  }
3586  
3587  static void __exit hptraid_exit (void)
3588  {
3589         int i,device;
3590 -       for (device = 0; device<16; device++) {
3591 +       for (device = 0; device<14; device++) {
3592                 for (i=0;i<8;i++)  {
3593                         struct block_device *bdev = raid[device].disk[i].bdev;
3594                         raid[device].disk[i].bdev = NULL;
3595                         if (bdev)
3596                                 blkdev_put(bdev, BDEV_RAW);
3597                 }       
3598 -               if (raid[device].sectors)
3599 +               if (raid[device].sectors) {
3600                         ataraid_release_device(device);
3601 +                       if( raid[device].raid01 ) {
3602 +                               kfree(raid[device].raid01);
3603 +                       }
3604 +               }
3605         }
3606  }
3607  
3608 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/ide/setup-pci.c linux.21-ac4/drivers/ide/setup-pci.c
3609 --- linux.vanilla/drivers/ide/setup-pci.c       2003-06-14 00:11:32.000000000 +0100
3610 +++ linux.21-ac4/drivers/ide/setup-pci.c        2003-05-21 18:52:00.000000000 +0100
3611 @@ -137,7 +137,7 @@
3612                                 "native PCI mode\n", name);
3613                         return -EOPNOTSUPP;
3614                 }
3615 -               printk("%s: placing both ports into native PCI mode\n", name);
3616 +               printk(KERN_INFO "%s: placing both ports into native PCI mode\n", name);
3617                 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
3618                 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
3619                     (progif & 5) != 5) {
3620 @@ -183,10 +183,9 @@
3621  second_chance_to_dma:
3622  #endif /* CONFIG_BLK_DEV_IDEDMA_FORCED */
3623  
3624 -       if ((hwif->mmio) && (hwif->dma_base))
3625 +       if (hwif->mmio && hwif->dma_base)
3626                 return hwif->dma_base;
3627 -
3628 -       if (hwif->mate && hwif->mate->dma_base) {
3629 +       else if (hwif->mate && hwif->mate->dma_base) {
3630                 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
3631         } else {
3632                 dma_base = (hwif->mmio) ?
3633 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/drivers/scsi/ide-scsi.c linux.21-ac4/drivers/scsi/ide-scsi.c
3634 --- linux.vanilla/drivers/scsi/ide-scsi.c       2003-06-14 00:11:35.000000000 +0100
3635 +++ linux.21-ac4/drivers/scsi/ide-scsi.c        2003-06-27 13:39:01.000000000 +0100
3636 @@ -1105,15 +1105,34 @@
3637  
3638  int idescsi_reset (Scsi_Cmnd *cmd, unsigned int resetflags)
3639  {
3640 +       return SCSI_RESET_SNOOZE;
3641 +
3642 +#ifdef WORK_IN_PROGRESS
3643         ide_drive_t *drive      = idescsi_drives[cmd->target];
3644  
3645 -       /* We cannot reset the interface holding the lock. We can
3646 -          drop the lock here however */
3647 +       /* At this point the state machine is running, that
3648 +          requires we are especially careful. Ideally we want
3649 +          to abort commands on timeout only if they hit the
3650 +          cable but thats harder */
3651 +
3652 +       DRIVER(drive)->abort(drive, "scsi reset");
3653 +       if(HWGROUP(drive)->handler)
3654 +               BUG();
3655 +       
3656 +       /* Ok the state machine is halted but make sure it
3657 +          doesn't restart too early */ 
3658            
3659 -       spin_unlock(&io_request_lock);
3660 -       (void) ide_do_reset(drive);
3661 -       spin_lock(&io_request_lock);
3662 +       HWGROUP(drive)->busy = 1;
3663 +       spin_unlock_irq(&io_request_lock);
3664 +       
3665 +       /* Apply the mallet of re-education firmly to the drive */
3666 +       ide_do_reset(drive);
3667 +
3668 +       /* At this point the reset state machine is running and
3669 +          its termination will kick off the next command */    
3670 +       spin_lock_irq(&io_request_lock);
3671         return SCSI_RESET_SUCCESS;
3672 +#endif 
3673  }
3674  
3675  int idescsi_bios (Disk *disk, kdev_t dev, int *parm)
3676 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/include/linux/ide.h linux.21-ac4/include/linux/ide.h
3677 --- linux.vanilla/include/linux/ide.h   2003-06-14 00:11:42.000000000 +0100
3678 +++ linux.21-ac4/include/linux/ide.h    2003-06-27 17:13:09.000000000 +0100
3679 @@ -1744,6 +1744,12 @@
3680  extern void ide_toggle_bounce(ide_drive_t *drive, int on);
3681  extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
3682  
3683 +/* ide driver registration */
3684 +typedef void (*ide_driver_call)(void);
3685 +extern void __init ide_register_driver(ide_driver_call);
3686 +
3687 +/* ide locks for 2.4 */
3688 +
3689  #define ide_lock               (io_request_lock)
3690  #define DRIVE_LOCK(drive)       ((drive)->queue.queue_lock)
3691  
3692 diff -u --new-file --recursive --exclude-from /usr/src/exclude linux.vanilla/include/linux/pci_ids.h linux.21-ac3/include/linux/pci_ids.h
3693 --- linux.vanilla/include/linux/pci_ids.h       2003-06-14 00:11:42.000000000 +0100
3694 +++ linux.21-ac3/include/linux/pci_ids.h        2003-06-22 13:51:39.000000000 +0100
3695 @@ -493,6 +493,7 @@
3696  #define PCI_DEVICE_ID_SI_601           0x0601
3697  #define PCI_DEVICE_ID_SI_620           0x0620
3698  #define PCI_DEVICE_ID_SI_630           0x0630
3699 +#define PCI_DEVICE_ID_SI_633           0x0633
3700  #define PCI_DEVICE_ID_SI_635           0x0635
3701  #define PCI_DEVICE_ID_SI_640           0x0640
3702  #define PCI_DEVICE_ID_SI_645           0x0645
3703 @@ -501,7 +502,9 @@
3704  #define PCI_DEVICE_ID_SI_650           0x0650
3705  #define PCI_DEVICE_ID_SI_651           0x0651
3706  #define PCI_DEVICE_ID_SI_652           0x0652
3707 +#define PCI_DEVICE_ID_SI_655           0x0655
3708  #define PCI_DEVICE_ID_SI_730           0x0730
3709 +#define PCI_DEVICE_ID_SI_733           0x0733
3710  #define PCI_DEVICE_ID_SI_630_VGA       0x6300
3711  #define PCI_DEVICE_ID_SI_730_VGA       0x7300
3712  #define PCI_DEVICE_ID_SI_735           0x0735
3713 @@ -519,7 +522,10 @@
3714  #define PCI_DEVICE_ID_SI_5513          0x5513
3715  #define PCI_DEVICE_ID_SI_5518          0x5518
3716  #define PCI_DEVICE_ID_SI_5571          0x5571
3717 +#define PCI_DEVICE_ID_SI_5581          0x5581
3718 +#define PCI_DEVICE_ID_SI_5582          0x5582
3719  #define PCI_DEVICE_ID_SI_5591          0x5591
3720 +#define PCI_DEVICE_ID_SI_5596          0x5596
3721  #define PCI_DEVICE_ID_SI_5597          0x5597
3722  #define PCI_DEVICE_ID_SI_5598          0x5598
3723  #define PCI_DEVICE_ID_SI_5600          0x5600
3724 @@ -760,6 +766,8 @@
3725  #define PCI_DEVICE_ID_SUN_HUMMINGBIRD  0xa001
3726  
3727  #define PCI_VENDOR_ID_CMD              0x1095
3728 +#define PCI_DEVICE_ID_SII_1210SA       0x0240
3729 +
3730  #define PCI_DEVICE_ID_CMD_640          0x0640
3731  #define PCI_DEVICE_ID_CMD_643          0x0643
3732  #define PCI_DEVICE_ID_CMD_646          0x0646
3733 @@ -923,7 +931,9 @@
3734  #define PCI_DEVICE_ID_NVIDIA_GEFORCE2_ULTRA    0x0152
3735  #define PCI_DEVICE_ID_NVIDIA_QUADRO2_PRO       0x0153
3736  #define PCI_DEVICE_ID_NVIDIA_IGEFORCE2         0x01a0
3737 +#define PCI_DEVICE_ID_NVIDIA_NFORCE            0x01a4
3738  #define PCI_DEVICE_ID_NVIDIA_NFORCE_IDE                0x01bc
3739 +#define PCI_DEVICE_ID_NVIDIA_NFORCE2           0x01e0
3740  #define PCI_DEVICE_ID_NVIDIA_GEFORCE3          0x0200
3741  #define PCI_DEVICE_ID_NVIDIA_GEFORCE3_1                0x0201
3742  #define PCI_DEVICE_ID_NVIDIA_GEFORCE3_2                0x0202
3743 @@ -1025,13 +1035,14 @@
3744  #define PCI_DEVICE_ID_VIA_8622         0x3102
3745  #define PCI_DEVICE_ID_VIA_8233C_0      0x3109
3746  #define PCI_DEVICE_ID_VIA_8361         0x3112
3747 -#define PCI_DEVICE_ID_VIA_8375     0x3116
3748 +#define PCI_DEVICE_ID_VIA_8375         0x3116
3749  #define PCI_DEVICE_ID_VIA_8233A                0x3147
3750 -#define PCI_DEVICE_ID_VIA_P4X333   0x3168
3751 -#define PCI_DEVICE_ID_VIA_8235        0x3177
3752 -#define PCI_DEVICE_ID_VIA_8377_0  0x3189
3753 +#define PCI_DEVICE_ID_VIA_P4M266       0x3148
3754 +#define PCI_DEVICE_ID_VIA_8237_SATA    0x3149
3755 +#define PCI_DEVICE_ID_VIA_P4X333       0x3168
3756 +#define PCI_DEVICE_ID_VIA_8235         0x3177
3757  #define PCI_DEVICE_ID_VIA_8377_0       0x3189
3758 -#define PCI_DEVICE_ID_VIA_8237     0x3227
3759 +#define PCI_DEVICE_ID_VIA_8237         0x3227
3760  #define PCI_DEVICE_ID_VIA_86C100A      0x6100
3761  #define PCI_DEVICE_ID_VIA_8231         0x8231
3762  #define PCI_DEVICE_ID_VIA_8231_4       0x8235
3763 @@ -1185,6 +1196,7 @@
3764  #define PCI_DEVICE_ID_SBE_WANXL400     0x0104
3765  
3766  #define PCI_VENDOR_ID_TOSHIBA          0x1179
3767 +#define PCI_DEVICE_ID_TOSHIBA_PICCOLO  0x0102
3768  #define PCI_DEVICE_ID_TOSHIBA_601      0x0601
3769  #define PCI_DEVICE_ID_TOSHIBA_TOPIC95  0x060a
3770  #define PCI_DEVICE_ID_TOSHIBA_TOPIC97  0x060f
3771 @@ -1765,6 +1777,7 @@
3772  #define PCI_DEVICE_ID_INTEL_82801DB_7  0x24c7
3773  #define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca
3774  #define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb
3775 +#define PCI_DEVICE_ID_INTEL_82801DB_12  0x24cc
3776  #define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd
3777  #define PCI_DEVICE_ID_INTEL_82801EB_0  0x24d0
3778  #define PCI_DEVICE_ID_INTEL_82801EB_1  0x24d1
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