linux-2.4.20-gcc33.patch

   1 --- linux-2.4.20-orig/drivers/ide/ide-cd.h      2002-12-10 17:46:28 +0900
   2 +++ linux-2.4.20/drivers/ide/ide-cd.h   2003-05-16 00:59:53 +0900
   3 @@ -437,7 +437,7 @@
   4
   5         byte     curlba[3];
   6         byte     nslots;
   7 -       __u8 short slot_tablelen;
   8 +       __u8     slot_tablelen;
   9  };
  10
  11
  12 --- linux-2.4.20-orig/net/core/rtnetlink.c      2002-12-09 16:38:46 +0900
  13 +++ linux-2.4.20/net/core/rtnetlink.c   2003-05-16 01:31:20 +0900
  14 @@ -394,7 +394,7 @@
  15   * Malformed skbs with wrong lengths of messages are discarded silently.
  16   */
  17
  18 -extern __inline__ int rtnetlink_rcv_skb(struct sk_buff *skb)
  19 +__inline__ int rtnetlink_rcv_skb(struct sk_buff *skb)
  20  {
  21         int err;
  22         struct nlmsghdr * nlh;
  23 --- linux-2.4.20/drivers/atm/ambassador.c.orig  Thu Sep 13 22:21:32 2001
  24 +++ linux-2.4.20/drivers/atm/ambassador.c       Wed Jun 11 08:42:37 2003
  25 @@ -290,12 +290,12 @@
  26  /********** microcode **********/
  27
  28  #ifdef AMB_NEW_MICROCODE
  29 -#define UCODE(x) UCODE1(atmsar12.,x)
  30 +#define UCODE(x) UCODE1(atmsar12,x)
  31  #else
  32 -#define UCODE(x) UCODE1(atmsar11.,x)
  33 +#define UCODE(x) UCODE1(atmsar11,x)
  34  #endif
  35  #define UCODE2(x) #x
  36 -#define UCODE1(x,y) UCODE2(x ## y)
  37 +#define UCODE1(x,y) UCODE2(x.y)
  38
  39  static u32 __initdata ucode_start =
  40  #include UCODE(start)
  41 --- linux-2.4.20/include/linux/mtd/nftl.h.org   Fri Jun  6 15:46:54 2003
  42 +++ linux-2.4.20/include/linux/mtd/nftl.h       Wed Jun 11 13:49:12 2003
  43 @@ -97,7 +97,7 @@
  44         __u16 lastEUN;                  /* should be suppressed */
  45         __u16 numfreeEUNs;
  46         __u16 LastFreeEUN;              /* To speed up finding a free EUN */
  47 -       __u32 long nr_sects;
  48 +       __u32 nr_sects;
  49         int head,sect,cyl;
  50         __u16 *EUNtable;                /* [numvunits]: First EUN for each virtual unit  */
  51         __u16 *ReplUnitTable;           /* [numEUNs]: ReplUnitNumber for each */
  52 diff -Nur --exclude='*.orig' --exclude='*.o' linux-2.4.20.old/drivers/net/fealnx.c linux-2.4.20/drivers/net/fealnx.c
  53 --- linux-2.4.20.old/drivers/net/fealnx.c       Mon Jun 16 13:16:08 2003
  54 +++ linux-2.4.20/drivers/net/fealnx.c   Mon Jun 16 13:16:09 2003
  55 @@ -1198,7 +1198,7 @@
  56                 printk("\n");
  57         }
  58
  59 -          + dev->if_port = np->default_port;
  60 +       dev->if_port = np->default_port;
  61         /* Reinit. Gross */
  62
  63         /* Reset the chip's Tx and Rx processes. */
  64 diff -Nur --exclude='*.orig' --exclude='*.o' linux-2.4.20.old/drivers/net/irda/ma600.c linux-2.4.20/drivers/net/irda/ma600.c
  65 --- linux-2.4.20.old/drivers/net/irda/ma600.c   Mon Jun 16 13:16:08 2003
  66 +++ linux-2.4.20/drivers/net/irda/ma600.c       Mon Jun 16 13:16:09 2003
  67 @@ -47,9 +47,9 @@
  68         #undef ASSERT(expr, func)
  69         #define ASSERT(expr, func) \
  70         if(!(expr)) { \
  71 -               printk( "Assertion failed! %s,%s,%s,line=%d\n",\
  72 -               #expr,__FILE__,__FUNCTION__,__LINE__); \
  73 -               ##func}
  74 +               printk( "Assertion failed! %s,%s,line=%d\n",\
  75 +               __FILE__,__FUNCTION__,__LINE__); \
  76 +               }
  77  #endif
  78
  79  /* convert hex value to ascii hex */
  80 diff -Nur --exclude='*.orig' --exclude='*.o' linux-2.4.20.old/drivers/video/controlfb.c linux-2.4.20/drivers/video/controlfb.c
  81 --- linux-2.4.20.old/drivers/video/controlfb.c  Mon Jun 16 13:16:08 2003
  82 +++ linux-2.4.20/drivers/video/controlfb.c      Mon Jun 16 13:16:09 2003
  83 @@ -132,7 +132,7 @@
  84  };
  85
  86  /* control register access macro */
  87 -#define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs-> ## REG).r))
  88 +#define CNTRL_REG(INFO,REG) (&(((INFO)->control_regs-> REG).r))
  89
  90
  91  /******************** Prototypes for exported functions ********************/
  92 diff -Nur --exclude='*.orig' --exclude='*.o' linux-2.4.20.old/include/asm-ppc/unistd.h linux-2.4.20/include/asm-ppc/unistd.h
  93 --- linux-2.4.20.old/include/asm-ppc/unistd.h   Mon Jun 16 13:16:08 2003
  94 +++ linux-2.4.20/include/asm-ppc/unistd.h       Mon Jun 16 13:16:09 2003
  95 @@ -250,7 +250,7 @@
  96                (type) __sc_ret
  97
  98  #define __syscall_clobbers \
  99 -       "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12"
 100 +       "r6", "r7", "r8", "r9", "r10", "r11", "r12"
 101
 102  #define _syscall0(type,name)                                           \
 103  type name(void)                                                                \
 104 diff -Nur --exclude='*.orig' --exclude='*.o' linux-2.4.20.old/drivers/scsi/aic7xxx/aic79xx_osm.c linux-2.4.20/drivers/scsi/aic7xxx/aic79xx_osm.c
 105 --- linux-2.4.20.old/drivers/scsi/aic7xxx/aic79xx_osm.c Mon Jun 16 13:16:08 2003
 106 +++ linux-2.4.20/drivers/scsi/aic7xxx/aic79xx_osm.c     Mon Jun 16 13:26:12 2003
 107 @@ -336,31 +336,31 @@
 108  MODULE_LICENSE("Dual BSD/GPL");
 109  #endif
 110  MODULE_PARM(aic79xx, "s");
 111 -MODULE_PARM_DESC(aic79xx, "period delimited, options string.
 112 -       verbose                 Enable verbose/diagnostic logging
 113 -       debug                   Bitmask of debug values to enable
 114 -       no_reset                Supress initial bus resets
 115 -       extended                Enable extended geometry on all controllers
 116 -       periodic_otag           Send an ordered tagged transaction periodically
 117 -                               to prevent tag starvation.  This may be
 118 -                               required by some older disk drives/RAID arrays.
 119 -       reverse_scan            Sort PCI devices highest Bus/Slot to lowest
 120 -       tag_info:<tag_str>      Set per-target tag depth
 121 -       rd_strm:<rd_strm_masks> Set per-target read streaming setting.
 122 -       seltime:<int>           Selection Timeout(0/256ms,1/128ms,2/64ms,3/32ms)
 123 -
 124 -       Sample /etc/modules.conf line:
 125 -               Enable verbose logging
 126 -               Set tag depth on Controller 2/Target 2 to 10 tags
 127 -               Shorten the selection timeout to 128ms from its default of 256
 128 -
 129 -       options aic79xx='\"verbose.tag_info:{{}.{}.{..10}}.seltime:1\"'
 130 -
 131 -       Sample /etc/modules.conf line:
 132 -               Change Read Streaming for Controller's 2 and 3
 133 -
 134 -       options aic79xx='\"rd_strm:{..0xFFF0.0xC0F0}\"'
 135 -");
 136 +MODULE_PARM_DESC(aic79xx, "period delimited, options string."\
 137 +"      verbose                 Enable verbose/diagnostic logging"\
 138 +"      debug                   Bitmask of debug values to enable"\
 139 +"      no_reset                Supress initial bus resets"\
 140 +"      extended                Enable extended geometry on all controllers"\
 141 +"      periodic_otag           Send an ordered tagged transaction periodically"\
 142 +"                              to prevent tag starvation.  This may be"\
 143 +"                              required by some older disk drives/RAID arrays. "\
 144 +"      reverse_scan            Sort PCI devices highest Bus/Slot to lowest"\
 145 +"      tag_info:<tag_str>      Set per-target tag depth"\
 146 +"      rd_strm:<rd_strm_masks> Set per-target read streaming setting."\
 147 +"      seltime:<int>           Selection Timeout(0/256ms,1/128ms,2/64ms,3/32ms)"\
 148 +""\
 149 +"      Sample /etc/modules.conf line:"\
 150 +"              Enable verbose logging"\
 151 +"              Set tag depth on Controller 2/Target 2 to 10 tags"\
 152 +"              Shorten the selection timeout to 128ms from its default of 256"\
 153 +""\
 154 +"      options aic79xx='\"verbose.tag_info:{{}.{}.{..10}}.seltime:1\"'"\
 155 +""\
 156 +"      Sample /etc/modules.conf line:"\
 157 +"              Change Read Streaming for Controller's 2 and 3"\
 158 +""\
 159 +"      options aic79xx='\"rd_strm:{..0xFFF0.0xC0F0}\"'"
 160 +);
 161  #endif
 162
 163  static void ahd_linux_handle_scsi_status(struct ahd_softc *,
 164 diff -Nur --exclude='*.orig' --exclude='*.o' linux-2.4.20.old/drivers/scsi/aic7xxx/aic7xxx_osm.c linux-2.4.20/drivers/scsi/aic7xxx/aic7xxx_osm.c
 165 --- linux-2.4.20.old/drivers/scsi/aic7xxx/aic7xxx_osm.c Mon Jun 16 13:16:08 2003
 166 +++ linux-2.4.20/drivers/scsi/aic7xxx/aic7xxx_osm.c     Mon Jun 16 13:16:09 2003
 167 @@ -417,26 +417,26 @@
 168  MODULE_LICENSE("Dual BSD/GPL");
 169  #endif
 170  MODULE_PARM(aic7xxx, "s");
 171 -MODULE_PARM_DESC(aic7xxx, "period delimited, options string.
 172 -       verbose                 Enable verbose/diagnostic logging
 173 -       no_probe                Disable EISA/VLB controller probing
 174 -       no_reset                Supress initial bus resets
 175 -       extended                Enable extended geometry on all controllers
 176 -       periodic_otag           Send an ordered tagged transaction periodically
 177 -                               to prevent tag starvation.  This may be
 178 -                               required by some older disk drives/RAID arrays.
 179 -       reverse_scan            Sort PCI devices highest Bus/Slot to lowest
 180 -       tag_info:<tag_str>      Set per-target tag depth
 181 -       seltime:<int>           Selection Timeout(0/256ms,1/128ms,2/64ms,3/32ms)
 182 -
 183 -       Sample /etc/modules.conf line:
 184 -               Enable verbose logging
 185 -               Disable EISA/VLB probing
 186 -               Set tag depth on Controller 2/Target 2 to 10 tags
 187 -               Shorten the selection timeout to 128ms from its default of 256
 188 -
 189 -       options aic7xxx='\"verbose.no_probe.tag_info:{{}.{}.{..10}}.seltime:1\"'
 190 -");
 191 +MODULE_PARM_DESC(aic7xxx, "period delimited, options string." \
 192 +"      verbose                 Enable verbose/diagnostic logging" \
 193 +"      no_probe                Disable EISA/VLB controller probing" \
 194 +"      no_reset                Supress initial bus resets" \
 195 +"      extended                Enable extended geometry on all controllers" \
 196 +"      periodic_otag           Send an ordered tagged transaction periodically" \
 197 +"                              to prevent tag starvation.  This may be" \
 198 +"                              required by some older disk drives/RAID arrays." \
 199 +"      reverse_scan            Sort PCI devices highest Bus/Slot to lowest" \
 200 +"      tag_info:<tag_str>      Set per-target tag depth" \
 201 +"      seltime:<int>           Selection Timeout(0/256ms,1/128ms,2/64ms,3/32ms)" \
 202 +" " \
 203 +"      Sample /etc/modules.conf line:" \
 204 +"              Enable verbose logging" \
 205 +"              Disable EISA/VLB probing" \
 206 +"              Set tag depth on Controller 2/Target 2 to 10 tags" \
 207 +"              Shorten the selection timeout to 128ms from its default of 256" \
 208 +" " \
 209 +"      options aic7xxx='\"verbose.no_probe.tag_info:{{}.{}.{..10}}.seltime:1\"'"
 210 +);
 211  #endif
 212
 213  static void ahc_linux_handle_scsi_status(struct ahc_softc *,
 214 diff -Nur --exclude='*.orig' linux-2.4.20.org/drivers/sound/cs46xx.c linux-2.4.20/drivers/sound/cs46xx.c
 215 --- linux-2.4.20.org/drivers/sound/cs46xx.c     Sat Aug  3 00:39:44 2002
 216 +++ linux-2.4.20/drivers/sound/cs46xx.c Tue Jun 17 06:25:18 2003
 217 @@ -947,8 +947,8 @@
 218
 219  struct InitStruct
 220  {
 221 -    u32 long off;
 222 -    u32 long val;
 223 +    u32 off;
 224 +    u32 val;
 225  } InitArray[] = { {0x00000040, 0x3fc0000f},
 226                    {0x0000004c, 0x04800000},
 227
 228 diff -Nur --exclude='*.orig' linux-2.4.20.org/fs/reiserfs/super.c linux-2.4.20/fs/reiserfs/super.c
 229 --- linux-2.4.20.org/fs/reiserfs/super.c        Tue Jun 17 07:17:19 2003
 230 +++ linux-2.4.20/fs/reiserfs/super.c    Tue Jun 17 06:44:51 2003
 231 @@ -944,8 +944,7 @@
 232      ll_rw_block(READ, 1, &(SB_AP_BITMAP(s)[i].bh)) ;
 233      wait_on_buffer(SB_AP_BITMAP(s)[i].bh) ;
 234      if (!buffer_uptodate(SB_AP_BITMAP(s)[i].bh)) {
 235 -      printk("reread_meta_blocks, error reading bitmap block number %d at
 236 -      %ld\n", i, SB_AP_BITMAP(s)[i].bh->b_blocknr) ;
 237 +      printk("reread_meta_blocks, error reading bitmap block number %d at %ld\n", i, SB_AP_BITMAP(s)[i].bh->b_blocknr) ;
 238        return 1 ;
 239      }
 240    }
 241 diff -Nur --exclude='*.orig' linux-2.4.20.org/net/ipv4/netfilter/ip_nat_core.c linux-2.4.20/net/ipv4/netfilter/ip_nat_core.c
 242 --- linux-2.4.20.org/net/ipv4/netfilter/ip_nat_core.c   Tue Jun 17 07:17:18 2003
 243 +++ linux-2.4.20/net/ipv4/netfilter/ip_nat_core.c       Tue Jun 17 07:05:01 2003
 244 @@ -851,8 +851,7 @@
 245                         if (exp_for_packet(exp, pskb)) {
 246                                 /* FIXME: May be true multiple times in the
 247                                  * case of UDP!! */
 248 -                               DEBUGP("calling nat helper (exp=%p) for
 249 -                                       packet\n", exp);
 250 +                               DEBUGP("calling nat helper (exp=%p) for packet\n", exp);
 251                                 ret = helper->help(ct, exp, info, ctinfo,
 252                                                    hooknum, pskb);
 253                                 if (ret != NF_ACCEPT) {
 254 diff -Nur --exclude='*.orig' --exclude='*.org' linux-2.4.20.org/drivers/net/tokenring/olympic.c linux-2.4.20/drivers/net/tokenring/olympic.c
 255 --- linux-2.4.20.org/drivers/net/tokenring/olympic.c    2002-11-28 23:53:14.000000000 +0000
 256 +++ linux-2.4.20/drivers/net/tokenring/olympic.c        2003-06-20 12:23:35.000000000 +0000
 257 @@ -655,8 +655,8 @@
 258         printk(" stat_ring[7]: %p\n", &(olympic_priv->olympic_rx_status_ring[7])  );
 259
 260         printk("RXCDA: %x, rx_ring[0]: %p\n",readl(olympic_mmio+RXCDA),&olympic_priv->olympic_rx_ring[0]);
 261 -       printk("Rx_ring_dma_addr = %08x, rx_status_dma_addr =
 262 -%08x\n",olympic_priv->rx_ring_dma_addr,olympic_priv->rx_status_ring_dma_addr) ;
 263 +       printk("Rx_ring_dma_addr = %08x, rx_status_dma_addr =%08x\n",
 264 +               olympic_priv->rx_ring_dma_addr,olympic_priv->rx_status_ring_dma_addr) ;
 265  #endif
 266
 267         writew((((readw(olympic_mmio+RXENQ)) & 0x8000) ^ 0x8000) | i,olympic_mmio+RXENQ);
 268 diff -Nur --exclude='*.orig' --exclude='*.org' linux-2.4.20.org/drivers/net/wan/sbni.c linux-2.4.20/drivers/net/wan/sbni.c
 269 --- linux-2.4.20.org/drivers/net/wan/sbni.c     2002-11-28 23:53:14.000000000 +0000
 270 +++ linux-2.4.20/drivers/net/wan/sbni.c 2003-06-20 12:47:13.000000000 +0000
 271 @@ -1547,88 +1547,6 @@
 272
 273  /* -------------------------------------------------------------------------- */
 274
 275 -#ifdef ASM_CRC
 276 -
 277 -static u32
 278 -calc_crc32( u32  crc,  u8  *p,  u32  len )
 279 -{
 280 -       register u32  _crc __asm ( "ax" );
 281 -       _crc = crc;
 282 -
 283 -       __asm __volatile (
 284 -               "xorl   %%ebx, %%ebx\n"
 285 -               "movl   %1, %%esi\n"
 286 -               "movl   %2, %%ecx\n"
 287 -               "movl   $crc32tab, %%edi\n"
 288 -               "shrl   $2, %%ecx\n"
 289 -               "jz     1f\n"
 290 -
 291 -               ".align 4\n"
 292 -       "0:\n"
 293 -               "movb   %%al, %%bl\n"
 294 -               "movl   (%%esi), %%edx\n"
 295 -               "shrl   $8, %%eax\n"
 296 -               "xorb   %%dl, %%bl\n"
 297 -               "shrl   $8, %%edx\n"
 298 -               "xorl   (%%edi,%%ebx,4), %%eax\n"
 299 -
 300 -               "movb   %%al, %%bl\n"
 301 -               "shrl   $8, %%eax\n"
 302 -               "xorb   %%dl, %%bl\n"
 303 -               "shrl   $8, %%edx\n"
 304 -               "xorl   (%%edi,%%ebx,4), %%eax\n"
 305 -
 306 -               "movb   %%al, %%bl\n"
 307 -               "shrl   $8, %%eax\n"
 308 -               "xorb   %%dl, %%bl\n"
 309 -               "movb   %%dh, %%dl\n"
 310 -               "xorl   (%%edi,%%ebx,4), %%eax\n"
 311 -
 312 -               "movb   %%al, %%bl\n"
 313 -               "shrl   $8, %%eax\n"
 314 -               "xorb   %%dl, %%bl\n"
 315 -               "addl   $4, %%esi\n"
 316 -               "xorl   (%%edi,%%ebx,4), %%eax\n"
 317 -
 318 -               "decl   %%ecx\n"
 319 -               "jnz    0b\n"
 320 -
 321 -       "1:\n"
 322 -               "movl   %2, %%ecx\n"
 323 -               "andl   $3, %%ecx\n"
 324 -               "jz     2f\n"
 325 -
 326 -               "movb   %%al, %%bl\n"
 327 -               "shrl   $8, %%eax\n"
 328 -               "xorb   (%%esi), %%bl\n"
 329 -               "xorl   (%%edi,%%ebx,4), %%eax\n"
 330 -
 331 -               "decl   %%ecx\n"
 332 -               "jz     2f\n"
 333 -
 334 -               "movb   %%al, %%bl\n"
 335 -               "shrl   $8, %%eax\n"
 336 -               "xorb   1(%%esi), %%bl\n"
 337 -               "xorl   (%%edi,%%ebx,4), %%eax\n"
 338 -
 339 -               "decl   %%ecx\n"
 340 -               "jz     2f\n"
 341 -
 342 -               "movb   %%al, %%bl\n"
 343 -               "shrl   $8, %%eax\n"
 344 -               "xorb   2(%%esi), %%bl\n"
 345 -               "xorl   (%%edi,%%ebx,4), %%eax\n"
 346 -       "2:\n"
 347 -               :
 348 -               : "a" (_crc), "g" (p), "g" (len)
 349 -               : "ax", "bx", "cx", "dx", "si", "di"
 350 -       );
 351 -
 352 -       return  _crc;
 353 -}
 354 -
 355 -#else  /* ASM_CRC */
 356 -
 357  static u32
 358  calc_crc32( u32  crc,  u8  *p,  u32  len )
 359  {
 360 @@ -1638,8 +1556,6 @@
 361         return  crc;
 362  }
 363
 364 -#endif /* ASM_CRC */
 365 -
 366
 367  static u32  crc32tab[] __attribute__ ((aligned(8))) = {
 368         0xD202EF8D,  0xA505DF1B,  0x3C0C8EA1,  0x4B0BBE37,
 369 diff -Nur --exclude='*.orig' --exclude='*.org' linux-2.4.20.org/drivers/net/wan/sdla_chdlc.c linux-2.4.20/drivers/net/wan/sdla_chdlc.c
 370 --- linux-2.4.20.org/drivers/net/wan/sdla_chdlc.c       2003-06-20 12:41:46.000000000 +0000
 371 +++ linux-2.4.20/drivers/net/wan/sdla_chdlc.c   2003-06-20 12:41:03.000000000 +0000
 372 @@ -591,8 +591,7 @@
 373
 374
 375                 if (chdlc_set_intr_mode(card, APP_INT_ON_TIMER)){
 376 -                       printk (KERN_INFO "%s:
 377 -                               Failed to set interrupt triggers!\n",
 378 +                       printk (KERN_INFO "%s: Failed to set interrupt triggers!\n",
 379                                 card->devname);
 380                         return -EIO;
 381                 }
 382 --- linux-2.4.20/net/decnet/dn_table.c.org      Fri Dec 21 17:42:05 2001
 383 +++ linux-2.4.20/net/decnet/dn_table.c  Mon Jun 23 13:23:27 2003
 384 @@ -836,8 +836,8 @@
 385                  return NULL;
 386
 387          if (in_interrupt() && net_ratelimit()) {
 388 -                printk(KERN_DEBUG "DECnet: BUG! Attempt to create routing table
 389 -from interrupt\n");
 390 +                printk(KERN_DEBUG
 391 +               "DECnet: BUG! Attempt to create routing table from interrupt\n");
 392                  return NULL;
 393          }
 394          if ((t = kmalloc(sizeof(struct dn_fib_table), GFP_KERNEL)) == NULL)
 395 --- linux-2.4.20/arch/i386/math-emu/poly.h~     Thu Jul 26 20:37:38 2001
 396 +++ linux-2.4.20/arch/i386/math-emu/poly.h      Thu Jul 10 02:09:29 2003
 397 @@ -64,7 +64,7 @@
 398                                       const unsigned long arg2)
 399  {
 400    int retval;
 401 -  asm volatile ("mull %2; movl %%edx,%%eax" \
 402 +  asm volatile ("mull %2; movl %%edx,%%eax; " \
 403                 :"=a" (retval) \
 404                 :"0" (arg1), "g" (arg2) \
 405                 :"dx");
 406 @@ -75,10 +75,10 @@
 407  /* Add the 12 byte Xsig x2 to Xsig dest, with no checks for overflow. */
 408  static inline void add_Xsig_Xsig(Xsig *dest, const Xsig *x2)
 409  {
 410 -  asm volatile ("movl %1,%%edi; movl %2,%%esi;
 411 -                 movl (%%esi),%%eax; addl %%eax,(%%edi);
 412 -                 movl 4(%%esi),%%eax; adcl %%eax,4(%%edi);
 413 -                 movl 8(%%esi),%%eax; adcl %%eax,8(%%edi);"
 414 +  asm volatile ("movl %1,%%edi; movl %2,%%esi; "
 415 +                 "movl (%%esi),%%eax; addl %%eax,(%%edi); "
 416 +                 "movl 4(%%esi),%%eax; adcl %%eax,4(%%edi); "
 417 +                 "movl 8(%%esi),%%eax; adcl %%eax,8(%%edi); "
 418                   :"=g" (*dest):"g" (dest), "g" (x2)
 419                   :"ax","si","di");
 420  }
 421 @@ -90,16 +90,16 @@
 422     problem, but keep fingers crossed! */
 423  static inline void add_two_Xsig(Xsig *dest, const Xsig *x2, long int *exp)
 424  {
 425 -  asm volatile ("movl %2,%%ecx; movl %3,%%esi;
 426 -                 movl (%%esi),%%eax; addl %%eax,(%%ecx);
 427 -                 movl 4(%%esi),%%eax; adcl %%eax,4(%%ecx);
 428 -                 movl 8(%%esi),%%eax; adcl %%eax,8(%%ecx);
 429 -                 jnc 0f;
 430 -                rcrl 8(%%ecx); rcrl 4(%%ecx); rcrl (%%ecx)
 431 -                 movl %4,%%ecx; incl (%%ecx)
 432 -                 movl $1,%%eax; jmp 1f;
 433 -                 0: xorl %%eax,%%eax;
 434 -                 1:"
 435 +  asm volatile ("movl %2,%%ecx; movl %3,%%esi; "
 436 +                 "movl (%%esi),%%eax; addl %%eax,(%%ecx); "
 437 +                 "movl 4(%%esi),%%eax; adcl %%eax,4(%%ecx); "
 438 +                 "movl 8(%%esi),%%eax; adcl %%eax,8(%%ecx); "
 439 +                 "jnc 0f; "
 440 +                "rcrl 8(%%ecx); rcrl 4(%%ecx); rcrl (%%ecx); "
 441 +                 "movl %4,%%ecx; incl (%%ecx); "
 442 +                 "movl $1,%%eax; jmp 1f; "
 443 +                 "0: xorl %%eax,%%eax; "
 444 +                 "1:"
 445                 :"=g" (*exp), "=g" (*dest)
 446                 :"g" (dest), "g" (x2), "g" (exp)
 447                 :"cx","si","ax");
 448 @@ -110,11 +110,11 @@
 449  /* This is faster in a loop on my 386 than using the "neg" instruction. */
 450  static inline void negate_Xsig(Xsig *x)
 451  {
 452 -  asm volatile("movl %1,%%esi; "
 453 -               "xorl %%ecx,%%ecx; "
 454 -               "movl %%ecx,%%eax; subl (%%esi),%%eax; movl %%eax,(%%esi); "
 455 -               "movl %%ecx,%%eax; sbbl 4(%%esi),%%eax; movl %%eax,4(%%esi); "
 456 -               "movl %%ecx,%%eax; sbbl 8(%%esi),%%eax; movl %%eax,8(%%esi); "
 457 +  asm volatile("movl %1,%%esi; " \
 458 +               "xorl %%ecx,%%ecx; " \
 459 +               "movl %%ecx,%%eax; subl (%%esi),%%eax; movl %%eax,(%%esi); " \
 460 +               "movl %%ecx,%%eax; sbbl 4(%%esi),%%eax; movl %%eax,4(%%esi); " \
 461 +               "movl %%ecx,%%eax; sbbl 8(%%esi),%%eax; movl %%eax,8(%%esi); " \
 462                 :"=g" (*x):"g" (x):"si","ax","cx");
 463  }
 464
 465 --- linux-2.4.20/include/asm-alpha/mmu_context.h~       2000-12-29 22:07:23.000000000 +0000
 466 +++ linux-2.4.20/include/asm-alpha/mmu_context.h        2003-07-15 20:08:39.000000000 +0000
 467 @@ -32,7 +32,7 @@
 468                 "call_pal %2 #__reload_thread"
 469                 : "=r"(v0), "=r"(a0)
 470                 : "i"(PAL_swpctx), "r"(a0)
 471 -               : "$1", "$16", "$22", "$23", "$24", "$25");
 472 +               : "$1", "$22", "$23", "$24", "$25");
 473
 474         return v0;
 475  }
 476 diff -urN linux-2.4.20/arch/alpha/lib/ev6-strncpy_from_user.S linux-2.4.20/arch/alpha/lib/ev6-strncpy_from_user.S
 477 --- linux-2.4.20/arch/alpha/lib/ev6-strncpy_from_user.S 2003-07-15 22:30:41.000000000 +0000
 478 +++ linux-2.4.20/arch/alpha/lib/ev6-strncpy_from_user.S 2003-07-15 22:33:29.000000000 +0000
 479 @@ -27,7 +27,7 @@
 480
 481
 482  #include <asm/errno.h>
 483 -#include <alpha/regdef.h>
 484 +#include <asm/regdef.h>
 485
 486
 487  /* Allow an exception for an insn; exit if we get one.  */
 488 diff -urN linux-2.4.20/arch/alpha/lib/ev6-stxcpy.S linux-2.4.20/arch/alpha/lib/ev6-stxcpy.S
 489 --- linux-2.4.20/arch/alpha/lib/ev6-stxcpy.S    2003-07-15 22:30:41.000000000 +0000
 490 +++ linux-2.4.20/arch/alpha/lib/ev6-stxcpy.S    2003-07-15 22:33:29.000000000 +0000
 491 @@ -30,7 +30,7 @@
 492   * Try not to change the actual algorithm if possible for consistency.
 493   */
 494
 495 -#include <alpha/regdef.h>
 496 +#include <asm/regdef.h>
 497
 498         .set noat
 499         .set noreorder
 500 diff -urN linux-2.4.20/arch/alpha/lib/ev6-stxncpy.S linux-2.4.20/arch/alpha/lib/ev6-stxncpy.S
 501 --- linux-2.4.20/arch/alpha/lib/ev6-stxncpy.S   2003-07-15 22:30:41.000000000 +0000
 502 +++ linux-2.4.20/arch/alpha/lib/ev6-stxncpy.S   2003-07-15 22:33:29.000000000 +0000
 503 @@ -38,7 +38,7 @@
 504   * Try not to change the actual algorithm if possible for consistency.
 505   */
 506
 507 -#include <alpha/regdef.h>
 508 +#include <asm/regdef.h>
 509
 510         .set noat
 511         .set noreorder
 512 diff -urN linux-2.4.20/arch/alpha/lib/ev67-strchr.S linux-2.4.20/arch/alpha/lib/ev67-strchr.S
 513 --- linux-2.4.20/arch/alpha/lib/ev67-strchr.S   2003-07-15 22:30:41.000000000 +0000
 514 +++ linux-2.4.20/arch/alpha/lib/ev67-strchr.S   2003-07-15 22:33:29.000000000 +0000
 515 @@ -16,7 +16,7 @@
 516   * Try not to change the actual algorithm if possible for consistency.
 517   */
 518
 519 -#include <alpha/regdef.h>
 520 +#include <asm/regdef.h>
 521
 522         .set noreorder
 523         .set noat
 524 diff -urN linux-2.4.20/arch/alpha/lib/ev67-strlen_user.S linux-2.4.20/arch/alpha/lib/ev67-strlen_user.S
 525 --- linux-2.4.20/arch/alpha/lib/ev67-strlen_user.S      2003-07-15 22:30:41.000000000 +0000
 526 +++ linux-2.4.20/arch/alpha/lib/ev67-strlen_user.S      2003-07-15 22:33:29.000000000 +0000
 527 @@ -23,7 +23,7 @@
 528   * Try not to change the actual algorithm if possible for consistency.
 529   */
 530
 531 -#include <alpha/regdef.h>
 532 +#include <asm/regdef.h>
 533
 534
 535  /* Allow an exception for an insn; exit if we get one.  */
 536 diff -urN linux-2.4.20/arch/alpha/lib/ev67-strrchr.S linux-2.4.20/arch/alpha/lib/ev67-strrchr.S
 537 --- linux-2.4.20/arch/alpha/lib/ev67-strrchr.S  2003-07-15 22:30:41.000000000 +0000
 538 +++ linux-2.4.20/arch/alpha/lib/ev67-strrchr.S  2003-07-15 22:33:29.000000000 +0000
 539 @@ -19,7 +19,7 @@
 540   */
 541
 542
 543 -#include <alpha/regdef.h>
 544 +#include <asm/regdef.h>
 545
 546         .set noreorder
 547         .set noat
 548 diff -urN linux-2.4.20/arch/alpha/lib/strchr.S linux-2.4.20/arch/alpha/lib/strchr.S
 549 --- linux-2.4.20/arch/alpha/lib/strchr.S        2003-07-15 22:30:41.000000000 +0000
 550 +++ linux-2.4.20/arch/alpha/lib/strchr.S        2003-07-15 22:33:29.000000000 +0000
 551 @@ -6,7 +6,7 @@
 552   * string, or null if it is not found.
 553   */
 554
 555 -#include <alpha/regdef.h>
 556 +#include <asm/regdef.h>
 557
 558         .set noreorder
 559         .set noat
 560 diff -urN linux-2.4.20/arch/alpha/lib/strlen_user.S linux-2.4.20/arch/alpha/lib/strlen_user.S
 561 --- linux-2.4.20/arch/alpha/lib/strlen_user.S   2003-07-15 22:30:41.000000000 +0000
 562 +++ linux-2.4.20/arch/alpha/lib/strlen_user.S   2003-07-15 22:33:29.000000000 +0000
 563 @@ -12,7 +12,7 @@
 564   * boundary when doing so.
 565   */
 566
 567 -#include <alpha/regdef.h>
 568 +#include <asm/regdef.h>
 569
 570
 571  /* Allow an exception for an insn; exit if we get one.  */
 572 diff -urN linux-2.4.20/arch/alpha/lib/strncpy_from_user.S linux-2.4.20/arch/alpha/lib/strncpy_from_user.S
 573 --- linux-2.4.20/arch/alpha/lib/strncpy_from_user.S     2003-07-15 22:30:41.000000000 +0000
 574 +++ linux-2.4.20/arch/alpha/lib/strncpy_from_user.S     2003-07-15 22:33:29.000000000 +0000
 575 @@ -12,7 +12,7 @@
 576
 577
 578  #include <asm/errno.h>
 579 -#include <alpha/regdef.h>
 580 +#include <asm/regdef.h>
 581
 582
 583  /* Allow an exception for an insn; exit if we get one.  */
 584 diff -urN linux-2.4.20/arch/alpha/lib/strrchr.S linux-2.4.20/arch/alpha/lib/strrchr.S
 585 --- linux-2.4.20/arch/alpha/lib/strrchr.S       2003-07-15 22:30:41.000000000 +0000
 586 +++ linux-2.4.20/arch/alpha/lib/strrchr.S       2003-07-15 22:33:29.000000000 +0000
 587 @@ -6,7 +6,7 @@
 588   * within a null-terminated string, or null if it is not found.
 589   */
 590
 591 -#include <alpha/regdef.h>
 592 +#include <asm/regdef.h>
 593
 594         .set noreorder
 595         .set noat
 596 diff -urN linux-2.4.20/arch/alpha/lib/stxcpy.S linux-2.4.20/arch/alpha/lib/stxcpy.S
 597 --- linux-2.4.20/arch/alpha/lib/stxcpy.S        2003-07-15 22:30:41.000000000 +0000
 598 +++ linux-2.4.20/arch/alpha/lib/stxcpy.S        2003-07-15 22:33:29.000000000 +0000
 599 @@ -20,7 +20,7 @@
 600   * Furthermore, v0, a3-a5, t11, and t12 are untouched.
 601   */
 602
 603 -#include <alpha/regdef.h>
 604 +#include <asm/regdef.h>
 605
 606         .set noat
 607         .set noreorder
 608 diff -urN linux-2.4.20/arch/alpha/lib/stxncpy.S linux-2.4.20/arch/alpha/lib/stxncpy.S
 609 --- linux-2.4.20/arch/alpha/lib/stxncpy.S       2003-07-15 22:30:41.000000000 +0000
 610 +++ linux-2.4.20/arch/alpha/lib/stxncpy.S       2003-07-15 22:33:29.000000000 +0000
 611 @@ -28,7 +28,7 @@
 612   * Furthermore, v0, a3-a5, t11, t12, and $at are untouched.
 613   */
 614
 615 -#include <alpha/regdef.h>
 616 +#include <asm/regdef.h>
 617
 618         .set noat
 619         .set noreorder
 620 --- /dev/null   Tue May  5 22:32:27 1998
 621 +++ linux-2.6.0-test1/include/asm-alpha/regdef.h        Mon Jul 14 05:32:34 2003
 622 @@ -0,0 +1,44 @@
 623 +#ifndef __alpha_regdef_h__
 624 +#define __alpha_regdef_h__
 625 +
 626 +#define v0     $0      /* function return value */
 627 +
 628 +#define t0     $1      /* temporary registers (caller-saved) */
 629 +#define t1     $2
 630 +#define t2     $3
 631 +#define t3     $4
 632 +#define t4     $5
 633 +#define t5     $6
 634 +#define t6     $7
 635 +#define t7     $8
 636 +
 637 +#define        s0      $9      /* saved-registers (callee-saved registers) */
 638 +#define        s1      $10
 639 +#define        s2      $11
 640 +#define        s3      $12
 641 +#define        s4      $13
 642 +#define        s5      $14
 643 +#define        s6      $15
 644 +#define        fp      s6      /* frame-pointer (s6 in frame-less procedures) */
 645 +
 646 +#define a0     $16     /* argument registers (caller-saved) */
 647 +#define a1     $17
 648 +#define a2     $18
 649 +#define a3     $19
 650 +#define a4     $20
 651 +#define a5     $21
 652 +
 653 +#define t8     $22     /* more temps (caller-saved) */
 654 +#define t9     $23
 655 +#define t10    $24
 656 +#define t11    $25
 657 +#define ra     $26     /* return address register */
 658 +#define t12    $27
 659 +
 660 +#define pv     t12     /* procedure-variable register */
 661 +#define AT     $at     /* assembler temporary */
 662 +#define gp     $29     /* global pointer */
 663 +#define sp     $30     /* stack pointer */
 664 +#define zero   $31     /* reads as zero, writes are noops */
 665 +
 666 +#endif /* __alpha_regdef_h__ */
 667 --- linux-2.4.20/include/asm-alpha/xor.h.orig   2000-11-13 03:39:51.000000000 +0000
 668 +++ linux-2.4.20/include/asm-alpha/xor.h        2003-07-16 11:41:27.000000000 +0000
 669 @@ -32,809 +32,809 @@
 670                                  unsigned long *, unsigned long *,
 671                                  unsigned long *, unsigned long *);
 672
 673 -asm("
 674 -       .text
 675 -       .align 3
 676 -       .ent xor_alpha_2
 677 -xor_alpha_2:
 678 -       .prologue 0
 679 -       srl $16, 6, $16
 680 -       .align 4
 681 -2:
 682 -       ldq $0,0($17)
 683 -       ldq $1,0($18)
 684 -       ldq $2,8($17)
 685 -       ldq $3,8($18)
 686 -
 687 -       ldq $4,16($17)
 688 -       ldq $5,16($18)
 689 -       ldq $6,24($17)
 690 -       ldq $7,24($18)
 691 -
 692 -       ldq $19,32($17)
 693 -       ldq $20,32($18)
 694 -       ldq $21,40($17)
 695 -       ldq $22,40($18)
 696 -
 697 -       ldq $23,48($17)
 698 -       ldq $24,48($18)
 699 -       ldq $25,56($17)
 700 -       xor $0,$1,$0            # 7 cycles from $1 load
 701 -
 702 -       ldq $27,56($18)
 703 -       xor $2,$3,$2
 704 -       stq $0,0($17)
 705 -       xor $4,$5,$4
 706 -
 707 -       stq $2,8($17)
 708 -       xor $6,$7,$6
 709 -       stq $4,16($17)
 710 -       xor $19,$20,$19
 711 -
 712 -       stq $6,24($17)
 713 -       xor $21,$22,$21
 714 -       stq $19,32($17)
 715 -       xor $23,$24,$23
 716 -
 717 -       stq $21,40($17)
 718 -       xor $25,$27,$25
 719 -       stq $23,48($17)
 720 -       subq $16,1,$16
 721 -
 722 -       stq $25,56($17)
 723 -       addq $17,64,$17
 724 -       addq $18,64,$18
 725 -       bgt $16,2b
 726 -
 727 -       ret
 728 -       .end xor_alpha_2
 729 -
 730 -       .align 3
 731 -       .ent xor_alpha_3
 732 -xor_alpha_3:
 733 -       .prologue 0
 734 -       srl $16, 6, $16
 735 -       .align 4
 736 -3:
 737 -       ldq $0,0($17)
 738 -       ldq $1,0($18)
 739 -       ldq $2,0($19)
 740 -       ldq $3,8($17)
 741 -
 742 -       ldq $4,8($18)
 743 -       ldq $6,16($17)
 744 -       ldq $7,16($18)
 745 -       ldq $21,24($17)
 746 -
 747 -       ldq $22,24($18)
 748 -       ldq $24,32($17)
 749 -       ldq $25,32($18)
 750 -       ldq $5,8($19)
 751 -
 752 -       ldq $20,16($19)
 753 -       ldq $23,24($19)
 754 -       ldq $27,32($19)
 755 -       nop
 756 -
 757 -       xor $0,$1,$1            # 8 cycles from $0 load
 758 -       xor $3,$4,$4            # 6 cycles from $4 load
 759 -       xor $6,$7,$7            # 6 cycles from $7 load
 760 -       xor $21,$22,$22         # 5 cycles from $22 load
 761 -
 762 -       xor $1,$2,$2            # 9 cycles from $2 load
 763 -       xor $24,$25,$25         # 5 cycles from $25 load
 764 -       stq $2,0($17)
 765 -       xor $4,$5,$5            # 6 cycles from $5 load
 766 -
 767 -       stq $5,8($17)
 768 -       xor $7,$20,$20          # 7 cycles from $20 load
 769 -       stq $20,16($17)
 770 -       xor $22,$23,$23         # 7 cycles from $23 load
 771 -
 772 -       stq $23,24($17)
 773 -       xor $25,$27,$27         # 7 cycles from $27 load
 774 -       stq $27,32($17)
 775 -       nop
 776 -
 777 -       ldq $0,40($17)
 778 -       ldq $1,40($18)
 779 -       ldq $3,48($17)
 780 -       ldq $4,48($18)
 781 -
 782 -       ldq $6,56($17)
 783 -       ldq $7,56($18)
 784 -       ldq $2,40($19)
 785 -       ldq $5,48($19)
 786 -
 787 -       ldq $20,56($19)
 788 -       xor $0,$1,$1            # 4 cycles from $1 load
 789 -       xor $3,$4,$4            # 5 cycles from $4 load
 790 -       xor $6,$7,$7            # 5 cycles from $7 load
 791 -
 792 -       xor $1,$2,$2            # 4 cycles from $2 load
 793 -       xor $4,$5,$5            # 5 cycles from $5 load
 794 -       stq $2,40($17)
 795 -       xor $7,$20,$20          # 4 cycles from $20 load
 796 -
 797 -       stq $5,48($17)
 798 -       subq $16,1,$16
 799 -       stq $20,56($17)
 800 -       addq $19,64,$19
 801 -
 802 -       addq $18,64,$18
 803 -       addq $17,64,$17
 804 -       bgt $16,3b
 805 -       ret
 806 -       .end xor_alpha_3
 807 -
 808 -       .align 3
 809 -       .ent xor_alpha_4
 810 -xor_alpha_4:
 811 -       .prologue 0
 812 -       srl $16, 6, $16
 813 -       .align 4
 814 -4:
 815 -       ldq $0,0($17)
 816 -       ldq $1,0($18)
 817 -       ldq $2,0($19)
 818 -       ldq $3,0($20)
 819 -
 820 -       ldq $4,8($17)
 821 -       ldq $5,8($18)
 822 -       ldq $6,8($19)
 823 -       ldq $7,8($20)
 824 -
 825 -       ldq $21,16($17)
 826 -       ldq $22,16($18)
 827 -       ldq $23,16($19)
 828 -       ldq $24,16($20)
 829 -
 830 -       ldq $25,24($17)
 831 -       xor $0,$1,$1            # 6 cycles from $1 load
 832 -       ldq $27,24($18)
 833 -       xor $2,$3,$3            # 6 cycles from $3 load
 834 -
 835 -       ldq $0,24($19)
 836 -       xor $1,$3,$3
 837 -       ldq $1,24($20)
 838 -       xor $4,$5,$5            # 7 cycles from $5 load
 839 -
 840 -       stq $3,0($17)
 841 -       xor $6,$7,$7
 842 -       xor $21,$22,$22         # 7 cycles from $22 load
 843 -       xor $5,$7,$7
 844 -
 845 -       stq $7,8($17)
 846 -       xor $23,$24,$24         # 7 cycles from $24 load
 847 -       ldq $2,32($17)
 848 -       xor $22,$24,$24
 849 -
 850 -       ldq $3,32($18)
 851 -       ldq $4,32($19)
 852 -       ldq $5,32($20)
 853 -       xor $25,$27,$27         # 8 cycles from $27 load
 854 -
 855 -       ldq $6,40($17)
 856 -       ldq $7,40($18)
 857 -       ldq $21,40($19)
 858 -       ldq $22,40($20)
 859 -
 860 -       stq $24,16($17)
 861 -       xor $0,$1,$1            # 9 cycles from $1 load
 862 -       xor $2,$3,$3            # 5 cycles from $3 load
 863 -       xor $27,$1,$1
 864 -
 865 -       stq $1,24($17)
 866 -       xor $4,$5,$5            # 5 cycles from $5 load
 867 -       ldq $23,48($17)
 868 -       ldq $24,48($18)
 869 -
 870 -       ldq $25,48($19)
 871 -       xor $3,$5,$5
 872 -       ldq $27,48($20)
 873 -       ldq $0,56($17)
 874 -
 875 -       ldq $1,56($18)
 876 -       ldq $2,56($19)
 877 -       xor $6,$7,$7            # 8 cycles from $6 load
 878 -       ldq $3,56($20)
 879 -
 880 -       stq $5,32($17)
 881 -       xor $21,$22,$22         # 8 cycles from $22 load
 882 -       xor $7,$22,$22
 883 -       xor $23,$24,$24         # 5 cycles from $24 load
 884 -
 885 -       stq $22,40($17)
 886 -       xor $25,$27,$27         # 5 cycles from $27 load
 887 -       xor $24,$27,$27
 888 -       xor $0,$1,$1            # 5 cycles from $1 load
 889 -
 890 -       stq $27,48($17)
 891 -       xor $2,$3,$3            # 4 cycles from $3 load
 892 -       xor $1,$3,$3
 893 -       subq $16,1,$16
 894 -
 895 -       stq $3,56($17)
 896 -       addq $20,64,$20
 897 -       addq $19,64,$19
 898 -       addq $18,64,$18
 899 -
 900 -       addq $17,64,$17
 901 -       bgt $16,4b
 902 -       ret
 903 -       .end xor_alpha_4
 904 -
 905 -       .align 3
 906 -       .ent xor_alpha_5
 907 -xor_alpha_5:
 908 -       .prologue 0
 909 -       srl $16, 6, $16
 910 -       .align 4
 911 -5:
 912 -       ldq $0,0($17)
 913 -       ldq $1,0($18)
 914 -       ldq $2,0($19)
 915 -       ldq $3,0($20)
 916 -
 917 -       ldq $4,0($21)
 918 -       ldq $5,8($17)
 919 -       ldq $6,8($18)
 920 -       ldq $7,8($19)
 921 -
 922 -       ldq $22,8($20)
 923 -       ldq $23,8($21)
 924 -       ldq $24,16($17)
 925 -       ldq $25,16($18)
 926 -
 927 -       ldq $27,16($19)
 928 -       xor $0,$1,$1            # 6 cycles from $1 load
 929 -       ldq $28,16($20)
 930 -       xor $2,$3,$3            # 6 cycles from $3 load
 931 -
 932 -       ldq $0,16($21)
 933 -       xor $1,$3,$3
 934 -       ldq $1,24($17)
 935 -       xor $3,$4,$4            # 7 cycles from $4 load
 936 -
 937 -       stq $4,0($17)
 938 -       xor $5,$6,$6            # 7 cycles from $6 load
 939 -       xor $7,$22,$22          # 7 cycles from $22 load
 940 -       xor $6,$23,$23          # 7 cycles from $23 load
 941 -
 942 -       ldq $2,24($18)
 943 -       xor $22,$23,$23
 944 -       ldq $3,24($19)
 945 -       xor $24,$25,$25         # 8 cycles from $25 load
 946 -
 947 -       stq $23,8($17)
 948 -       xor $25,$27,$27         # 8 cycles from $27 load
 949 -       ldq $4,24($20)
 950 -       xor $28,$0,$0           # 7 cycles from $0 load
 951 -
 952 -       ldq $5,24($21)
 953 -       xor $27,$0,$0
 954 -       ldq $6,32($17)
 955 -       ldq $7,32($18)
 956 -
 957 -       stq $0,16($17)
 958 -       xor $1,$2,$2            # 6 cycles from $2 load
 959 -       ldq $22,32($19)
 960 -       xor $3,$4,$4            # 4 cycles from $4 load
 961 -
 962 -       ldq $23,32($20)
 963 -       xor $2,$4,$4
 964 -       ldq $24,32($21)
 965 -       ldq $25,40($17)
 966 -
 967 -       ldq $27,40($18)
 968 -       ldq $28,40($19)
 969 -       ldq $0,40($20)
 970 -       xor $4,$5,$5            # 7 cycles from $5 load
 971 -
 972 -       stq $5,24($17)
 973 -       xor $6,$7,$7            # 7 cycles from $7 load
 974 -       ldq $1,40($21)
 975 -       ldq $2,48($17)
 976 -
 977 -       ldq $3,48($18)
 978 -       xor $7,$22,$22          # 7 cycles from $22 load
 979 -       ldq $4,48($19)
 980 -       xor $23,$24,$24         # 6 cycles from $24 load
 981 -
 982 -       ldq $5,48($20)
 983 -       xor $22,$24,$24
 984 -       ldq $6,48($21)
 985 -       xor $25,$27,$27         # 7 cycles from $27 load
 986 -
 987 -       stq $24,32($17)
 988 -       xor $27,$28,$28         # 8 cycles from $28 load
 989 -       ldq $7,56($17)
 990 -       xor $0,$1,$1            # 6 cycles from $1 load
 991 -
 992 -       ldq $22,56($18)
 993 -       ldq $23,56($19)
 994 -       ldq $24,56($20)
 995 -       ldq $25,56($21)
 996 -
 997 -       xor $28,$1,$1
 998 -       xor $2,$3,$3            # 9 cycles from $3 load
 999 -       xor $3,$4,$4            # 9 cycles from $4 load
1000 -       xor $5,$6,$6            # 8 cycles from $6 load
1001 -
1002 -       stq $1,40($17)
1003 -       xor $4,$6,$6
1004 -       xor $7,$22,$22          # 7 cycles from $22 load
1005 -       xor $23,$24,$24         # 6 cycles from $24 load
1006 -
1007 -       stq $6,48($17)
1008 -       xor $22,$24,$24
1009 -       subq $16,1,$16
1010 -       xor $24,$25,$25         # 8 cycles from $25 load
1011 -
1012 -       stq $25,56($17)
1013 -       addq $21,64,$21
1014 -       addq $20,64,$20
1015 -       addq $19,64,$19
1016 -
1017 -       addq $18,64,$18
1018 -       addq $17,64,$17
1019 -       bgt $16,5b
1020 -       ret
1021 -       .end xor_alpha_5
1022 -
1023 -       .align 3
1024 -       .ent xor_alpha_prefetch_2
1025 -xor_alpha_prefetch_2:
1026 -       .prologue 0
1027 -       srl $16, 6, $16
1028 -
1029 -       ldq $31, 0($17)
1030 -       ldq $31, 0($18)
1031 -
1032 -       ldq $31, 64($17)
1033 -       ldq $31, 64($18)
1034 -
1035 -       ldq $31, 128($17)
1036 -       ldq $31, 128($18)
1037 -
1038 -       ldq $31, 192($17)
1039 -       ldq $31, 192($18)
1040 -       .align 4
1041 -2:
1042 -       ldq $0,0($17)
1043 -       ldq $1,0($18)
1044 -       ldq $2,8($17)
1045 -       ldq $3,8($18)
1046 -
1047 -       ldq $4,16($17)
1048 -       ldq $5,16($18)
1049 -       ldq $6,24($17)
1050 -       ldq $7,24($18)
1051 -
1052 -       ldq $19,32($17)
1053 -       ldq $20,32($18)
1054 -       ldq $21,40($17)
1055 -       ldq $22,40($18)
1056 -
1057 -       ldq $23,48($17)
1058 -       ldq $24,48($18)
1059 -       ldq $25,56($17)
1060 -       ldq $27,56($18)
1061 -
1062 -       ldq $31,256($17)
1063 -       xor $0,$1,$0            # 8 cycles from $1 load
1064 -       ldq $31,256($18)
1065 -       xor $2,$3,$2
1066 -
1067 -       stq $0,0($17)
1068 -       xor $4,$5,$4
1069 -       stq $2,8($17)
1070 -       xor $6,$7,$6
1071 -
1072 -       stq $4,16($17)
1073 -       xor $19,$20,$19
1074 -       stq $6,24($17)
1075 -       xor $21,$22,$21
1076 -
1077 -       stq $19,32($17)
1078 -       xor $23,$24,$23
1079 -       stq $21,40($17)
1080 -       xor $25,$27,$25
1081 -
1082 -       stq $23,48($17)
1083 -       subq $16,1,$16
1084 -       stq $25,56($17)
1085 -       addq $17,64,$17
1086 -
1087 -       addq $18,64,$18
1088 -       bgt $16,2b
1089 -       ret
1090 -       .end xor_alpha_prefetch_2
1091 -
1092 -       .align 3
1093 -       .ent xor_alpha_prefetch_3
1094 -xor_alpha_prefetch_3:
1095 -       .prologue 0
1096 -       srl $16, 6, $16
1097 -
1098 -       ldq $31, 0($17)
1099 -       ldq $31, 0($18)
1100 -       ldq $31, 0($19)
1101 -
1102 -       ldq $31, 64($17)
1103 -       ldq $31, 64($18)
1104 -       ldq $31, 64($19)
1105 -
1106 -       ldq $31, 128($17)
1107 -       ldq $31, 128($18)
1108 -       ldq $31, 128($19)
1109 -
1110 -       ldq $31, 192($17)
1111 -       ldq $31, 192($18)
1112 -       ldq $31, 192($19)
1113 -       .align 4
1114 -3:
1115 -       ldq $0,0($17)
1116 -       ldq $1,0($18)
1117 -       ldq $2,0($19)
1118 -       ldq $3,8($17)
1119 -
1120 -       ldq $4,8($18)
1121 -       ldq $6,16($17)
1122 -       ldq $7,16($18)
1123 -       ldq $21,24($17)
1124 -
1125 -       ldq $22,24($18)
1126 -       ldq $24,32($17)
1127 -       ldq $25,32($18)
1128 -       ldq $5,8($19)
1129 -
1130 -       ldq $20,16($19)
1131 -       ldq $23,24($19)
1132 -       ldq $27,32($19)
1133 -       nop
1134 -
1135 -       xor $0,$1,$1            # 8 cycles from $0 load
1136 -       xor $3,$4,$4            # 7 cycles from $4 load
1137 -       xor $6,$7,$7            # 6 cycles from $7 load
1138 -       xor $21,$22,$22         # 5 cycles from $22 load
1139 -
1140 -       xor $1,$2,$2            # 9 cycles from $2 load
1141 -       xor $24,$25,$25         # 5 cycles from $25 load
1142 -       stq $2,0($17)
1143 -       xor $4,$5,$5            # 6 cycles from $5 load
1144 -
1145 -       stq $5,8($17)
1146 -       xor $7,$20,$20          # 7 cycles from $20 load
1147 -       stq $20,16($17)
1148 -       xor $22,$23,$23         # 7 cycles from $23 load
1149 -
1150 -       stq $23,24($17)
1151 -       xor $25,$27,$27         # 7 cycles from $27 load
1152 -       stq $27,32($17)
1153 -       nop
1154 -
1155 -       ldq $0,40($17)
1156 -       ldq $1,40($18)
1157 -       ldq $3,48($17)
1158 -       ldq $4,48($18)
1159 -
1160 -       ldq $6,56($17)
1161 -       ldq $7,56($18)
1162 -       ldq $2,40($19)
1163 -       ldq $5,48($19)
1164 -
1165 -       ldq $20,56($19)
1166 -       ldq $31,256($17)
1167 -       ldq $31,256($18)
1168 -       ldq $31,256($19)
1169 -
1170 -       xor $0,$1,$1            # 6 cycles from $1 load
1171 -       xor $3,$4,$4            # 5 cycles from $4 load
1172 -       xor $6,$7,$7            # 5 cycles from $7 load
1173 -       xor $1,$2,$2            # 4 cycles from $2 load
1174 -
1175 -       xor $4,$5,$5            # 5 cycles from $5 load
1176 -       xor $7,$20,$20          # 4 cycles from $20 load
1177 -       stq $2,40($17)
1178 -       subq $16,1,$16
1179 -
1180 -       stq $5,48($17)
1181 -       addq $19,64,$19
1182 -       stq $20,56($17)
1183 -       addq $18,64,$18
1184 -
1185 -       addq $17,64,$17
1186 -       bgt $16,3b
1187 -       ret
1188 -       .end xor_alpha_prefetch_3
1189 -
1190 -       .align 3
1191 -       .ent xor_alpha_prefetch_4
1192 -xor_alpha_prefetch_4:
1193 -       .prologue 0
1194 -       srl $16, 6, $16
1195 -
1196 -       ldq $31, 0($17)
1197 -       ldq $31, 0($18)
1198 -       ldq $31, 0($19)
1199 -       ldq $31, 0($20)
1200 -
1201 -       ldq $31, 64($17)
1202 -       ldq $31, 64($18)
1203 -       ldq $31, 64($19)
1204 -       ldq $31, 64($20)
1205 -
1206 -       ldq $31, 128($17)
1207 -       ldq $31, 128($18)
1208 -       ldq $31, 128($19)
1209 -       ldq $31, 128($20)
1210 -
1211 -       ldq $31, 192($17)
1212 -       ldq $31, 192($18)
1213 -       ldq $31, 192($19)
1214 -       ldq $31, 192($20)
1215 -       .align 4
1216 -4:
1217 -       ldq $0,0($17)
1218 -       ldq $1,0($18)
1219 -       ldq $2,0($19)
1220 -       ldq $3,0($20)
1221 -
1222 -       ldq $4,8($17)
1223 -       ldq $5,8($18)
1224 -       ldq $6,8($19)
1225 -       ldq $7,8($20)
1226 -
1227 -       ldq $21,16($17)
1228 -       ldq $22,16($18)
1229 -       ldq $23,16($19)
1230 -       ldq $24,16($20)
1231 -
1232 -       ldq $25,24($17)
1233 -       xor $0,$1,$1            # 6 cycles from $1 load
1234 -       ldq $27,24($18)
1235 -       xor $2,$3,$3            # 6 cycles from $3 load
1236 -
1237 -       ldq $0,24($19)
1238 -       xor $1,$3,$3
1239 -       ldq $1,24($20)
1240 -       xor $4,$5,$5            # 7 cycles from $5 load
1241 -
1242 -       stq $3,0($17)
1243 -       xor $6,$7,$7
1244 -       xor $21,$22,$22         # 7 cycles from $22 load
1245 -       xor $5,$7,$7
1246 -
1247 -       stq $7,8($17)
1248 -       xor $23,$24,$24         # 7 cycles from $24 load
1249 -       ldq $2,32($17)
1250 -       xor $22,$24,$24
1251 -
1252 -       ldq $3,32($18)
1253 -       ldq $4,32($19)
1254 -       ldq $5,32($20)
1255 -       xor $25,$27,$27         # 8 cycles from $27 load
1256 -
1257 -       ldq $6,40($17)
1258 -       ldq $7,40($18)
1259 -       ldq $21,40($19)
1260 -       ldq $22,40($20)
1261 -
1262 -       stq $24,16($17)
1263 -       xor $0,$1,$1            # 9 cycles from $1 load
1264 -       xor $2,$3,$3            # 5 cycles from $3 load
1265 -       xor $27,$1,$1
1266 -
1267 -       stq $1,24($17)
1268 -       xor $4,$5,$5            # 5 cycles from $5 load
1269 -       ldq $23,48($17)
1270 -       xor $3,$5,$5
1271 -
1272 -       ldq $24,48($18)
1273 -       ldq $25,48($19)
1274 -       ldq $27,48($20)
1275 -       ldq $0,56($17)
1276 -
1277 -       ldq $1,56($18)
1278 -       ldq $2,56($19)
1279 -       ldq $3,56($20)
1280 -       xor $6,$7,$7            # 8 cycles from $6 load
1281 -
1282 -       ldq $31,256($17)
1283 -       xor $21,$22,$22         # 8 cycles from $22 load
1284 -       ldq $31,256($18)
1285 -       xor $7,$22,$22
1286 -
1287 -       ldq $31,256($19)
1288 -       xor $23,$24,$24         # 6 cycles from $24 load
1289 -       ldq $31,256($20)
1290 -       xor $25,$27,$27         # 6 cycles from $27 load
1291 -
1292 -       stq $5,32($17)
1293 -       xor $24,$27,$27
1294 -       xor $0,$1,$1            # 7 cycles from $1 load
1295 -       xor $2,$3,$3            # 6 cycles from $3 load
1296 -
1297 -       stq $22,40($17)
1298 -       xor $1,$3,$3
1299 -       stq $27,48($17)
1300 -       subq $16,1,$16
1301 -
1302 -       stq $3,56($17)
1303 -       addq $20,64,$20
1304 -       addq $19,64,$19
1305 -       addq $18,64,$18
1306 -
1307 -       addq $17,64,$17
1308 -       bgt $16,4b
1309 -       ret
1310 -       .end xor_alpha_prefetch_4
1311 -
1312 -       .align 3
1313 -       .ent xor_alpha_prefetch_5
1314 -xor_alpha_prefetch_5:
1315 -       .prologue 0
1316 -       srl $16, 6, $16
1317 -
1318 -       ldq $31, 0($17)
1319 -       ldq $31, 0($18)
1320 -       ldq $31, 0($19)
1321 -       ldq $31, 0($20)
1322 -       ldq $31, 0($21)
1323 -
1324 -       ldq $31, 64($17)
1325 -       ldq $31, 64($18)
1326 -       ldq $31, 64($19)
1327 -       ldq $31, 64($20)
1328 -       ldq $31, 64($21)
1329 -
1330 -       ldq $31, 128($17)
1331 -       ldq $31, 128($18)
1332 -       ldq $31, 128($19)
1333 -       ldq $31, 128($20)
1334 -       ldq $31, 128($21)
1335 -
1336 -       ldq $31, 192($17)
1337 -       ldq $31, 192($18)
1338 -       ldq $31, 192($19)
1339 -       ldq $31, 192($20)
1340 -       ldq $31, 192($21)
1341 -       .align 4
1342 -5:
1343 -       ldq $0,0($17)
1344 -       ldq $1,0($18)
1345 -       ldq $2,0($19)
1346 -       ldq $3,0($20)
1347 -
1348 -       ldq $4,0($21)
1349 -       ldq $5,8($17)
1350 -       ldq $6,8($18)
1351 -       ldq $7,8($19)
1352 -
1353 -       ldq $22,8($20)
1354 -       ldq $23,8($21)
1355 -       ldq $24,16($17)
1356 -       ldq $25,16($18)
1357 -
1358 -       ldq $27,16($19)
1359 -       xor $0,$1,$1            # 6 cycles from $1 load
1360 -       ldq $28,16($20)
1361 -       xor $2,$3,$3            # 6 cycles from $3 load
1362 -
1363 -       ldq $0,16($21)
1364 -       xor $1,$3,$3
1365 -       ldq $1,24($17)
1366 -       xor $3,$4,$4            # 7 cycles from $4 load
1367 -
1368 -       stq $4,0($17)
1369 -       xor $5,$6,$6            # 7 cycles from $6 load
1370 -       xor $7,$22,$22          # 7 cycles from $22 load
1371 -       xor $6,$23,$23          # 7 cycles from $23 load
1372 -
1373 -       ldq $2,24($18)
1374 -       xor $22,$23,$23
1375 -       ldq $3,24($19)
1376 -       xor $24,$25,$25         # 8 cycles from $25 load
1377 -
1378 -       stq $23,8($17)
1379 -       xor $25,$27,$27         # 8 cycles from $27 load
1380 -       ldq $4,24($20)
1381 -       xor $28,$0,$0           # 7 cycles from $0 load
1382 -
1383 -       ldq $5,24($21)
1384 -       xor $27,$0,$0
1385 -       ldq $6,32($17)
1386 -       ldq $7,32($18)
1387 -
1388 -       stq $0,16($17)
1389 -       xor $1,$2,$2            # 6 cycles from $2 load
1390 -       ldq $22,32($19)
1391 -       xor $3,$4,$4            # 4 cycles from $4 load
1392 -
1393 -       ldq $23,32($20)
1394 -       xor $2,$4,$4
1395 -       ldq $24,32($21)
1396 -       ldq $25,40($17)
1397 -
1398 -       ldq $27,40($18)
1399 -       ldq $28,40($19)
1400 -       ldq $0,40($20)
1401 -       xor $4,$5,$5            # 7 cycles from $5 load
1402 -
1403 -       stq $5,24($17)
1404 -       xor $6,$7,$7            # 7 cycles from $7 load
1405 -       ldq $1,40($21)
1406 -       ldq $2,48($17)
1407 -
1408 -       ldq $3,48($18)
1409 -       xor $7,$22,$22          # 7 cycles from $22 load
1410 -       ldq $4,48($19)
1411 -       xor $23,$24,$24         # 6 cycles from $24 load
1412 -
1413 -       ldq $5,48($20)
1414 -       xor $22,$24,$24
1415 -       ldq $6,48($21)
1416 -       xor $25,$27,$27         # 7 cycles from $27 load
1417 -
1418 -       stq $24,32($17)
1419 -       xor $27,$28,$28         # 8 cycles from $28 load
1420 -       ldq $7,56($17)
1421 -       xor $0,$1,$1            # 6 cycles from $1 load
1422 -
1423 -       ldq $22,56($18)
1424 -       ldq $23,56($19)
1425 -       ldq $24,56($20)
1426 -       ldq $25,56($21)
1427 -
1428 -       ldq $31,256($17)
1429 -       xor $28,$1,$1
1430 -       ldq $31,256($18)
1431 -       xor $2,$3,$3            # 9 cycles from $3 load
1432 -
1433 -       ldq $31,256($19)
1434 -       xor $3,$4,$4            # 9 cycles from $4 load
1435 -       ldq $31,256($20)
1436 -       xor $5,$6,$6            # 8 cycles from $6 load
1437 -
1438 -       stq $1,40($17)
1439 -       xor $4,$6,$6
1440 -       xor $7,$22,$22          # 7 cycles from $22 load
1441 -       xor $23,$24,$24         # 6 cycles from $24 load
1442 -
1443 -       stq $6,48($17)
1444 -       xor $22,$24,$24
1445 -       ldq $31,256($21)
1446 -       xor $24,$25,$25         # 8 cycles from $25 load
1447 -
1448 -       stq $25,56($17)
1449 -       subq $16,1,$16
1450 -       addq $21,64,$21
1451 -       addq $20,64,$20
1452 -
1453 -       addq $19,64,$19
1454 -       addq $18,64,$18
1455 -       addq $17,64,$17
1456 -       bgt $16,5b
1457 -
1458 -       ret
1459 -       .end xor_alpha_prefetch_5
1460 +asm("                                                          \n\
1461 +       .text                                                   \n\
1462 +       .align 3                                                \n\
1463 +       .ent xor_alpha_2                                        \n\
1464 +xor_alpha_2:                                                   \n\
1465 +       .prologue 0                                             \n\
1466 +       srl $16, 6, $16                                         \n\
1467 +       .align 4                                                \n\
1468 +2:                                                             \n\
1469 +       ldq $0,0($17)                                           \n\
1470 +       ldq $1,0($18)                                           \n\
1471 +       ldq $2,8($17)                                           \n\
1472 +       ldq $3,8($18)                                           \n\
1473 +                                                               \n\
1474 +       ldq $4,16($17)                                          \n\
1475 +       ldq $5,16($18)                                          \n\
1476 +       ldq $6,24($17)                                          \n\
1477 +       ldq $7,24($18)                                          \n\
1478 +                                                               \n\
1479 +       ldq $19,32($17)                                         \n\
1480 +       ldq $20,32($18)                                         \n\
1481 +       ldq $21,40($17)                                         \n\
1482 +       ldq $22,40($18)                                         \n\
1483 +                                                               \n\
1484 +       ldq $23,48($17)                                         \n\
1485 +       ldq $24,48($18)                                         \n\
1486 +       ldq $25,56($17)                                         \n\
1487 +       xor $0,$1,$0            # 7 cycles from $1 load         \n\
1488 +                                                               \n\
1489 +       ldq $27,56($18)                                         \n\
1490 +       xor $2,$3,$2                                            \n\
1491 +       stq $0,0($17)                                           \n\
1492 +       xor $4,$5,$4                                            \n\
1493 +                                                               \n\
1494 +       stq $2,8($17)                                           \n\
1495 +       xor $6,$7,$6                                            \n\
1496 +       stq $4,16($17)                                          \n\
1497 +       xor $19,$20,$19                                         \n\
1498 +                                                               \n\
1499 +       stq $6,24($17)                                          \n\
1500 +       xor $21,$22,$21                                         \n\
1501 +       stq $19,32($17)                                         \n\
1502 +       xor $23,$24,$23                                         \n\
1503 +                                                               \n\
1504 +       stq $21,40($17)                                         \n\
1505 +       xor $25,$27,$25                                         \n\
1506 +       stq $23,48($17)                                         \n\
1507 +       subq $16,1,$16                                          \n\
1508 +                                                               \n\
1509 +       stq $25,56($17)                                         \n\
1510 +       addq $17,64,$17                                         \n\
1511 +       addq $18,64,$18                                         \n\
1512 +       bgt $16,2b                                              \n\
1513 +                                                               \n\
1514 +       ret                                                     \n\
1515 +       .end xor_alpha_2                                        \n\
1516 +                                                               \n\
1517 +       .align 3                                                \n\
1518 +       .ent xor_alpha_3                                        \n\
1519 +xor_alpha_3:                                                   \n\
1520 +       .prologue 0                                             \n\
1521 +       srl $16, 6, $16                                         \n\
1522 +       .align 4                                                \n\
1523 +3:                                                             \n\
1524 +       ldq $0,0($17)                                           \n\
1525 +       ldq $1,0($18)                                           \n\
1526 +       ldq $2,0($19)                                           \n\
1527 +       ldq $3,8($17)                                           \n\
1528 +                                                               \n\
1529 +       ldq $4,8($18)                                           \n\
1530 +       ldq $6,16($17)                                          \n\
1531 +       ldq $7,16($18)                                          \n\
1532 +       ldq $21,24($17)                                         \n\
1533 +                                                               \n\
1534 +       ldq $22,24($18)                                         \n\
1535 +       ldq $24,32($17)                                         \n\
1536 +       ldq $25,32($18)                                         \n\
1537 +       ldq $5,8($19)                                           \n\
1538 +                                                               \n\
1539 +       ldq $20,16($19)                                         \n\
1540 +       ldq $23,24($19)                                         \n\
1541 +       ldq $27,32($19)                                         \n\
1542 +       nop                                                     \n\
1543 +                                                               \n\
1544 +       xor $0,$1,$1            # 8 cycles from $0 load         \n\
1545 +       xor $3,$4,$4            # 6 cycles from $4 load         \n\
1546 +       xor $6,$7,$7            # 6 cycles from $7 load         \n\
1547 +       xor $21,$22,$22         # 5 cycles from $22 load        \n\
1548 +                                                               \n\
1549 +       xor $1,$2,$2            # 9 cycles from $2 load         \n\
1550 +       xor $24,$25,$25         # 5 cycles from $25 load        \n\
1551 +       stq $2,0($17)                                           \n\
1552 +       xor $4,$5,$5            # 6 cycles from $5 load         \n\
1553 +                                                               \n\
1554 +       stq $5,8($17)                                           \n\
1555 +       xor $7,$20,$20          # 7 cycles from $20 load        \n\
1556 +       stq $20,16($17)                                         \n\
1557 +       xor $22,$23,$23         # 7 cycles from $23 load        \n\
1558 +                                                               \n\
1559 +       stq $23,24($17)                                         \n\
1560 +       xor $25,$27,$27         # 7 cycles from $27 load        \n\
1561 +       stq $27,32($17)                                         \n\
1562 +       nop                                                     \n\
1563 +                                                               \n\
1564 +       ldq $0,40($17)                                          \n\
1565 +       ldq $1,40($18)                                          \n\
1566 +       ldq $3,48($17)                                          \n\
1567 +       ldq $4,48($18)                                          \n\
1568 +                                                               \n\
1569 +       ldq $6,56($17)                                          \n\
1570 +       ldq $7,56($18)                                          \n\
1571 +       ldq $2,40($19)                                          \n\
1572 +       ldq $5,48($19)                                          \n\
1573 +                                                               \n\
1574 +       ldq $20,56($19)                                         \n\
1575 +       xor $0,$1,$1            # 4 cycles from $1 load         \n\
1576 +       xor $3,$4,$4            # 5 cycles from $4 load         \n\
1577 +       xor $6,$7,$7            # 5 cycles from $7 load         \n\
1578 +                                                               \n\
1579 +       xor $1,$2,$2            # 4 cycles from $2 load         \n\
1580 +       xor $4,$5,$5            # 5 cycles from $5 load         \n\
1581 +       stq $2,40($17)                                          \n\
1582 +       xor $7,$20,$20          # 4 cycles from $20 load        \n\
1583 +                                                               \n\
1584 +       stq $5,48($17)                                          \n\
1585 +       subq $16,1,$16                                          \n\
1586 +       stq $20,56($17)                                         \n\
1587 +       addq $19,64,$19                                         \n\
1588 +                                                               \n\
1589 +       addq $18,64,$18                                         \n\
1590 +       addq $17,64,$17                                         \n\
1591 +       bgt $16,3b                                              \n\
1592 +       ret                                                     \n\
1593 +       .end xor_alpha_3                                        \n\
1594 +                                                               \n\
1595 +       .align 3                                                \n\
1596 +       .ent xor_alpha_4                                        \n\
1597 +xor_alpha_4:                                                   \n\
1598 +       .prologue 0                                             \n\
1599 +       srl $16, 6, $16                                         \n\
1600 +       .align 4                                                \n\
1601 +4:                                                             \n\
1602 +       ldq $0,0($17)                                           \n\
1603 +       ldq $1,0($18)                                           \n\
1604 +       ldq $2,0($19)                                           \n\
1605 +       ldq $3,0($20)                                           \n\
1606 +                                                               \n\
1607 +       ldq $4,8($17)                                           \n\
1608 +       ldq $5,8($18)                                           \n\
1609 +       ldq $6,8($19)                                           \n\
1610 +       ldq $7,8($20)                                           \n\
1611 +                                                               \n\
1612 +       ldq $21,16($17)                                         \n\
1613 +       ldq $22,16($18)                                         \n\
1614 +       ldq $23,16($19)                                         \n\
1615 +       ldq $24,16($20)                                         \n\
1616 +                                                               \n\
1617 +       ldq $25,24($17)                                         \n\
1618 +       xor $0,$1,$1            # 6 cycles from $1 load         \n\
1619 +       ldq $27,24($18)                                         \n\
1620 +       xor $2,$3,$3            # 6 cycles from $3 load         \n\
1621 +                                                               \n\
1622 +       ldq $0,24($19)                                          \n\
1623 +       xor $1,$3,$3                                            \n\
1624 +       ldq $1,24($20)                                          \n\
1625 +       xor $4,$5,$5            # 7 cycles from $5 load         \n\
1626 +                                                               \n\
1627 +       stq $3,0($17)                                           \n\
1628 +       xor $6,$7,$7                                            \n\
1629 +       xor $21,$22,$22         # 7 cycles from $22 load        \n\
1630 +       xor $5,$7,$7                                            \n\
1631 +                                                               \n\
1632 +       stq $7,8($17)                                           \n\
1633 +       xor $23,$24,$24         # 7 cycles from $24 load        \n\
1634 +       ldq $2,32($17)                                          \n\
1635 +       xor $22,$24,$24                                         \n\
1636 +                                                               \n\
1637 +       ldq $3,32($18)                                          \n\
1638 +       ldq $4,32($19)                                          \n\
1639 +       ldq $5,32($20)                                          \n\
1640 +       xor $25,$27,$27         # 8 cycles from $27 load        \n\
1641 +                                                               \n\
1642 +       ldq $6,40($17)                                          \n\
1643 +       ldq $7,40($18)                                          \n\
1644 +       ldq $21,40($19)                                         \n\
1645 +       ldq $22,40($20)                                         \n\
1646 +                                                               \n\
1647 +       stq $24,16($17)                                         \n\
1648 +       xor $0,$1,$1            # 9 cycles from $1 load         \n\
1649 +       xor $2,$3,$3            # 5 cycles from $3 load         \n\
1650 +       xor $27,$1,$1                                           \n\
1651 +                                                               \n\
1652 +       stq $1,24($17)                                          \n\
1653 +       xor $4,$5,$5            # 5 cycles from $5 load         \n\
1654 +       ldq $23,48($17)                                         \n\
1655 +       ldq $24,48($18)                                         \n\
1656 +                                                               \n\
1657 +       ldq $25,48($19)                                         \n\
1658 +       xor $3,$5,$5                                            \n\
1659 +       ldq $27,48($20)                                         \n\
1660 +       ldq $0,56($17)                                          \n\
1661 +                                                               \n\
1662 +       ldq $1,56($18)                                          \n\
1663 +       ldq $2,56($19)                                          \n\
1664 +       xor $6,$7,$7            # 8 cycles from $6 load         \n\
1665 +       ldq $3,56($20)                                          \n\
1666 +                                                               \n\
1667 +       stq $5,32($17)                                          \n\
1668 +       xor $21,$22,$22         # 8 cycles from $22 load        \n\
1669 +       xor $7,$22,$22                                          \n\
1670 +       xor $23,$24,$24         # 5 cycles from $24 load        \n\
1671 +                                                               \n\
1672 +       stq $22,40($17)                                         \n\
1673 +       xor $25,$27,$27         # 5 cycles from $27 load        \n\
1674 +       xor $24,$27,$27                                         \n\
1675 +       xor $0,$1,$1            # 5 cycles from $1 load         \n\
1676 +                                                               \n\
1677 +       stq $27,48($17)                                         \n\
1678 +       xor $2,$3,$3            # 4 cycles from $3 load         \n\
1679 +       xor $1,$3,$3                                            \n\
1680 +       subq $16,1,$16                                          \n\
1681 +                                                               \n\
1682 +       stq $3,56($17)                                          \n\
1683 +       addq $20,64,$20                                         \n\
1684 +       addq $19,64,$19                                         \n\
1685 +       addq $18,64,$18                                         \n\
1686 +                                                               \n\
1687 +       addq $17,64,$17                                         \n\
1688 +       bgt $16,4b                                              \n\
1689 +       ret                                                     \n\
1690 +       .end xor_alpha_4                                        \n\
1691 +                                                               \n\
1692 +       .align 3                                                \n\
1693 +       .ent xor_alpha_5                                        \n\
1694 +xor_alpha_5:                                                   \n\
1695 +       .prologue 0                                             \n\
1696 +       srl $16, 6, $16                                         \n\
1697 +       .align 4                                                \n\
1698 +5:                                                             \n\
1699 +       ldq $0,0($17)                                           \n\
1700 +       ldq $1,0($18)                                           \n\
1701 +       ldq $2,0($19)                                           \n\
1702 +       ldq $3,0($20)                                           \n\
1703 +                                                               \n\
1704 +       ldq $4,0($21)                                           \n\
1705 +       ldq $5,8($17)                                           \n\
1706 +       ldq $6,8($18)                                           \n\
1707 +       ldq $7,8($19)                                           \n\
1708 +                                                               \n\
1709 +       ldq $22,8($20)                                          \n\
1710 +       ldq $23,8($21)                                          \n\
1711 +       ldq $24,16($17)                                         \n\
1712 +       ldq $25,16($18)                                         \n\
1713 +                                                               \n\
1714 +       ldq $27,16($19)                                         \n\
1715 +       xor $0,$1,$1            # 6 cycles from $1 load         \n\
1716 +       ldq $28,16($20)                                         \n\
1717 +       xor $2,$3,$3            # 6 cycles from $3 load         \n\
1718 +                                                               \n\
1719 +       ldq $0,16($21)                                          \n\
1720 +       xor $1,$3,$3                                            \n\
1721 +       ldq $1,24($17)                                          \n\
1722 +       xor $3,$4,$4            # 7 cycles from $4 load         \n\
1723 +                                                               \n\
1724 +       stq $4,0($17)                                           \n\
1725 +       xor $5,$6,$6            # 7 cycles from $6 load         \n\
1726 +       xor $7,$22,$22          # 7 cycles from $22 load        \n\
1727 +       xor $6,$23,$23          # 7 cycles from $23 load        \n\
1728 +                                                               \n\
1729 +       ldq $2,24($18)                                          \n\
1730 +       xor $22,$23,$23                                         \n\
1731 +       ldq $3,24($19)                                          \n\
1732 +       xor $24,$25,$25         # 8 cycles from $25 load        \n\
1733 +                                                               \n\
1734 +       stq $23,8($17)                                          \n\
1735 +       xor $25,$27,$27         # 8 cycles from $27 load        \n\
1736 +       ldq $4,24($20)                                          \n\
1737 +       xor $28,$0,$0           # 7 cycles from $0 load         \n\
1738 +                                                               \n\
1739 +       ldq $5,24($21)                                          \n\
1740 +       xor $27,$0,$0                                           \n\
1741 +       ldq $6,32($17)                                          \n\
1742 +       ldq $7,32($18)                                          \n\
1743 +                                                               \n\
1744 +       stq $0,16($17)                                          \n\
1745 +       xor $1,$2,$2            # 6 cycles from $2 load         \n\
1746 +       ldq $22,32($19)                                         \n\
1747 +       xor $3,$4,$4            # 4 cycles from $4 load         \n\
1748 +                                                               \n\
1749 +       ldq $23,32($20)                                         \n\
1750 +       xor $2,$4,$4                                            \n\
1751 +       ldq $24,32($21)                                         \n\
1752 +       ldq $25,40($17)                                         \n\
1753 +                                                               \n\
1754 +       ldq $27,40($18)                                         \n\
1755 +       ldq $28,40($19)                                         \n\
1756 +       ldq $0,40($20)                                          \n\
1757 +       xor $4,$5,$5            # 7 cycles from $5 load         \n\
1758 +                                                               \n\
1759 +       stq $5,24($17)                                          \n\
1760 +       xor $6,$7,$7            # 7 cycles from $7 load         \n\
1761 +       ldq $1,40($21)                                          \n\
1762 +       ldq $2,48($17)                                          \n\
1763 +                                                               \n\
1764 +       ldq $3,48($18)                                          \n\
1765 +       xor $7,$22,$22          # 7 cycles from $22 load        \n\
1766 +       ldq $4,48($19)                                          \n\
1767 +       xor $23,$24,$24         # 6 cycles from $24 load        \n\
1768 +                                                               \n\
1769 +       ldq $5,48($20)                                          \n\
1770 +       xor $22,$24,$24                                         \n\
1771 +       ldq $6,48($21)                                          \n\
1772 +       xor $25,$27,$27         # 7 cycles from $27 load        \n\
1773 +                                                               \n\
1774 +       stq $24,32($17)                                         \n\
1775 +       xor $27,$28,$28         # 8 cycles from $28 load        \n\
1776 +       ldq $7,56($17)                                          \n\
1777 +       xor $0,$1,$1            # 6 cycles from $1 load         \n\
1778 +                                                               \n\
1779 +       ldq $22,56($18)                                         \n\
1780 +       ldq $23,56($19)                                         \n\
1781 +       ldq $24,56($20)                                         \n\
1782 +       ldq $25,56($21)                                         \n\
1783 +                                                               \n\
1784 +       xor $28,$1,$1                                           \n\
1785 +       xor $2,$3,$3            # 9 cycles from $3 load         \n\
1786 +       xor $3,$4,$4            # 9 cycles from $4 load         \n\
1787 +       xor $5,$6,$6            # 8 cycles from $6 load         \n\
1788 +                                                               \n\
1789 +       stq $1,40($17)                                          \n\
1790 +       xor $4,$6,$6                                            \n\
1791 +       xor $7,$22,$22          # 7 cycles from $22 load        \n\
1792 +       xor $23,$24,$24         # 6 cycles from $24 load        \n\
1793 +                                                               \n\
1794 +       stq $6,48($17)                                          \n\
1795 +       xor $22,$24,$24                                         \n\
1796 +       subq $16,1,$16                                          \n\
1797 +       xor $24,$25,$25         # 8 cycles from $25 load        \n\
1798 +                                                               \n\
1799 +       stq $25,56($17)                                         \n\
1800 +       addq $21,64,$21                                         \n\
1801 +       addq $20,64,$20                                         \n\
1802 +       addq $19,64,$19                                         \n\
1803 +                                                               \n\
1804 +       addq $18,64,$18                                         \n\
1805 +       addq $17,64,$17                                         \n\
1806 +       bgt $16,5b                                              \n\
1807 +       ret                                                     \n\
1808 +       .end xor_alpha_5                                        \n\
1809 +                                                               \n\
1810 +       .align 3                                                \n\
1811 +       .ent xor_alpha_prefetch_2                               \n\
1812 +xor_alpha_prefetch_2:                                          \n\
1813 +       .prologue 0                                             \n\
1814 +       srl $16, 6, $16                                         \n\
1815 +                                                               \n\
1816 +       ldq $31, 0($17)                                         \n\
1817 +       ldq $31, 0($18)                                         \n\
1818 +                                                               \n\
1819 +       ldq $31, 64($17)                                        \n\
1820 +       ldq $31, 64($18)                                        \n\
1821 +                                                               \n\
1822 +       ldq $31, 128($17)                                       \n\
1823 +       ldq $31, 128($18)                                       \n\
1824 +                                                               \n\
1825 +       ldq $31, 192($17)                                       \n\
1826 +       ldq $31, 192($18)                                       \n\
1827 +       .align 4                                                \n\
1828 +2:                                                             \n\
1829 +       ldq $0,0($17)                                           \n\
1830 +       ldq $1,0($18)                                           \n\
1831 +       ldq $2,8($17)                                           \n\
1832 +       ldq $3,8($18)                                           \n\
1833 +                                                               \n\
1834 +       ldq $4,16($17)                                          \n\
1835 +       ldq $5,16($18)                                          \n\
1836 +       ldq $6,24($17)                                          \n\
1837 +       ldq $7,24($18)                                          \n\
1838 +                                                               \n\
1839 +       ldq $19,32($17)                                         \n\
1840 +       ldq $20,32($18)                                         \n\
1841 +       ldq $21,40($17)                                         \n\
1842 +       ldq $22,40($18)                                         \n\
1843 +                                                               \n\
1844 +       ldq $23,48($17)                                         \n\
1845 +       ldq $24,48($18)                                         \n\
1846 +       ldq $25,56($17)                                         \n\
1847 +       ldq $27,56($18)                                         \n\
1848 +                                                               \n\
1849 +       ldq $31,256($17)                                        \n\
1850 +       xor $0,$1,$0            # 8 cycles from $1 load         \n\
1851 +       ldq $31,256($18)                                        \n\
1852 +       xor $2,$3,$2                                            \n\
1853 +                                                               \n\
1854 +       stq $0,0($17)                                           \n\
1855 +       xor $4,$5,$4                                            \n\
1856 +       stq $2,8($17)                                           \n\
1857 +       xor $6,$7,$6                                            \n\
1858 +                                                               \n\
1859 +       stq $4,16($17)                                          \n\
1860 +       xor $19,$20,$19                                         \n\
1861 +       stq $6,24($17)                                          \n\
1862 +       xor $21,$22,$21                                         \n\
1863 +                                                               \n\
1864 +       stq $19,32($17)                                         \n\
1865 +       xor $23,$24,$23                                         \n\
1866 +       stq $21,40($17)                                         \n\
1867 +       xor $25,$27,$25                                         \n\
1868 +                                                               \n\
1869 +       stq $23,48($17)                                         \n\
1870 +       subq $16,1,$16                                          \n\
1871 +       stq $25,56($17)                                         \n\
1872 +       addq $17,64,$17                                         \n\
1873 +                                                               \n\
1874 +       addq $18,64,$18                                         \n\
1875 +       bgt $16,2b                                              \n\
1876 +       ret                                                     \n\
1877 +       .end xor_alpha_prefetch_2                               \n\
1878 +                                                               \n\
1879 +       .align 3                                                \n\
1880 +       .ent xor_alpha_prefetch_3                               \n\
1881 +xor_alpha_prefetch_3:                                          \n\
1882 +       .prologue 0                                             \n\
1883 +       srl $16, 6, $16                                         \n\
1884 +                                                               \n\
1885 +       ldq $31, 0($17)                                         \n\
1886 +       ldq $31, 0($18)                                         \n\
1887 +       ldq $31, 0($19)                                         \n\
1888 +                                                               \n\
1889 +       ldq $31, 64($17)                                        \n\
1890 +       ldq $31, 64($18)                                        \n\
1891 +       ldq $31, 64($19)                                        \n\
1892 +                                                               \n\
1893 +       ldq $31, 128($17)                                       \n\
1894 +       ldq $31, 128($18)                                       \n\
1895 +       ldq $31, 128($19)                                       \n\
1896 +                                                               \n\
1897 +       ldq $31, 192($17)                                       \n\
1898 +       ldq $31, 192($18)                                       \n\
1899 +       ldq $31, 192($19)                                       \n\
1900 +       .align 4                                                \n\
1901 +3:                                                             \n\
1902 +       ldq $0,0($17)                                           \n\
1903 +       ldq $1,0($18)                                           \n\
1904 +       ldq $2,0($19)                                           \n\
1905 +       ldq $3,8($17)                                           \n\
1906 +                                                               \n\
1907 +       ldq $4,8($18)                                           \n\
1908 +       ldq $6,16($17)                                          \n\
1909 +       ldq $7,16($18)                                          \n\
1910 +       ldq $21,24($17)                                         \n\
1911 +                                                               \n\
1912 +       ldq $22,24($18)                                         \n\
1913 +       ldq $24,32($17)                                         \n\
1914 +       ldq $25,32($18)                                         \n\
1915 +       ldq $5,8($19)                                           \n\
1916 +                                                               \n\
1917 +       ldq $20,16($19)                                         \n\
1918 +       ldq $23,24($19)                                         \n\
1919 +       ldq $27,32($19)                                         \n\
1920 +       nop                                                     \n\
1921 +                                                               \n\
1922 +       xor $0,$1,$1            # 8 cycles from $0 load         \n\
1923 +       xor $3,$4,$4            # 7 cycles from $4 load         \n\
1924 +       xor $6,$7,$7            # 6 cycles from $7 load         \n\
1925 +       xor $21,$22,$22         # 5 cycles from $22 load        \n\
1926 +                                                               \n\
1927 +       xor $1,$2,$2            # 9 cycles from $2 load         \n\
1928 +       xor $24,$25,$25         # 5 cycles from $25 load        \n\
1929 +       stq $2,0($17)                                           \n\
1930 +       xor $4,$5,$5            # 6 cycles from $5 load         \n\
1931 +                                                               \n\
1932 +       stq $5,8($17)                                           \n\
1933 +       xor $7,$20,$20          # 7 cycles from $20 load        \n\
1934 +       stq $20,16($17)                                         \n\
1935 +       xor $22,$23,$23         # 7 cycles from $23 load        \n\
1936 +                                                               \n\
1937 +       stq $23,24($17)                                         \n\
1938 +       xor $25,$27,$27         # 7 cycles from $27 load        \n\
1939 +       stq $27,32($17)                                         \n\
1940 +       nop                                                     \n\
1941 +                                                               \n\
1942 +       ldq $0,40($17)                                          \n\
1943 +       ldq $1,40($18)                                          \n\
1944 +       ldq $3,48($17)                                          \n\
1945 +       ldq $4,48($18)                                          \n\
1946 +                                                               \n\
1947 +       ldq $6,56($17)                                          \n\
1948 +       ldq $7,56($18)                                          \n\
1949 +       ldq $2,40($19)                                          \n\
1950 +       ldq $5,48($19)                                          \n\
1951 +                                                               \n\
1952 +       ldq $20,56($19)                                         \n\
1953 +       ldq $31,256($17)                                        \n\
1954 +       ldq $31,256($18)                                        \n\
1955 +       ldq $31,256($19)                                        \n\
1956 +                                                               \n\
1957 +       xor $0,$1,$1            # 6 cycles from $1 load         \n\
1958 +       xor $3,$4,$4            # 5 cycles from $4 load         \n\
1959 +       xor $6,$7,$7            # 5 cycles from $7 load         \n\
1960 +       xor $1,$2,$2            # 4 cycles from $2 load         \n\
1961 +                                                               \n\
1962 +       xor $4,$5,$5            # 5 cycles from $5 load         \n\
1963 +       xor $7,$20,$20          # 4 cycles from $20 load        \n\
1964 +       stq $2,40($17)                                          \n\
1965 +       subq $16,1,$16                                          \n\
1966 +                                                               \n\
1967 +       stq $5,48($17)                                          \n\
1968 +       addq $19,64,$19                                         \n\
1969 +       stq $20,56($17)                                         \n\
1970 +       addq $18,64,$18                                         \n\
1971 +                                                               \n\
1972 +       addq $17,64,$17                                         \n\
1973 +       bgt $16,3b                                              \n\
1974 +       ret                                                     \n\
1975 +       .end xor_alpha_prefetch_3                               \n\
1976 +                                                               \n\
1977 +       .align 3                                                \n\
1978 +       .ent xor_alpha_prefetch_4                               \n\
1979 +xor_alpha_prefetch_4:                                          \n\
1980 +       .prologue 0                                             \n\
1981 +       srl $16, 6, $16                                         \n\
1982 +                                                               \n\
1983 +       ldq $31, 0($17)                                         \n\
1984 +       ldq $31, 0($18)                                         \n\
1985 +       ldq $31, 0($19)                                         \n\
1986 +       ldq $31, 0($20)                                         \n\
1987 +                                                               \n\
1988 +       ldq $31, 64($17)                                        \n\
1989 +       ldq $31, 64($18)                                        \n\
1990 +       ldq $31, 64($19)                                        \n\
1991 +       ldq $31, 64($20)                                        \n\
1992 +                                                               \n\
1993 +       ldq $31, 128($17)                                       \n\
1994 +       ldq $31, 128($18)                                       \n\
1995 +       ldq $31, 128($19)                                       \n\
1996 +       ldq $31, 128($20)                                       \n\
1997 +                                                               \n\
1998 +       ldq $31, 192($17)                                       \n\
1999 +       ldq $31, 192($18)                                       \n\
2000 +       ldq $31, 192($19)                                       \n\
2001 +       ldq $31, 192($20)                                       \n\
2002 +       .align 4                                                \n\
2003 +4:                                                             \n\
2004 +       ldq $0,0($17)                                           \n\
2005 +       ldq $1,0($18)                                           \n\
2006 +       ldq $2,0($19)                                           \n\
2007 +       ldq $3,0($20)                                           \n\
2008 +                                                               \n\
2009 +       ldq $4,8($17)                                           \n\
2010 +       ldq $5,8($18)                                           \n\
2011 +       ldq $6,8($19)                                           \n\
2012 +       ldq $7,8($20)                                           \n\
2013 +                                                               \n\
2014 +       ldq $21,16($17)                                         \n\
2015 +       ldq $22,16($18)                                         \n\
2016 +       ldq $23,16($19)                                         \n\
2017 +       ldq $24,16($20)                                         \n\
2018 +                                                               \n\
2019 +       ldq $25,24($17)                                         \n\
2020 +       xor $0,$1,$1            # 6 cycles from $1 load         \n\
2021 +       ldq $27,24($18)                                         \n\
2022 +       xor $2,$3,$3            # 6 cycles from $3 load         \n\
2023 +                                                               \n\
2024 +       ldq $0,24($19)                                          \n\
2025 +       xor $1,$3,$3                                            \n\
2026 +       ldq $1,24($20)                                          \n\
2027 +       xor $4,$5,$5            # 7 cycles from $5 load         \n\
2028 +                                                               \n\
2029 +       stq $3,0($17)                                           \n\
2030 +       xor $6,$7,$7                                            \n\
2031 +       xor $21,$22,$22         # 7 cycles from $22 load        \n\
2032 +       xor $5,$7,$7                                            \n\
2033 +                                                               \n\
2034 +       stq $7,8($17)                                           \n\
2035 +       xor $23,$24,$24         # 7 cycles from $24 load        \n\
2036 +       ldq $2,32($17)                                          \n\
2037 +       xor $22,$24,$24                                         \n\
2038 +                                                               \n\
2039 +       ldq $3,32($18)                                          \n\
2040 +       ldq $4,32($19)                                          \n\
2041 +       ldq $5,32($20)                                          \n\
2042 +       xor $25,$27,$27         # 8 cycles from $27 load        \n\
2043 +                                                               \n\
2044 +       ldq $6,40($17)                                          \n\
2045 +       ldq $7,40($18)                                          \n\
2046 +       ldq $21,40($19)                                         \n\
2047 +       ldq $22,40($20)                                         \n\
2048 +                                                               \n\
2049 +       stq $24,16($17)                                         \n\
2050 +       xor $0,$1,$1            # 9 cycles from $1 load         \n\
2051 +       xor $2,$3,$3            # 5 cycles from $3 load         \n\
2052 +       xor $27,$1,$1                                           \n\
2053 +                                                               \n\
2054 +       stq $1,24($17)                                          \n\
2055 +       xor $4,$5,$5            # 5 cycles from $5 load         \n\
2056 +       ldq $23,48($17)                                         \n\
2057 +       xor $3,$5,$5                                            \n\
2058 +                                                               \n\
2059 +       ldq $24,48($18)                                         \n\
2060 +       ldq $25,48($19)                                         \n\
2061 +       ldq $27,48($20)                                         \n\
2062 +       ldq $0,56($17)                                          \n\
2063 +                                                               \n\
2064 +       ldq $1,56($18)                                          \n\
2065 +       ldq $2,56($19)                                          \n\
2066 +       ldq $3,56($20)                                          \n\
2067 +       xor $6,$7,$7            # 8 cycles from $6 load         \n\
2068 +                                                               \n\
2069 +       ldq $31,256($17)                                        \n\
2070 +       xor $21,$22,$22         # 8 cycles from $22 load        \n\
2071 +       ldq $31,256($18)                                        \n\
2072 +       xor $7,$22,$22                                          \n\
2073 +                                                               \n\
2074 +       ldq $31,256($19)                                        \n\
2075 +       xor $23,$24,$24         # 6 cycles from $24 load        \n\
2076 +       ldq $31,256($20)                                        \n\
2077 +       xor $25,$27,$27         # 6 cycles from $27 load        \n\
2078 +                                                               \n\
2079 +       stq $5,32($17)                                          \n\
2080 +       xor $24,$27,$27                                         \n\
2081 +       xor $0,$1,$1            # 7 cycles from $1 load         \n\
2082 +       xor $2,$3,$3            # 6 cycles from $3 load         \n\
2083 +                                                               \n\
2084 +       stq $22,40($17)                                         \n\
2085 +       xor $1,$3,$3                                            \n\
2086 +       stq $27,48($17)                                         \n\
2087 +       subq $16,1,$16                                          \n\
2088 +                                                               \n\
2089 +       stq $3,56($17)                                          \n\
2090 +       addq $20,64,$20                                         \n\
2091 +       addq $19,64,$19                                         \n\
2092 +       addq $18,64,$18                                         \n\
2093 +                                                               \n\
2094 +       addq $17,64,$17                                         \n\
2095 +       bgt $16,4b                                              \n\
2096 +       ret                                                     \n\
2097 +       .end xor_alpha_prefetch_4                               \n\
2098 +                                                               \n\
2099 +       .align 3                                                \n\
2100 +       .ent xor_alpha_prefetch_5                               \n\
2101 +xor_alpha_prefetch_5:                                          \n\
2102 +       .prologue 0                                             \n\
2103 +       srl $16, 6, $16                                         \n\
2104 +                                                               \n\
2105 +       ldq $31, 0($17)                                         \n\
2106 +       ldq $31, 0($18)                                         \n\
2107 +       ldq $31, 0($19)                                         \n\
2108 +       ldq $31, 0($20)                                         \n\
2109 +       ldq $31, 0($21)                                         \n\
2110 +                                                               \n\
2111 +       ldq $31, 64($17)                                        \n\
2112 +       ldq $31, 64($18)                                        \n\
2113 +       ldq $31, 64($19)                                        \n\
2114 +       ldq $31, 64($20)                                        \n\
2115 +       ldq $31, 64($21)                                        \n\
2116 +                                                               \n\
2117 +       ldq $31, 128($17)                                       \n\
2118 +       ldq $31, 128($18)                                       \n\
2119 +       ldq $31, 128($19)                                       \n\
2120 +       ldq $31, 128($20)                                       \n\
2121 +       ldq $31, 128($21)                                       \n\
2122 +                                                               \n\
2123 +       ldq $31, 192($17)                                       \n\
2124 +       ldq $31, 192($18)                                       \n\
2125 +       ldq $31, 192($19)                                       \n\
2126 +       ldq $31, 192($20)                                       \n\
2127 +       ldq $31, 192($21)                                       \n\
2128 +       .align 4                                                \n\
2129 +5:                                                             \n\
2130 +       ldq $0,0($17)                                           \n\
2131 +       ldq $1,0($18)                                           \n\
2132 +       ldq $2,0($19)                                           \n\
2133 +       ldq $3,0($20)                                           \n\
2134 +                                                               \n\
2135 +       ldq $4,0($21)                                           \n\
2136 +       ldq $5,8($17)                                           \n\
2137 +       ldq $6,8($18)                                           \n\
2138 +       ldq $7,8($19)                                           \n\
2139 +                                                               \n\
2140 +       ldq $22,8($20)                                          \n\
2141 +       ldq $23,8($21)                                          \n\
2142 +       ldq $24,16($17)                                         \n\
2143 +       ldq $25,16($18)                                         \n\
2144 +                                                               \n\
2145 +       ldq $27,16($19)                                         \n\
2146 +       xor $0,$1,$1            # 6 cycles from $1 load         \n\
2147 +       ldq $28,16($20)                                         \n\
2148 +       xor $2,$3,$3            # 6 cycles from $3 load         \n\
2149 +                                                               \n\
2150 +       ldq $0,16($21)                                          \n\
2151 +       xor $1,$3,$3                                            \n\
2152 +       ldq $1,24($17)                                          \n\
2153 +       xor $3,$4,$4            # 7 cycles from $4 load         \n\
2154 +                                                               \n\
2155 +       stq $4,0($17)                                           \n\
2156 +       xor $5,$6,$6            # 7 cycles from $6 load         \n\
2157 +       xor $7,$22,$22          # 7 cycles from $22 load        \n\
2158 +       xor $6,$23,$23          # 7 cycles from $23 load        \n\
2159 +                                                               \n\
2160 +       ldq $2,24($18)                                          \n\
2161 +       xor $22,$23,$23                                         \n\
2162 +       ldq $3,24($19)                                          \n\
2163 +       xor $24,$25,$25         # 8 cycles from $25 load        \n\
2164 +                                                               \n\
2165 +       stq $23,8($17)                                          \n\
2166 +       xor $25,$27,$27         # 8 cycles from $27 load        \n\
2167 +       ldq $4,24($20)                                          \n\
2168 +       xor $28,$0,$0           # 7 cycles from $0 load         \n\
2169 +                                                               \n\
2170 +       ldq $5,24($21)                                          \n\
2171 +       xor $27,$0,$0                                           \n\
2172 +       ldq $6,32($17)                                          \n\
2173 +       ldq $7,32($18)                                          \n\
2174 +                                                               \n\
2175 +       stq $0,16($17)                                          \n\
2176 +       xor $1,$2,$2            # 6 cycles from $2 load         \n\
2177 +       ldq $22,32($19)                                         \n\
2178 +       xor $3,$4,$4            # 4 cycles from $4 load         \n\
2179 +                                                               \n\
2180 +       ldq $23,32($20)                                         \n\
2181 +       xor $2,$4,$4                                            \n\
2182 +       ldq $24,32($21)                                         \n\
2183 +       ldq $25,40($17)                                         \n\
2184 +                                                               \n\
2185 +       ldq $27,40($18)                                         \n\
2186 +       ldq $28,40($19)                                         \n\
2187 +       ldq $0,40($20)                                          \n\
2188 +       xor $4,$5,$5            # 7 cycles from $5 load         \n\
2189 +                                                               \n\
2190 +       stq $5,24($17)                                          \n\
2191 +       xor $6,$7,$7            # 7 cycles from $7 load         \n\
2192 +       ldq $1,40($21)                                          \n\
2193 +       ldq $2,48($17)                                          \n\
2194 +                                                               \n\
2195 +       ldq $3,48($18)                                          \n\
2196 +       xor $7,$22,$22          # 7 cycles from $22 load        \n\
2197 +       ldq $4,48($19)                                          \n\
2198 +       xor $23,$24,$24         # 6 cycles from $24 load        \n\
2199 +                                                               \n\
2200 +       ldq $5,48($20)                                          \n\
2201 +       xor $22,$24,$24                                         \n\
2202 +       ldq $6,48($21)                                          \n\
2203 +       xor $25,$27,$27         # 7 cycles from $27 load        \n\
2204 +                                                               \n\
2205 +       stq $24,32($17)                                         \n\
2206 +       xor $27,$28,$28         # 8 cycles from $28 load        \n\
2207 +       ldq $7,56($17)                                          \n\
2208 +       xor $0,$1,$1            # 6 cycles from $1 load         \n\
2209 +                                                               \n\
2210 +       ldq $22,56($18)                                         \n\
2211 +       ldq $23,56($19)                                         \n\
2212 +       ldq $24,56($20)                                         \n\
2213 +       ldq $25,56($21)                                         \n\
2214 +                                                               \n\
2215 +       ldq $31,256($17)                                        \n\
2216 +       xor $28,$1,$1                                           \n\
2217 +       ldq $31,256($18)                                        \n\
2218 +       xor $2,$3,$3            # 9 cycles from $3 load         \n\
2219 +                                                               \n\
2220 +       ldq $31,256($19)                                        \n\
2221 +       xor $3,$4,$4            # 9 cycles from $4 load         \n\
2222 +       ldq $31,256($20)                                        \n\
2223 +       xor $5,$6,$6            # 8 cycles from $6 load         \n\
2224 +                                                               \n\
2225 +       stq $1,40($17)                                          \n\
2226 +       xor $4,$6,$6                                            \n\
2227 +       xor $7,$22,$22          # 7 cycles from $22 load        \n\
2228 +       xor $23,$24,$24         # 6 cycles from $24 load        \n\
2229 +                                                               \n\
2230 +       stq $6,48($17)                                          \n\
2231 +       xor $22,$24,$24                                         \n\
2232 +       ldq $31,256($21)                                        \n\
2233 +       xor $24,$25,$25         # 8 cycles from $25 load        \n\
2234 +                                                               \n\
2235 +       stq $25,56($17)                                         \n\
2236 +       subq $16,1,$16                                          \n\
2237 +       addq $21,64,$21                                         \n\
2238 +       addq $20,64,$20                                         \n\
2239 +                                                               \n\
2240 +       addq $19,64,$19                                         \n\
2241 +       addq $18,64,$18                                         \n\
2242 +       addq $17,64,$17                                         \n\
2243 +       bgt $16,5b                                              \n\
2244 +                                                               \n\
2245 +       ret                                                     \n\
2246 +       .end xor_alpha_prefetch_5                               \n\
2247  ");
2248
2249  static struct xor_block_template xor_block_alpha = {
2250 -       name: "alpha",
2251 -       do_2: xor_alpha_2,
2252 -       do_3: xor_alpha_3,
2253 -       do_4: xor_alpha_4,
2254 -       do_5: xor_alpha_5,
2255 +       .name   = "alpha",
2256 +       .do_2   = xor_alpha_2,
2257 +       .do_3   = xor_alpha_3,
2258 +       .do_4   = xor_alpha_4,
2259 +       .do_5   = xor_alpha_5,
2260  };
2261
2262  static struct xor_block_template xor_block_alpha_prefetch = {
2263 -       name: "alpha prefetch",
2264 -       do_2: xor_alpha_prefetch_2,
2265 -       do_3: xor_alpha_prefetch_3,
2266 -       do_4: xor_alpha_prefetch_4,
2267 -       do_5: xor_alpha_prefetch_5,
2268 +       .name   = "alpha prefetch",
2269 +       .do_2   = xor_alpha_prefetch_2,
2270 +       .do_3   = xor_alpha_prefetch_3,
2271 +       .do_4   = xor_alpha_prefetch_4,
2272 +       .do_5   = xor_alpha_prefetch_5,
2273  };
2274
2275  /* For grins, also test the generic routines.  */