1 diff -Naur -X /home/marcelo/lib/dontdiff linux.orig/drivers/ide/via82cxxx.c linux/drivers/ide/via82cxxx.c
2 --- linux.orig/drivers/ide/via82cxxx.c Tue Apr 16 04:45:45 2002
3 +++ linux/drivers/ide/via82cxxx.c Tue Apr 16 04:41:29 2002
9 * Copyright (c) 2000-2001 Vojtech Pavlik
20 * VIA IDE driver for Linux. Supports
22 * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
23 - * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233
24 + * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a
26 * southbridges, which can be found in
28 * VIA Apollo Master, VP, VP2, VP2/97, VP3, VPX, VPX/97, MVP3, MVP4, P6, Pro,
29 * ProII, ProPlus, Pro133, Pro133+, Pro133A, Pro133A Dual, Pro133T, Pro133Z,
30 * PLE133, PLE133T, Pro266, Pro266T, ProP4X266, PM601, PM133, PN133, PL133T,
31 - * PX266, PM266, KX133, KT133, KT133A, KLE133, KT266, KX266, KM133, KM133A,
32 - * KL133, KN133, KM266
33 + * PX266, PM266, KX133, KT133, KT133A, KT133E, KLE133, KT266, KX266, KM133,
34 + * KM133A, KL133, KN133, KM266
35 * PC-Chips VXPro, VXPro+, VXTwo, TXPro-III, TXPro-AGP, AGPPro, ViaGra, BXToo,
37 * AMD 640, 640 AGP, 750 IronGate, 760, 760MP
42 - * PIO 0-5, MWDMA 0-2, SWDMA 0-2 and UDMA 0-5
43 + * PIO 0-5, MWDMA 0-2, SWDMA 0-2 and UDMA 0-6
45 - * (this includes UDMA33, 66 and 100) modes. UDMA66 and higher modes are
46 + * (this includes UDMA33, 66, 100 and 133) modes. UDMA66 and higher modes are
47 * autoenabled only in case the BIOS has detected a 80 wire cable. To ignore
48 * the BIOS data and assume the cable is present, use 'ide0=ata66' or
49 * 'ide1=ata66' on the kernel command line.
51 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
53 * Should you need to contact me, the author, you can do so either by
54 - * e-mail - mail your message to <vojtech@suse.cz>, or by paper mail:
55 - * Vojtech Pavlik, Ucitelska 1576, Prague 8, 182 00 Czech Republic
56 + * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
57 + * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
60 #include <linux/config.h>
62 #define VIA_UDMA_33 0x001
63 #define VIA_UDMA_66 0x002
64 #define VIA_UDMA_100 0x003
65 +#define VIA_UDMA_133 0x004
66 #define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
67 #define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
68 #define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
69 #define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
70 +#define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */
73 * VIA SouthBridge chips.
76 } via_isa_bridges[] = {
78 - { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_100 },
79 - { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_100 },
80 - { "vt8233c", PCI_DEVICE_ID_VIA_8233C, 0x00, 0x2f, VIA_UDMA_100 },
81 + { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 },
82 + { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 },
84 + { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 },
85 + { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
86 { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
87 { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
88 { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
90 { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
91 { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
92 { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
93 + { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
98 static unsigned char via_enabled;
99 static unsigned int via_80w;
100 static unsigned int via_clock;
101 -static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100" };
102 +static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
108 static int via_get_info(char *buffer, char **addr, off_t offset, int count)
110 - short speed[4], cycle[4], setup[4], active[4], recover[4], den[4],
111 + int speed[4], cycle[4], setup[4], active[4], recover[4], den[4],
112 uen[4], udma[4], umul[4], active8b[4], recover8b[4];
113 struct pci_dev *dev = bmide_dev;
114 unsigned int v, u, i;
117 via_print("----------VIA BusMastering IDE Configuration----------------");
119 - via_print("Driver Version: 3.29");
120 + via_print("Driver Version: 3.34");
121 via_print("South Bridge: VIA %s", via_config->name);
123 pci_read_config_byte(isa_dev, PCI_REVISION_ID, &t);
125 via_print("Highest DMA rate: %s", via_dma[via_config->flags & VIA_UDMA]);
127 via_print("BM-DMA base: %#x", via_base);
128 - via_print("PCI clock: %dMHz", via_clock);
129 + via_print("PCI clock: %d.%dMHz", via_clock / 1000, via_clock / 100 % 10);
131 pci_read_config_byte(dev, VIA_MISC_1, &t);
132 via_print("Master Read Cycle IRDY: %dws", (t & 64) >> 6);
133 @@ -218,40 +220,45 @@
134 uen[i] = ((u >> ((3 - i) << 3)) & 0x20);
135 den[i] = (c & ((i & 1) ? 0x40 : 0x20) << ((i & 2) << 2));
137 - speed[i] = 20 * via_clock / (active[i] + recover[i]);
138 - cycle[i] = 1000 / via_clock * (active[i] + recover[i]);
139 + speed[i] = 2 * via_clock / (active[i] + recover[i]);
140 + cycle[i] = 1000000 * (active[i] + recover[i]) / via_clock;
142 if (!uen[i] || !den[i])
145 switch (via_config->flags & VIA_UDMA) {
148 - speed[i] = 60 * via_clock / udma[i];
149 - cycle[i] = 333 / via_clock * udma[i];
152 + speed[i] = 2 * via_clock / udma[i];
153 + cycle[i] = 1000000 * udma[i] / via_clock;
157 - speed[i] = 40 * via_clock / (udma[i] * umul[i]);
158 - cycle[i] = 500 / via_clock * (udma[i] * umul[i]);
159 + speed[i] = 4 * via_clock / (udma[i] * umul[i]);
160 + cycle[i] = 500000 * (udma[i] * umul[i]) / via_clock;
164 - speed[i] = 20 * via_clock / udma[i];
165 - cycle[i] = 1000 / via_clock * udma[i];
167 + speed[i] = 6 * via_clock / udma[i];
168 + cycle[i] = 333333 * udma[i] / via_clock;
172 + speed[i] = 8 * via_clock / udma[i];
173 + cycle[i] = 250000 * udma[i] / via_clock;
178 via_print_drive("Transfer Mode: ", "%10s", den[i] ? (uen[i] ? "UDMA" : "DMA") : "PIO");
180 - via_print_drive("Address Setup: ", "%8dns", (1000 / via_clock) * setup[i]);
181 - via_print_drive("Cmd Active: ", "%8dns", (1000 / via_clock) * active8b[i]);
182 - via_print_drive("Cmd Recovery: ", "%8dns", (1000 / via_clock) * recover8b[i]);
183 - via_print_drive("Data Active: ", "%8dns", (1000 / via_clock) * active[i]);
184 - via_print_drive("Data Recovery: ", "%8dns", (1000 / via_clock) * recover[i]);
185 + via_print_drive("Address Setup: ", "%8dns", 1000000 * setup[i] / via_clock);
186 + via_print_drive("Cmd Active: ", "%8dns", 1000000 * active8b[i] / via_clock);
187 + via_print_drive("Cmd Recovery: ", "%8dns", 1000000 * recover8b[i] / via_clock);
188 + via_print_drive("Data Active: ", "%8dns", 1000000 * active[i] / via_clock);
189 + via_print_drive("Data Recovery: ", "%8dns", 1000000 * recover[i] / via_clock);
190 via_print_drive("Cycle Time: ", "%8dns", cycle[i]);
191 - via_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed[i] / 10, speed[i] % 10);
192 + via_print_drive("Transfer Rate: ", "%4d.%dMB/s", speed[i] / 1000, speed[i] / 100 % 10);
194 return p - buffer; /* hoping it is less than 4K... */
197 case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
198 case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
199 case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
200 + case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
204 @@ -296,20 +304,21 @@
206 ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
207 struct ide_timing t, p;
209 + unsigned int T, UT;
211 if (speed != XFER_PIO_SLOW && speed != drive->current_speed)
212 if (ide_config_drive_speed(drive, speed))
213 printk(KERN_WARNING "ide%d: Drive %d didn't accept speed setting. Oh, well.\n",
214 drive->dn >> 1, drive->dn & 1);
216 - T = 1000 / via_clock;
217 + T = 1000000000 / via_clock;
219 switch (via_config->flags & VIA_UDMA) {
220 case VIA_UDMA_33: UT = T; break;
221 case VIA_UDMA_66: UT = T/2; break;
222 case VIA_UDMA_100: UT = T/3; break;
223 - default: UT = T; break;
224 + case VIA_UDMA_133: UT = T/4; break;
228 ide_timing_compute(drive, speed, &t, T, UT);
230 XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
231 (via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
232 (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
233 - (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0));
234 + (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
235 + (w80 && (via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
237 via_set_drive(drive, speed);
239 @@ -395,14 +405,16 @@
242 for (via_config = via_isa_bridges; via_config->id; via_config++)
243 - if ((isa = pci_find_device(PCI_VENDOR_ID_VIA, via_config->id, NULL))) {
244 + if ((isa = pci_find_device(PCI_VENDOR_ID_VIA +
245 + !!(via_config->flags & VIA_BAD_ID), via_config->id, NULL))) {
247 pci_read_config_byte(isa, PCI_REVISION_ID, &t);
248 if (t >= via_config->rev_min && t <= via_config->rev_max)
252 if (!via_config->id) {
253 - printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, contact Vojtech Pavlik <vojtech@suse.cz>\n");
254 + printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, contact Vojtech Pavlik <vojtech@ucw.cz>\n");
258 @@ -412,22 +424,28 @@
260 switch (via_config->flags & VIA_UDMA) {
264 - pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
265 - for (i = 24; i >= 0; i -= 8)
266 - if (((u >> i) & 0x10) || (((u >> i) & 0x20) && (((u >> i) & 7) < 3)))
267 - via_80w |= (1 << (1 - (i >> 4))); /* BIOS 80-wire bit or UDMA w/ < 50ns/cycle */
272 pci_read_config_dword(dev, VIA_UDMA_TIMING, &u); /* Enable Clk66 */
273 pci_write_config_dword(dev, VIA_UDMA_TIMING, u | 0x80008);
274 for (i = 24; i >= 0; i -= 8)
275 if (((u >> (i & 16)) & 8) && ((u >> i) & 0x20) && (((u >> i) & 7) < 2))
276 via_80w |= (1 << (1 - (i >> 4))); /* 2x PCI clock and UDMA w/ < 3T/cycle */
280 + pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
281 + for (i = 24; i >= 0; i -= 8)
282 + if (((u >> i) & 0x10) || (((u >> i) & 0x20) && (((u >> i) & 7) < 4)))
283 + via_80w |= (1 << (1 - (i >> 4))); /* BIOS 80-wire bit or UDMA w/ < 60ns/cycle */
287 + pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
288 + for (i = 24; i >= 0; i -= 8)
289 + if (((u >> i) & 0x10) || (((u >> i) & 0x20) && (((u >> i) & 7) < 8)))
290 + via_80w |= (1 << (1 - (i >> 4))); /* BIOS 80-wire bit or UDMA w/ < 60ns/cycle */
295 if (via_config->flags & VIA_BAD_CLK66) { /* Disable Clk66 */
296 @@ -466,11 +484,18 @@
297 * Determine system bus clock.
300 - via_clock = system_bus_clock();
301 - if (via_clock < 20 || via_clock > 50) {
302 + via_clock = system_bus_clock() * 1000;
304 + switch (via_clock) {
305 + case 33000: via_clock = 33333; break;
306 + case 37000: via_clock = 37500; break;
307 + case 41000: via_clock = 41666; break;
310 + if (via_clock < 20000 || via_clock > 50000) {
311 printk(KERN_WARNING "VP_IDE: User given PCI clock speed impossible (%d), using 33 MHz instead.\n", via_clock);
312 - printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want to force UDMA66/UDMA100.\n");
314 + printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want to assume 80-wire cable.\n");
319 diff -Naur -X /home/marcelo/lib/dontdiff linux.orig/include/linux/pci_ids.h linux/include/linux/pci_ids.h
320 --- linux.orig/include/linux/pci_ids.h Tue Apr 16 04:45:48 2002
321 +++ linux/include/linux/pci_ids.h Tue Apr 16 04:41:32 2002
323 #define PCI_DEVICE_ID_NEC_PCX2 0x0046
324 #define PCI_DEVICE_ID_NEC_NILE4 0x005a
325 #define PCI_DEVICE_ID_NEC_VRC5476 0x009b
326 +#define PCI_DEVICE_ID_NEC_VRC5477_AC97 0x00a6
328 #define PCI_VENDOR_ID_FD 0x1036
329 #define PCI_DEVICE_ID_FD_36C70 0x0000
331 #define PCI_DEVICE_ID_HP_DIVA1 0x1049
332 #define PCI_DEVICE_ID_HP_DIVA2 0x104A
333 #define PCI_DEVICE_ID_HP_SP2_0 0x104B
334 +#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229
335 +#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a
336 +#define PCI_DEVICE_ID_HP_ZX1_LBA 0x122e
338 #define PCI_VENDOR_ID_PCTECH 0x1042
339 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
341 #define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000
342 #define PCI_DEVICE_ID_ELSA_QS3000 0x3000
344 -#define PCI_VENDOR_ID_ELSA 0x1048
345 -#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000
346 -#define PCI_DEVICE_ID_ELSA_QS3000 0x3000
348 #define PCI_VENDOR_ID_SGS 0x104a
349 #define PCI_DEVICE_ID_SGS_2000 0x0008
350 #define PCI_DEVICE_ID_SGS_1764 0x0009
352 #define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
353 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
354 #define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802
355 +#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
356 #define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806
358 #define PCI_VENDOR_ID_PROMISE 0x105a
360 #define PCI_DEVICE_ID_PROMISE_20268R 0x6268
361 #define PCI_DEVICE_ID_PROMISE_20269 0x4d69
362 #define PCI_DEVICE_ID_PROMISE_20275 0x1275
363 +#define PCI_DEVICE_ID_PROMISE_20276 0x5275
364 #define PCI_DEVICE_ID_PROMISE_5300 0x5300
366 #define PCI_VENDOR_ID_N9 0x105d
368 #define PCI_DEVICE_ID_AL_M1621 0x1621
369 #define PCI_DEVICE_ID_AL_M1631 0x1631
370 #define PCI_DEVICE_ID_AL_M1641 0x1641
371 +#define PCI_DEVICE_ID_AL_M1644 0x1644
372 #define PCI_DEVICE_ID_AL_M1647 0x1647
373 #define PCI_DEVICE_ID_AL_M1651 0x1651
374 #define PCI_DEVICE_ID_AL_M1543 0x1543
375 @@ -959,11 +962,12 @@
376 #define PCI_DEVICE_ID_VIA_8233_7 0x3065
377 #define PCI_DEVICE_ID_VIA_82C686_6 0x3068
378 #define PCI_DEVICE_ID_VIA_8233_0 0x3074
379 +#define PCI_DEVICE_ID_VIA_8633_0 0x3091
380 +#define PCI_DEVICE_ID_VIA_8367_0 0x3099
381 #define PCI_DEVICE_ID_VIA_8622 0x3102
382 #define PCI_DEVICE_ID_VIA_8233C_0 0x3109
383 #define PCI_DEVICE_ID_VIA_8361 0x3112
384 -#define PCI_DEVICE_ID_VIA_8633_0 0x3091
385 -#define PCI_DEVICE_ID_VIA_8367_0 0x3099
386 +#define PCI_DEVICE_ID_VIA_8233A 0x3147
387 #define PCI_DEVICE_ID_VIA_86C100A 0x6100
388 #define PCI_DEVICE_ID_VIA_8231 0x8231
389 #define PCI_DEVICE_ID_VIA_8231_4 0x8235
391 #define PCI_DEVICE_ID_VIA_82C597_1 0x8597
392 #define PCI_DEVICE_ID_VIA_82C598_1 0x8598
393 #define PCI_DEVICE_ID_VIA_8601_1 0x8601
394 -#define PCI_DEVICE_ID_VIA_8505_1 0X8605
395 +#define PCI_DEVICE_ID_VIA_8505_1 0x8605
396 #define PCI_DEVICE_ID_VIA_8633_1 0xB091
397 #define PCI_DEVICE_ID_VIA_8367_1 0xB099
399 @@ -1112,6 +1116,11 @@
400 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a
401 #define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f
403 +#define PCI_VENDOR_ID_TOSHIBA_2 0x102f
404 +#define PCI_DEVICE_ID_TOSHIBA_TX3927 0x000a
405 +#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030
406 +#define PCI_DEVICE_ID_TOSHIBA_TX4927 0x0180
408 #define PCI_VENDOR_ID_RICOH 0x1180
409 #define PCI_DEVICE_ID_RICOH_RL5C465 0x0465
410 #define PCI_DEVICE_ID_RICOH_RL5C466 0x0466
411 @@ -1287,13 +1296,9 @@
412 #define PCI_VENDOR_ID_ITE 0x1283
413 #define PCI_DEVICE_ID_ITE_IT8172G 0x8172
414 #define PCI_DEVICE_ID_ITE_IT8172G_AUDIO 0x0801
416 -#define PCI_VENDOR_ID_ITE 0x1283
417 -#define PCI_DEVICE_ID_ITE_IT8172G 0x8172
419 -#define PCI_VENDOR_ID_ITE 0x1283
420 #define PCI_DEVICE_ID_ITE_8872 0x8872
422 +#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886
424 /* formerly Platform Tech */
425 #define PCI_VENDOR_ID_ESS_OLD 0x1285
426 @@ -1458,6 +1463,8 @@
427 #define PCI_DEVICE_ID_LAVA_DSERIAL 0x0100 /* 2x 16550 */
428 #define PCI_DEVICE_ID_LAVA_QUATRO_A 0x0101 /* 2x 16550, half of 4 port */
429 #define PCI_DEVICE_ID_LAVA_QUATRO_B 0x0102 /* 2x 16550, half of 4 port */
430 +#define PCI_DEVICE_ID_LAVA_OCTO_A 0x0180 /* 4x 16550A, half of 8 port */
431 +#define PCI_DEVICE_ID_LAVA_OCTO_B 0x0181 /* 4x 16550A, half of 8 port */
432 #define PCI_DEVICE_ID_LAVA_PORT_PLUS 0x0200 /* 2x 16650 */
433 #define PCI_DEVICE_ID_LAVA_QUAD_A 0x0201 /* 2x 16650, half of 4 port */
434 #define PCI_DEVICE_ID_LAVA_QUAD_B 0x0202 /* 2x 16650, half of 4 port */
435 @@ -1474,9 +1481,9 @@
436 #define PCI_VENDOR_ID_OXSEMI 0x1415
437 #define PCI_DEVICE_ID_OXSEMI_12PCI840 0x8403
438 #define PCI_DEVICE_ID_OXSEMI_16PCI954 0x9501
439 -#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x950A
440 #define PCI_DEVICE_ID_OXSEMI_16PCI95N 0x9511
441 #define PCI_DEVICE_ID_OXSEMI_16PCI954PP 0x9513
442 +#define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521
444 #define PCI_VENDOR_ID_AIRONET 0x14b9
445 #define PCI_DEVICE_ID_AIRONET_4800_1 0x0001
446 @@ -1506,7 +1513,11 @@
447 #define PCI_VENDOR_ID_BROADCOM 0x14e4
448 #define PCI_DEVICE_ID_TIGON3_5700 0x1644
449 #define PCI_DEVICE_ID_TIGON3_5701 0x1645
450 +#define PCI_DEVICE_ID_TIGON3_5702 0x1646
451 #define PCI_DEVICE_ID_TIGON3_5703 0x1647
452 +#define PCI_DEVICE_ID_TIGON3_5702FE 0x164d
453 +#define PCI_DEVICE_ID_TIGON3_5702X 0x16a6
454 +#define PCI_DEVICE_ID_TIGON3_5703X 0x16a7
456 #define PCI_VENDOR_ID_SYBA 0x1592
457 #define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
458 @@ -1521,6 +1532,9 @@
459 #define PCI_VENDOR_ID_PDC 0x15e9
460 #define PCI_DEVICE_ID_PDC_1841 0x1841
462 +#define PCI_VENDOR_ID_ALTIMA 0x173b
463 +#define PCI_DEVICE_ID_ALTIMA_AC1000 0x03e8
465 #define PCI_VENDOR_ID_SYMPHONY 0x1c1c
466 #define PCI_DEVICE_ID_SYMPHONY_101 0x0001
468 @@ -1631,16 +1645,6 @@
469 #define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443
470 #define PCI_DEVICE_ID_INTEL_82801BA_3 0x2444
471 #define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445
472 -#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480
473 -#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482
474 -#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483
475 -#define PCI_DEVICE_ID_INTEL_82801CA_4 0x2484
476 -#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485
477 -#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486
478 -#define PCI_DEVICE_ID_INTEL_82801CA_7 0x2487
479 -#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a
480 -#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b
481 -#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c
482 #define PCI_DEVICE_ID_INTEL_82801BA_5 0x2446
483 #define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448
484 #define PCI_DEVICE_ID_INTEL_82801BA_7 0x2449
485 diff -Naur -X /home/marcelo/lib/dontdiff linux.orig/drivers/ide/ide-timing.h linux/drivers/ide/ide-timing.h
486 --- linux.orig/drivers/ide/ide-timing.h Tue Apr 16 04:45:44 2002
487 +++ linux/drivers/ide/ide-timing.h Tue Apr 16 04:41:37 2002
489 #define _IDE_TIMING_H
495 - * Copyright (c) 1999-2000 Vojtech Pavlik
497 - * Sponsored by SuSE
498 + * Copyright (c) 1999-2001 Vojtech Pavlik
503 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
505 * Should you need to contact me, the author, you can do so either by
506 - * e-mail - mail your message to <vojtech@suse.cz>, or by paper mail:
507 - * Vojtech Pavlik, Ucitelska 1576, Prague 8, 182 00 Czech Republic
508 + * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
509 + * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
512 #include <linux/hdreg.h>
515 #define XFER_PIO_5 0x0d
516 #define XFER_UDMA_SLOW 0x4f
525 - * PIO 0-5, MWDMA 0-2 and UDMA 0-5 timings (in nanoseconds).
526 + * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
527 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
528 - * for PIO 5, which is a nonstandard extension.
529 + * for PIO 5, which is a nonstandard extension and UDMA6, which
530 + * is currently supported only by Maxtor drives.
533 static struct ide_timing ide_timing[] = {
535 + { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
536 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
537 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
538 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
540 #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
542 #define XFER_MODE 0xf0
543 +#define XFER_UDMA_133 0x48
544 #define XFER_UDMA_100 0x44
545 #define XFER_UDMA_66 0x42
546 #define XFER_UDMA 0x40
549 if ((map & XFER_UDMA) && (id->field_valid & 4)) { /* Want UDMA and UDMA bitmap valid */
551 + if ((map & XFER_UDMA_133) == XFER_UDMA_133)
552 + if ((best = (id->dma_ultra & 0x0040) ? XFER_UDMA_6 : 0)) return best;
554 if ((map & XFER_UDMA_100) == XFER_UDMA_100)
555 if ((best = (id->dma_ultra & 0x0020) ? XFER_UDMA_5 : 0)) return best;
557 @@ -174,14 +176,14 @@
559 static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q, int T, int UT)
561 - q->setup = EZ(t->setup, T);
562 - q->act8b = EZ(t->act8b, T);
563 - q->rec8b = EZ(t->rec8b, T);
564 - q->cyc8b = EZ(t->cyc8b, T);
565 - q->active = EZ(t->active, T);
566 - q->recover = EZ(t->recover, T);
567 - q->cycle = EZ(t->cycle, T);
568 - q->udma = EZ(t->udma, UT);
569 + q->setup = EZ(t->setup * 1000, T);
570 + q->act8b = EZ(t->act8b * 1000, T);
571 + q->rec8b = EZ(t->rec8b * 1000, T);
572 + q->cyc8b = EZ(t->cyc8b * 1000, T);
573 + q->active = EZ(t->active * 1000, T);
574 + q->recover = EZ(t->recover * 1000, T);
575 + q->cycle = EZ(t->cycle * 1000, T);
576 + q->udma = EZ(t->udma * 1000, UT);
579 static void ide_timing_merge(struct ide_timing *a, struct ide_timing *b, struct ide_timing *m, unsigned int what)