1 diff -u -r1.18 xf86pciBus.c
2 --- X11-6.9.0/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c 25 Mar 2006 19:52:03 -0000 1.18
3 +++ X11-6.9.0/xc/programs/Xserver/hw/xfree86/common/xf86pciBus.c 26 Apr 2006 04:14:04 -0000
5 PciBus->brfunc = pcrp->funcnum;
7 PciBus->subclass = sub_class;
8 - PciBus->interface = pcrp->pci_prog_if;
10 + /* The Intel bridges don't report as transparent
11 + but guess what they are - from Linux kernel - airlied */
12 + if ((pcrp->pci_vendor == PCI_VENDOR_INTEL) &&
13 + ((pcrp->pci_device & 0xff00) == 0x2400)) {
14 + xf86MsgVerb(X_INFO, 3, "Intel Bridge workaround enabled\n");
15 + PciBus->interface = PCI_IF_BRIDGE_PCI_SUBTRACTIVE;
17 + PciBus->interface = pcrp->pci_prog_if;
20 if (pBusInfo && pBusInfo->funcs->pciControlBridge)
22 Index: os-support/shared/stdResource.c
23 ===================================================================
24 RCS file: /cvs/xorg/xserver/xorg/hw/xfree86/os-support/shared/stdResource.c,v
25 retrieving revision 1.4
26 diff -u -r1.4 stdResource.c
27 --- X11-6.9.0/xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c 25 Mar 2006 19:52:04 -0000 1.4
28 +++ X11-6.9.0/xc/programs/Xserver/hw/xfree86/os-support/shared/stdResource.c 26 Apr 2006 04:14:04 -0000
30 ret = xf86AddResToList(ret, &range, -1);
31 RANGE(range, 0xfee00000, 0xfeefffff, ResExcMemBlock | ResBios);
32 ret = xf86AddResToList(ret, &range, -1);
34 + /* airlied - remove BIOS range it shouldn't be here
35 + this should use E820 - or THE OS */
36 RANGE(range, 0xffe00000, 0xffffffff, ResExcMemBlock | ResBios);
37 ret = xf86AddResToList(ret, &range, -1);
41 * Fallback would be to claim well known ports in the 0x0 - 0x3ff range
42 * along with their sparse I/O aliases, but that's too imprecise. Instead