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[packages/kernel.git] / usb-ehci-2.4.20-pre11.patch
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bd34cc22 1diff -Nru a/drivers/usb/hcd/ehci-dbg.c b/drivers/usb/hcd/ehci-dbg.c
2--- a/drivers/usb/hcd/ehci-dbg.c Mon Oct 21 22:14:31 2002
3+++ b/drivers/usb/hcd/ehci-dbg.c Mon Oct 21 22:14:31 2002
4@@ -1,5 +1,5 @@
5 /*
6- * Copyright (c) 2001 by David Brownell
7+ * Copyright (c) 2001-2002 by David Brownell
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11@@ -26,8 +26,10 @@
12
13 #ifdef DEBUG
14
15-/* check the values in the HCSPARAMS register - host controller structural parameters */
16-/* see EHCI 0.95 Spec, Table 2-4 for each value */
17+/* check the values in the HCSPARAMS register
18+ * (host controller _Structural_ parameters)
19+ * see EHCI spec, Table 2-4 for each value
20+ */
21 static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
22 {
23 u32 params = readl (&ehci->caps->hcs_params);
24@@ -55,7 +57,7 @@
25 strcat(buf, tmp);
26 }
27 dbg ("%s: %s portroute %s",
28- ehci->hcd.bus_name, label,
29+ hcd_to_bus (&ehci->hcd)->bus_name, label,
30 buf);
31 }
32 }
33@@ -67,25 +69,27 @@
34
35 #ifdef DEBUG
36
37-/* check the values in the HCCPARAMS register - host controller capability parameters */
38-/* see EHCI 0.95 Spec, Table 2-5 for each value */
39+/* check the values in the HCCPARAMS register
40+ * (host controller _Capability_ parameters)
41+ * see EHCI Spec, Table 2-5 for each value
42+ * */
43 static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
44 {
45 u32 params = readl (&ehci->caps->hcc_params);
46
47 if (HCC_EXT_CAPS (params)) {
48 // EHCI 0.96 ... could interpret these (legacy?)
49- dbg ("%s extended capabilities at pci %d",
50+ dbg ("%s extended capabilities at pci %2x",
51 label, HCC_EXT_CAPS (params));
52 }
53 if (HCC_ISOC_CACHE (params)) {
54- dbg ("%s hcc_params 0x%04x caching frame %s%s%s",
55+ dbg ("%s hcc_params %04x caching frame %s%s%s",
56 label, params,
57 HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
58 HCC_CANPARK (params) ? " park" : "",
59 HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
60 } else {
61- dbg ("%s hcc_params 0x%04x caching %d uframes %s%s%s",
62+ dbg ("%s hcc_params %04x caching %d uframes %s%s%s",
63 label,
64 params,
65 HCC_ISOC_THRES (params),
66@@ -102,8 +106,8 @@
67
68 #ifdef DEBUG
69
70-#if 0
71-static void dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
72+static void __attribute__((__unused__))
73+dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
74 {
75 dbg ("%s %p info1 %x info2 %x hw_curr %x qtd_next %x", label,
76 qh, qh->hw_info1, qh->hw_info2,
77@@ -117,63 +121,462 @@
78 qh->hw_buf [4]);
79 }
80 }
81-#endif
82+
83+static int __attribute__((__unused__))
84+dbg_status_buf (char *buf, unsigned len, char *label, u32 status)
85+{
86+ return snprintf (buf, len,
87+ "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
88+ label, label [0] ? " " : "", status,
89+ (status & STS_ASS) ? " Async" : "",
90+ (status & STS_PSS) ? " Periodic" : "",
91+ (status & STS_RECL) ? " Recl" : "",
92+ (status & STS_HALT) ? " Halt" : "",
93+ (status & STS_IAA) ? " IAA" : "",
94+ (status & STS_FATAL) ? " FATAL" : "",
95+ (status & STS_FLR) ? " FLR" : "",
96+ (status & STS_PCD) ? " PCD" : "",
97+ (status & STS_ERR) ? " ERR" : "",
98+ (status & STS_INT) ? " INT" : ""
99+ );
100+}
101+
102+static int __attribute__((__unused__))
103+dbg_intr_buf (char *buf, unsigned len, char *label, u32 enable)
104+{
105+ return snprintf (buf, len,
106+ "%s%sintrenable %02x%s%s%s%s%s%s",
107+ label, label [0] ? " " : "", enable,
108+ (enable & STS_IAA) ? " IAA" : "",
109+ (enable & STS_FATAL) ? " FATAL" : "",
110+ (enable & STS_FLR) ? " FLR" : "",
111+ (enable & STS_PCD) ? " PCD" : "",
112+ (enable & STS_ERR) ? " ERR" : "",
113+ (enable & STS_INT) ? " INT" : ""
114+ );
115+}
116
117 static const char *const fls_strings [] =
118 { "1024", "512", "256", "??" };
119
120+static int dbg_command_buf (char *buf, unsigned len, char *label, u32 command)
121+{
122+ return snprintf (buf, len,
123+ "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
124+ label, label [0] ? " " : "", command,
125+ (command & CMD_PARK) ? "park" : "(park)",
126+ CMD_PARK_CNT (command),
127+ (command >> 16) & 0x3f,
128+ (command & CMD_LRESET) ? " LReset" : "",
129+ (command & CMD_IAAD) ? " IAAD" : "",
130+ (command & CMD_ASE) ? " Async" : "",
131+ (command & CMD_PSE) ? " Periodic" : "",
132+ fls_strings [(command >> 2) & 0x3],
133+ (command & CMD_RESET) ? " Reset" : "",
134+ (command & CMD_RUN) ? "RUN" : "HALT"
135+ );
136+}
137+
138+static int
139+dbg_port_buf (char *buf, unsigned len, char *label, int port, u32 status)
140+{
141+ char *sig;
142+
143+ /* signaling state */
144+ switch (status & (3 << 10)) {
145+ case 0 << 10: sig = "se0"; break;
146+ case 1 << 10: sig = "k"; break; /* low speed */
147+ case 2 << 10: sig = "j"; break;
148+ default: sig = "?"; break;
149+ }
150+
151+ return snprintf (buf, len,
152+ "%s%sport %d status %06x%s%s sig=%s %s%s%s%s%s%s%s%s%s",
153+ label, label [0] ? " " : "", port, status,
154+ (status & PORT_POWER) ? " POWER" : "",
155+ (status & PORT_OWNER) ? " OWNER" : "",
156+ sig,
157+ (status & PORT_RESET) ? " RESET" : "",
158+ (status & PORT_SUSPEND) ? " SUSPEND" : "",
159+ (status & PORT_RESUME) ? " RESUME" : "",
160+ (status & PORT_OCC) ? " OCC" : "",
161+ (status & PORT_OC) ? " OC" : "",
162+ (status & PORT_PEC) ? " PEC" : "",
163+ (status & PORT_PE) ? " PE" : "",
164+ (status & PORT_CSC) ? " CSC" : "",
165+ (status & PORT_CONNECT) ? " CONNECT" : ""
166+ );
167+}
168+
169 #else
170-#if 0
171-static inline void dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) {}
172-#endif
173+static inline void __attribute__((__unused__))
174+dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
175+{}
176+
177+static inline int __attribute__((__unused__))
178+dbg_status_buf (char *buf, unsigned len, char *label, u32 status)
179+{ return 0; }
180+
181+static inline int __attribute__((__unused__))
182+dbg_command_buf (char *buf, unsigned len, char *label, u32 command)
183+{ return 0; }
184+
185+static inline int __attribute__((__unused__))
186+dbg_intr_buf (char *buf, unsigned len, char *label, u32 enable)
187+{ return 0; }
188+
189+static inline int __attribute__((__unused__))
190+dbg_port_buf (char *buf, unsigned len, char *label, int port, u32 status)
191+{ return 0; }
192+
193 #endif /* DEBUG */
194
195 /* functions have the "wrong" filename when they're output... */
196+#define dbg_status(ehci, label, status) { \
197+ char _buf [80]; \
198+ dbg_status_buf (_buf, sizeof _buf, label, status); \
199+ dbg ("%s", _buf); \
200+}
201+
202+#define dbg_cmd(ehci, label, command) { \
203+ char _buf [80]; \
204+ dbg_command_buf (_buf, sizeof _buf, label, command); \
205+ dbg ("%s", _buf); \
206+}
207+
208+#define dbg_port(hcd, label, port, status) { \
209+ char _buf [80]; \
210+ dbg_port_buf (_buf, sizeof _buf, label, port, status); \
211+ dbg ("%s", _buf); \
212+}
213+
214+/*-------------------------------------------------------------------------*/
215+
216+#ifdef STUB_DEBUG_FILES
217+
218+static inline void create_debug_files (struct ehci_hcd *bus) { }
219+static inline void remove_debug_files (struct ehci_hcd *bus) { }
220+
221+#else
222+
223+/* troubleshooting help: expose state in driverfs */
224+
225+#define speed_char(info1) ({ char tmp; \
226+ switch (info1 & (3 << 12)) { \
227+ case 0 << 12: tmp = 'f'; break; \
228+ case 1 << 12: tmp = 'l'; break; \
229+ case 2 << 12: tmp = 'h'; break; \
230+ default: tmp = '?'; break; \
231+ }; tmp; })
232+
233+static void qh_lines (struct ehci_qh *qh, char **nextp, unsigned *sizep)
234+{
235+ u32 scratch;
236+ struct list_head *entry;
237+ struct ehci_qtd *td;
238+ unsigned temp;
239+ unsigned size = *sizep;
240+ char *next = *nextp;
241+
242+ scratch = cpu_to_le32p (&qh->hw_info1);
243+ temp = snprintf (next, size, "qh/%p dev%d %cs ep%d %08x %08x",
244+ qh, scratch & 0x007f,
245+ speed_char (scratch),
246+ (scratch >> 8) & 0x000f,
247+ scratch, cpu_to_le32p (&qh->hw_info2));
248+ size -= temp;
249+ next += temp;
250+
251+ list_for_each (entry, &qh->qtd_list) {
252+ td = list_entry (entry, struct ehci_qtd,
253+ qtd_list);
254+ scratch = cpu_to_le32p (&td->hw_token);
255+ temp = snprintf (next, size,
256+ "\n\ttd/%p %s len=%d %08x urb %p",
257+ td, ({ char *tmp;
258+ switch ((scratch>>8)&0x03) {
259+ case 0: tmp = "out"; break;
260+ case 1: tmp = "in"; break;
261+ case 2: tmp = "setup"; break;
262+ default: tmp = "?"; break;
263+ } tmp;}),
264+ (scratch >> 16) & 0x7fff,
265+ scratch,
266+ td->urb);
267+ size -= temp;
268+ next += temp;
269+ }
270+
271+ temp = snprintf (next, size, "\n");
272+ *sizep = size - temp;
273+ *nextp = next + temp;
274+}
275+
276+static ssize_t
277+show_async (struct device *dev, char *buf, size_t count, loff_t off)
278+{
279+ struct pci_dev *pdev;
280+ struct ehci_hcd *ehci;
281+ unsigned long flags;
282+ unsigned temp, size;
283+ char *next;
284+ struct ehci_qh *qh;
285+
286+ if (off != 0)
287+ return 0;
288+
289+ pdev = container_of (dev, struct pci_dev, dev);
290+ ehci = container_of (pci_get_drvdata (pdev), struct ehci_hcd, hcd);
291+ next = buf;
292+ size = count;
293+
294+ /* dumps a snapshot of the async schedule.
295+ * usually empty except for long-term bulk reads, or head.
296+ * one QH per line, and TDs we know about
297+ */
298+ spin_lock_irqsave (&ehci->lock, flags);
299+ if (ehci->async) {
300+ qh = ehci->async;
301+ do {
302+ qh_lines (qh, &next, &size);
303+ } while ((qh = qh->qh_next.qh) != ehci->async);
304+ }
305+ if (ehci->reclaim) {
306+ temp = snprintf (next, size, "\nreclaim =\n");
307+ size -= temp;
308+ next += temp;
309+
310+ qh_lines (ehci->reclaim, &next, &size);
311+ }
312+ spin_unlock_irqrestore (&ehci->lock, flags);
313+
314+ return count - size;
315+}
316+static DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
317+
318+#define DBG_SCHED_LIMIT 64
319+
320+static ssize_t
321+show_periodic (struct device *dev, char *buf, size_t count, loff_t off)
322+{
323+ struct pci_dev *pdev;
324+ struct ehci_hcd *ehci;
325+ unsigned long flags;
326+ union ehci_shadow p, *seen;
327+ unsigned temp, size, seen_count;
328+ char *next;
329+ unsigned i, tag;
330+
331+ if (off != 0)
332+ return 0;
333+ if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC)))
334+ return 0;
335+ seen_count = 0;
336+
337+ pdev = container_of (dev, struct pci_dev, dev);
338+ ehci = container_of (pci_get_drvdata (pdev), struct ehci_hcd, hcd);
339+ next = buf;
340+ size = count;
341+
342+ temp = snprintf (next, size, "size = %d\n", ehci->periodic_size);
343+ size -= temp;
344+ next += temp;
345+
346+ /* dump a snapshot of the periodic schedule.
347+ * iso changes, interrupt usually doesn't.
348+ */
349+ spin_lock_irqsave (&ehci->lock, flags);
350+ for (i = 0; i < ehci->periodic_size; i++) {
351+ p = ehci->pshadow [i];
352+ if (!p.ptr)
353+ continue;
354+ tag = Q_NEXT_TYPE (ehci->periodic [i]);
355+
356+ temp = snprintf (next, size, "%4d: ", i);
357+ size -= temp;
358+ next += temp;
359+
360+ do {
361+ switch (tag) {
362+ case Q_TYPE_QH:
363+ temp = snprintf (next, size, " qh%d/%p",
364+ p.qh->period, p.qh);
365+ size -= temp;
366+ next += temp;
367+ for (temp = 0; temp < seen_count; temp++) {
368+ if (seen [temp].ptr == p.ptr)
369+ break;
370+ }
371+ /* show more info the first time around */
372+ if (temp == seen_count) {
373+ u32 scratch = cpu_to_le32p (
374+ &p.qh->hw_info1);
375+
376+ temp = snprintf (next, size,
377+ " (%cs dev%d ep%d [%d/%d] %d)",
378+ speed_char (scratch),
379+ scratch & 0x007f,
380+ (scratch >> 8) & 0x000f,
381+ p.qh->usecs, p.qh->c_usecs,
382+ scratch >> 16);
383+
384+ /* FIXME TD info too */
385+
386+ if (seen_count < DBG_SCHED_LIMIT)
387+ seen [seen_count++].qh = p.qh;
388+ } else
389+ temp = 0;
390+ tag = Q_NEXT_TYPE (p.qh->hw_next);
391+ p = p.qh->qh_next;
392+ break;
393+ case Q_TYPE_FSTN:
394+ temp = snprintf (next, size,
395+ " fstn-%8x/%p", p.fstn->hw_prev,
396+ p.fstn);
397+ tag = Q_NEXT_TYPE (p.fstn->hw_next);
398+ p = p.fstn->fstn_next;
399+ break;
400+ case Q_TYPE_ITD:
401+ temp = snprintf (next, size,
402+ " itd/%p", p.itd);
403+ tag = Q_NEXT_TYPE (p.itd->hw_next);
404+ p = p.itd->itd_next;
405+ break;
406+ case Q_TYPE_SITD:
407+ temp = snprintf (next, size,
408+ " sitd/%p", p.sitd);
409+ tag = Q_NEXT_TYPE (p.sitd->hw_next);
410+ p = p.sitd->sitd_next;
411+ break;
412+ }
413+ size -= temp;
414+ next += temp;
415+ } while (p.ptr);
416+
417+ temp = snprintf (next, size, "\n");
418+ size -= temp;
419+ next += temp;
420+ }
421+ spin_unlock_irqrestore (&ehci->lock, flags);
422+ kfree (seen);
423+
424+ return count - size;
425+}
426+static DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
427+
428+#undef DBG_SCHED_LIMIT
429+
430+static ssize_t
431+show_registers (struct device *dev, char *buf, size_t count, loff_t off)
432+{
433+ struct pci_dev *pdev;
434+ struct ehci_hcd *ehci;
435+ unsigned long flags;
436+ unsigned temp, size, i;
437+ char *next, scratch [80];
438+ static char fmt [] = "%*s\n";
439+ static char label [] = "";
440+
441+ if (off != 0)
442+ return 0;
443+
444+ pdev = container_of (dev, struct pci_dev, dev);
445+ ehci = container_of (pci_get_drvdata (pdev), struct ehci_hcd, hcd);
446+
447+ next = buf;
448+ size = count;
449+
450+ spin_lock_irqsave (&ehci->lock, flags);
451+
452+ /* Capability Registers */
453+ i = readw (&ehci->caps->hci_version);
454+ temp = snprintf (next, size, "EHCI %x.%02x, hcd state %d\n",
455+ i >> 8, i & 0x0ff, ehci->hcd.state);
456+ size -= temp;
457+ next += temp;
458+
459+ // FIXME interpret both types of params
460+ i = readl (&ehci->caps->hcs_params);
461+ temp = snprintf (next, size, "structural params 0x%08x\n", i);
462+ size -= temp;
463+ next += temp;
464+
465+ i = readl (&ehci->caps->hcc_params);
466+ temp = snprintf (next, size, "capability params 0x%08x\n", i);
467+ size -= temp;
468+ next += temp;
469+
470+ /* Operational Registers */
471+ temp = dbg_status_buf (scratch, sizeof scratch, label,
472+ readl (&ehci->regs->status));
473+ temp = snprintf (next, size, fmt, temp, scratch);
474+ size -= temp;
475+ next += temp;
476+
477+ temp = dbg_command_buf (scratch, sizeof scratch, label,
478+ readl (&ehci->regs->command));
479+ temp = snprintf (next, size, fmt, temp, scratch);
480+ size -= temp;
481+ next += temp;
482+
483+ temp = dbg_intr_buf (scratch, sizeof scratch, label,
484+ readl (&ehci->regs->intr_enable));
485+ temp = snprintf (next, size, fmt, temp, scratch);
486+ size -= temp;
487+ next += temp;
488+
489+ temp = snprintf (next, size, "uframe %04x\n",
490+ readl (&ehci->regs->frame_index));
491+ size -= temp;
492+ next += temp;
493+
494+ for (i = 0; i < HCS_N_PORTS (ehci->hcs_params); i++) {
495+ temp = dbg_port_buf (scratch, sizeof scratch, label, i,
496+ readl (&ehci->regs->port_status [i]));
497+ temp = snprintf (next, size, fmt, temp, scratch);
498+ size -= temp;
499+ next += temp;
500+ }
501+
502+ if (ehci->reclaim) {
503+ temp = snprintf (next, size, "reclaim qh %p%s\n",
504+ ehci->reclaim,
505+ ehci->reclaim_ready ? " ready" : "");
506+ size -= temp;
507+ next += temp;
508+ }
509+
510+#ifdef EHCI_STATS
511+ temp = snprintf (next, size, "irq normal %ld err %ld reclaim %ld\n",
512+ ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim);
513+ size -= temp;
514+ next += temp;
515+
516+ temp = snprintf (next, size, "complete %ld unlink %ld qpatch %ld\n",
517+ ehci->stats.complete, ehci->stats.unlink, ehci->stats.qpatch);
518+ size -= temp;
519+ next += temp;
520+#endif
521+
522+ spin_unlock_irqrestore (&ehci->lock, flags);
523+
524+ return count - size;
525+}
526+static DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
527+
528+static inline void create_debug_files (struct ehci_hcd *bus)
529+{
530+ device_create_file (&bus->hcd.pdev->dev, &dev_attr_async);
531+ device_create_file (&bus->hcd.pdev->dev, &dev_attr_periodic);
532+ device_create_file (&bus->hcd.pdev->dev, &dev_attr_registers);
533+}
534+
535+static inline void remove_debug_files (struct ehci_hcd *bus)
536+{
537+ device_remove_file (&bus->hcd.pdev->dev, &dev_attr_async);
538+ device_remove_file (&bus->hcd.pdev->dev, &dev_attr_periodic);
539+ device_remove_file (&bus->hcd.pdev->dev, &dev_attr_registers);
540+}
541
542-#define dbg_status(ehci, label, status) \
543- dbg ("%s status 0x%x%s%s%s%s%s%s%s%s%s%s", \
544- label, status, \
545- (status & STS_ASS) ? " Async" : "", \
546- (status & STS_PSS) ? " Periodic" : "", \
547- (status & STS_RECL) ? " Recl" : "", \
548- (status & STS_HALT) ? " Halt" : "", \
549- (status & STS_IAA) ? " IAA" : "", \
550- (status & STS_FATAL) ? " FATAL" : "", \
551- (status & STS_FLR) ? " FLR" : "", \
552- (status & STS_PCD) ? " PCD" : "", \
553- (status & STS_ERR) ? " ERR" : "", \
554- (status & STS_INT) ? " INT" : "" \
555- )
556-
557-#define dbg_cmd(ehci, label, command) \
558- dbg ("%s %x cmd %s=%d ithresh=%d%s%s%s%s period=%s%s %s", \
559- label, command, \
560- (command & CMD_PARK) ? "park" : "(park)", \
561- CMD_PARK_CNT (command), \
562- (command >> 16) & 0x3f, \
563- (command & CMD_LRESET) ? " LReset" : "", \
564- (command & CMD_IAAD) ? " IAAD" : "", \
565- (command & CMD_ASE) ? " Async" : "", \
566- (command & CMD_PSE) ? " Periodic" : "", \
567- fls_strings [(command >> 2) & 0x3], \
568- (command & CMD_RESET) ? " Reset" : "", \
569- (command & CMD_RUN) ? "RUN" : "HALT" \
570- )
571-
572-#define dbg_port(hcd, label, port, status) \
573- dbg ("%s port %d status 0x%x%s%s speed=%d%s%s%s%s%s%s%s%s%s", \
574- label, port, status, \
575- (status & PORT_OWNER) ? " OWNER" : "", \
576- (status & PORT_POWER) ? " POWER" : "", \
577- (status >> 10) & 3, \
578- (status & PORT_RESET) ? " RESET" : "", \
579- (status & PORT_SUSPEND) ? " SUSPEND" : "", \
580- (status & PORT_RESUME) ? " RESUME" : "", \
581- (status & PORT_OCC) ? " OCC" : "", \
582- (status & PORT_OC) ? " OC" : "", \
583- (status & PORT_PEC) ? " PEC" : "", \
584- (status & PORT_PE) ? " PE" : "", \
585- (status & PORT_CSC) ? " CSC" : "", \
586- (status & PORT_CONNECT) ? " CONNECT" : "" \
587- )
588+#endif /* STUB_DEBUG_FILES */
589
590diff -Nru a/drivers/usb/hcd/ehci-hcd.c b/drivers/usb/hcd/ehci-hcd.c
591--- a/drivers/usb/hcd/ehci-hcd.c Mon Oct 21 22:14:31 2002
592+++ b/drivers/usb/hcd/ehci-hcd.c Mon Oct 21 22:14:31 2002
593@@ -38,7 +38,13 @@
594 #endif
595
596 #include <linux/usb.h>
597+
598+#include <linux/version.h>
599+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,32)
600 #include "../hcd.h"
601+#else
602+#include "../core/hcd.h"
603+#endif
604
605 #include <asm/byteorder.h>
606 #include <asm/io.h>
607@@ -46,8 +52,6 @@
608 #include <asm/system.h>
609 #include <asm/unaligned.h>
610
611-//#undef KERN_DEBUG
612-//#define KERN_DEBUG ""
613
614 /*-------------------------------------------------------------------------*/
615
616@@ -55,21 +59,24 @@
617 * EHCI hc_driver implementation ... experimental, incomplete.
618 * Based on the final 1.0 register interface specification.
619 *
620- * There are lots of things to help out with here ... notably
621- * everything "periodic", and of course testing with all sorts
622- * of usb 2.0 devices and configurations.
623- *
624 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
625 * First was PCMCIA, like ISA; then CardBus, which is PCI.
626 * Next comes "CardBay", using USB 2.0 signals.
627 *
628- * Contains additional contributions by:
629- * Brad Hards
630- * Rory Bolt
631- * ...
632+ * Contains additional contributions by: Brad Hards, Rory Bolt, and more.
633+ * Special thanks to Intel and VIA for providing host controllers to
634+ * test this driver on, and Cypress (including In-System Design) for
635+ * providing early devices for those host controllers to talk to!
636 *
637 * HISTORY:
638 *
639+ * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
640+ * only scheduling is different, no arbitrary limitations.
641+ * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
642+ * clean up HC run state handshaking.
643+ * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
644+ * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
645+ * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
646 * 2002-05-07 Some error path cleanups to report better errors; wmb();
647 * use non-CVS version id; better iso bandwidth claim.
648 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
649@@ -85,14 +92,22 @@
650 * 2001-June Works with usb-storage and NEC EHCI on 2.4
651 */
652
653-#define DRIVER_VERSION "2002-May-07"
654+#define DRIVER_VERSION "2002-Sep-23"
655 #define DRIVER_AUTHOR "David Brownell"
656 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
657
658+static const char hcd_name [] = "ehci-hcd";
659+
660
661 // #define EHCI_VERBOSE_DEBUG
662 // #define have_split_iso
663
664+#ifdef DEBUG
665+#define EHCI_STATS
666+#endif
667+
668+#define INTR_AUTOMAGIC /* to be removed later in 2.5 */
669+
670 /* magic numbers that can affect system performance */
671 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
672 #define EHCI_TUNE_RL_HS 0 /* nak throttle; see 4.9 */
673@@ -100,11 +115,20 @@
674 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
675 #define EHCI_TUNE_MULT_TT 1
676
677+#define EHCI_WATCHDOG_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
678+#define EHCI_ASYNC_JIFFIES (HZ/3) /* async idle timeout */
679+
680 /* Initial IRQ latency: lower than default */
681 static int log2_irq_thresh = 0; // 0 to 6
682 MODULE_PARM (log2_irq_thresh, "i");
683 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
684
685+/* allow irqs at least every N URB completions */
686+static int max_completions = 16;
687+MODULE_PARM (max_completions, "i");
688+MODULE_PARM_DESC (max_completions,
689+ "limit for urb completions called with irqs disenabled");
690+
691 #define INTR_MASK (STS_IAA | STS_FATAL | STS_ERR | STS_INT)
692
693 /*-------------------------------------------------------------------------*/
694@@ -115,42 +139,105 @@
695 /*-------------------------------------------------------------------------*/
696
697 /*
698+ * handshake - spin reading hc until handshake completes or fails
699+ * @ptr: address of hc register to be read
700+ * @mask: bits to look at in result of read
701+ * @done: value of those bits when handshake succeeds
702+ * @usec: timeout in microseconds
703+ *
704+ * Returns negative errno, or zero on success
705+ *
706+ * Success happens when the "mask" bits have the specified value (hardware
707+ * handshake done). There are two failure modes: "usec" have passed (major
708+ * hardware flakeout), or the register reads as all-ones (hardware removed).
709+ *
710+ * That last failure should_only happen in cases like physical cardbus eject
711+ * before driver shutdown. But it also seems to be caused by bugs in cardbus
712+ * bridge shutdown: shutting down the bridge before the devices using it.
713+ */
714+static int handshake (u32 *ptr, u32 mask, u32 done, int usec)
715+{
716+ u32 result;
717+
718+ do {
719+ result = readl (ptr);
720+ if (result == ~(u32)0) /* card removed */
721+ return -ENODEV;
722+ result &= mask;
723+ if (result == done)
724+ return 0;
725+ udelay (1);
726+ usec--;
727+ } while (usec > 0);
728+ return -ETIMEDOUT;
729+}
730+
731+/*
732 * hc states include: unknown, halted, ready, running
733 * transitional states are messy just now
734 * trying to avoid "running" unless urbs are active
735 * a "ready" hc can be finishing prefetched work
736 */
737
738-/* halt a non-running controller */
739-static void ehci_reset (struct ehci_hcd *ehci)
740+/* force HC to halt state from unknown (EHCI spec section 2.3) */
741+static int ehci_halt (struct ehci_hcd *ehci)
742+{
743+ u32 temp = readl (&ehci->regs->status);
744+
745+ if ((temp & STS_HALT) != 0)
746+ return 0;
747+
748+ temp = readl (&ehci->regs->command);
749+ temp &= ~CMD_RUN;
750+ writel (temp, &ehci->regs->command);
751+ return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
752+}
753+
754+/* reset a non-running (STS_HALT == 1) controller */
755+static int ehci_reset (struct ehci_hcd *ehci)
756 {
757 u32 command = readl (&ehci->regs->command);
758
759 command |= CMD_RESET;
760 dbg_cmd (ehci, "reset", command);
761 writel (command, &ehci->regs->command);
762- while (readl (&ehci->regs->command) & CMD_RESET)
763- continue;
764 ehci->hcd.state = USB_STATE_HALT;
765+ return handshake (&ehci->regs->command, CMD_RESET, 0, 250);
766 }
767
768 /* idle the controller (from running) */
769 static void ehci_ready (struct ehci_hcd *ehci)
770 {
771- u32 command;
772+ u32 temp;
773
774 #ifdef DEBUG
775 if (!HCD_IS_RUNNING (ehci->hcd.state))
776 BUG ();
777 #endif
778
779- while (!(readl (&ehci->regs->status) & (STS_ASS | STS_PSS)))
780- udelay (100);
781- command = readl (&ehci->regs->command);
782- command &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
783- writel (command, &ehci->regs->command);
784+ /* wait for any schedule enables/disables to take effect */
785+ temp = 0;
786+ if (ehci->async)
787+ temp = STS_ASS;
788+ if (ehci->next_uframe != -1)
789+ temp |= STS_PSS;
790+ if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
791+ temp, 16 * 125) != 0) {
792+ ehci->hcd.state = USB_STATE_HALT;
793+ return;
794+ }
795+
796+ /* then disable anything that's still active */
797+ temp = readl (&ehci->regs->command);
798+ temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
799+ writel (temp, &ehci->regs->command);
800
801- // hardware can take 16 microframes to turn off ...
802+ /* hardware can take 16 microframes to turn off ... */
803+ if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
804+ 0, 16 * 125) != 0) {
805+ ehci->hcd.state = USB_STATE_HALT;
806+ return;
807+ }
808 ehci->hcd.state = USB_STATE_READY;
809 }
810
811@@ -165,6 +252,52 @@
812
813 static void ehci_tasklet (unsigned long param);
814
815+static void ehci_irq (struct usb_hcd *hcd);
816+
817+static void ehci_watchdog (unsigned long param)
818+{
819+ struct ehci_hcd *ehci = (struct ehci_hcd *) param;
820+ unsigned long flags;
821+
822+ spin_lock_irqsave (&ehci->lock, flags);
823+ /* guard against lost IAA, which wedges everything */
824+ ehci_irq (&ehci->hcd);
825+ /* unlink the last qh after it's idled a while */
826+ if (ehci->async_idle) {
827+ start_unlink_async (ehci, ehci->async);
828+ ehci->async_idle = 0;
829+ }
830+ spin_unlock_irqrestore (&ehci->lock, flags);
831+}
832+
833+/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
834+ * off the controller (maybe it can boot from highspeed USB disks).
835+ */
836+static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
837+{
838+ if (cap & (1 << 16)) {
839+ int msec = 500;
840+
841+ /* request handoff to OS */
842+ cap &= 1 << 24;
843+ pci_write_config_dword (ehci->hcd.pdev, where, cap);
844+
845+ /* and wait a while for it to happen */
846+ do {
847+ wait_ms (10);
848+ msec -= 10;
849+ pci_read_config_dword (ehci->hcd.pdev, where, &cap);
850+ } while ((cap & (1 << 16)) && msec);
851+ if (cap & (1 << 16)) {
852+ info ("BIOS handoff failed (%d, %04x)", where, cap);
853+ return 1;
854+ }
855+ dbg ("BIOS handoff succeeded");
856+ } else
857+ dbg ("BIOS handoff not needed");
858+ return 0;
859+}
860+
861 /* called by khubd or root hub init threads */
862
863 static int ehci_start (struct usb_hcd *hcd)
864@@ -172,14 +305,11 @@
865 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
866 u32 temp;
867 struct usb_device *udev;
868+ struct usb_bus *bus;
869 int retval;
870 u32 hcc_params;
871 u8 tempbyte;
872
873- // FIXME: given EHCI 0.96 or later, and a controller with
874- // the USBLEGSUP/USBLEGCTLSTS extended capability, make sure
875- // the BIOS doesn't still own this controller.
876-
877 spin_lock_init (&ehci->lock);
878
879 ehci->caps = (struct ehci_caps *) hcd->regs;
880@@ -187,9 +317,37 @@
881 dbg_hcs_params (ehci, "ehci_start");
882 dbg_hcc_params (ehci, "ehci_start");
883
884+ hcc_params = readl (&ehci->caps->hcc_params);
885+
886+ /* EHCI 0.96 and later may have "extended capabilities" */
887+ temp = HCC_EXT_CAPS (hcc_params);
888+ while (temp) {
889+ u32 cap;
890+
891+ pci_read_config_dword (ehci->hcd.pdev, temp, &cap);
892+ dbg ("capability %04x at %02x", cap, temp);
893+ switch (cap & 0xff) {
894+ case 1: /* BIOS/SMM/... handoff */
895+ if (bios_handoff (ehci, temp, cap) != 0)
896+ return -EOPNOTSUPP;
897+ break;
898+ case 0: /* illegal reserved capability */
899+ warn ("illegal capability!");
900+ cap = 0;
901+ /* FALLTHROUGH */
902+ default: /* unknown */
903+ break;
904+ }
905+ temp = (cap >> 8) & 0xff;
906+ }
907+
908 /* cache this readonly data; minimize PCI reads */
909 ehci->hcs_params = readl (&ehci->caps->hcs_params);
910
911+ /* force HC to halt state */
912+ if ((retval = ehci_halt (ehci)) != 0)
913+ return retval;
914+
915 /*
916 * hw default: 1K periodic list heads, one per frame.
917 * periodic_size can shrink by USBCMD update if hcc_params allows.
918@@ -197,7 +355,6 @@
919 ehci->periodic_size = DEFAULT_I_TDPS;
920 if ((retval = ehci_mem_init (ehci, SLAB_KERNEL)) < 0)
921 return retval;
922- hcc_params = readl (&ehci->caps->hcc_params);
923
924 /* controllers may cache some of the periodic schedule ... */
925 if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
926@@ -212,8 +369,10 @@
927 /* controller state: unknown --> reset */
928
929 /* EHCI spec section 4.1 */
930- // FIXME require STS_HALT before reset...
931- ehci_reset (ehci);
932+ if ((retval = ehci_reset (ehci)) != 0) {
933+ ehci_mem_cleanup (ehci);
934+ return retval;
935+ }
936 writel (INTR_MASK, &ehci->regs->intr_enable);
937 writel (ehci->periodic_dma, &ehci->regs->frame_list);
938
939@@ -221,23 +380,25 @@
940 * hcc_params controls whether ehci->regs->segment must (!!!)
941 * be used; it constrains QH/ITD/SITD and QTD locations.
942 * pci_pool consistent memory always uses segment zero.
943+ * streaming mappings for I/O buffers, like pci_map_single(),
944+ * can return segments above 4GB, if the device allows.
945+ *
946+ * NOTE: layered drivers can't yet tell when we enable that,
947+ * so they can't pass this info along (like NETIF_F_HIGHDMA)
948+ * (or like Scsi_Host.highmem_io) ... usb_bus.flags?
949 */
950 if (HCC_64BIT_ADDR (hcc_params)) {
951 writel (0, &ehci->regs->segment);
952- /*
953- * FIXME Enlarge pci_set_dma_mask() when possible. The DMA
954- * mapping API spec now says that'll affect only single shot
955- * mappings, and the pci_pool data will stay safe in seg 0.
956- * That's what we want: no extra copies for USB transfers.
957- */
958- info ("restricting 64bit DMA mappings to segment 0 ...");
959+ if (!pci_set_dma_mask (ehci->hcd.pdev, 0xffffffffffffffffULL))
960+ info ("enabled 64bit PCI DMA (DAC)");
961 }
962
963 /* clear interrupt enables, set irq latency */
964 temp = readl (&ehci->regs->command) & 0xff;
965 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
966- log2_irq_thresh = 0;
967+ log2_irq_thresh = 0;
968 temp |= 1 << (16 + log2_irq_thresh);
969+ // if hc can park (ehci >= 0.96), default is 3 packets per async QH
970 // keeping default periodic framelist size
971 temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE),
972 // Philips, Intel, and maybe others need CMD_RUN before the
973@@ -251,8 +412,13 @@
974 ehci->tasklet.func = ehci_tasklet;
975 ehci->tasklet.data = (unsigned long) ehci;
976
977+ init_timer (&ehci->watchdog);
978+ ehci->watchdog.function = ehci_watchdog;
979+ ehci->watchdog.data = (unsigned long) ehci;
980+
981 /* wire up the root hub */
982- hcd->bus->root_hub = udev = usb_alloc_dev (NULL, hcd->bus);
983+ bus = hcd_to_bus (hcd);
984+ bus->root_hub = udev = usb_alloc_dev (NULL, bus);
985 if (!udev) {
986 done2:
987 ehci_mem_cleanup (ehci);
988@@ -271,11 +437,10 @@
989 /* PCI Serial Bus Release Number is at 0x60 offset */
990 pci_read_config_byte (hcd->pdev, 0x60, &tempbyte);
991 temp = readw (&ehci->caps->hci_version);
992- info ("USB %x.%x support enabled, EHCI rev %x.%2x",
993- ((tempbyte & 0xf0)>>4),
994- (tempbyte & 0x0f),
995- temp >> 8,
996- temp & 0xff);
997+ info ("USB %x.%x support enabled, EHCI rev %x.%02x, %s %s",
998+ ((tempbyte & 0xf0)>>4), (tempbyte & 0x0f),
999+ temp >> 8, temp & 0xff,
1000+ hcd_name, DRIVER_VERSION);
1001
1002 /*
1003 * From here on, khubd concurrently accesses the root
1004@@ -286,19 +451,18 @@
1005 */
1006 usb_connect (udev);
1007 udev->speed = USB_SPEED_HIGH;
1008- if (usb_new_device (udev) != 0) {
1009+ if (hcd_register_root (hcd) != 0) {
1010 if (hcd->state == USB_STATE_RUNNING)
1011 ehci_ready (ehci);
1012- while (readl (&ehci->regs->status) & (STS_ASS | STS_PSS))
1013- udelay (100);
1014 ehci_reset (ehci);
1015- // usb_disconnect (udev);
1016- hcd->bus->root_hub = 0;
1017+ bus->root_hub = 0;
1018 usb_free_dev (udev);
1019 retval = -ENODEV;
1020 goto done2;
1021 }
1022
1023+ create_debug_files (ehci);
1024+
1025 return 0;
1026 }
1027
1028@@ -308,20 +472,34 @@
1029 {
1030 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1031
1032- dbg ("%s: stop", hcd->bus_name);
1033+ dbg ("%s: stop", hcd_to_bus (hcd)->bus_name);
1034
1035+ /* no more interrupts ... */
1036 if (hcd->state == USB_STATE_RUNNING)
1037 ehci_ready (ehci);
1038- while (readl (&ehci->regs->status) & (STS_ASS | STS_PSS))
1039- udelay (100);
1040+ if (in_interrupt ()) /* should not happen!! */
1041+ err ("stopped %s!", RUN_CONTEXT);
1042+ else
1043+ del_timer_sync (&ehci->watchdog);
1044 ehci_reset (ehci);
1045
1046- // root hub is shut down separately (first, when possible)
1047- scan_async (ehci);
1048- if (ehci->next_uframe != -1)
1049- scan_periodic (ehci);
1050+ /* let companion controllers work when we aren't */
1051+ writel (0, &ehci->regs->configured_flag);
1052+
1053+ remove_debug_files (ehci);
1054+
1055+ /* root hub is shut down separately (first, when possible) */
1056+ tasklet_disable (&ehci->tasklet);
1057+ ehci_tasklet ((unsigned long) ehci);
1058 ehci_mem_cleanup (ehci);
1059
1060+#ifdef EHCI_STATS
1061+ dbg ("irq normal %ld err %ld reclaim %ld",
1062+ ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim);
1063+ dbg ("complete %ld unlink %ld qpatch %ld",
1064+ ehci->stats.complete, ehci->stats.unlink, ehci->stats.qpatch);
1065+#endif
1066+
1067 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
1068 }
1069
1070@@ -343,7 +521,7 @@
1071 int ports;
1072 int i;
1073
1074- dbg ("%s: suspend to %d", hcd->bus_name, state);
1075+ dbg ("%s: suspend to %d", hcd_to_bus (hcd)->bus_name, state);
1076
1077 ports = HCS_N_PORTS (ehci->hcs_params);
1078
1079@@ -360,15 +538,13 @@
1080 if ((temp & PORT_PE) == 0
1081 || (temp & PORT_OWNER) != 0)
1082 continue;
1083-dbg ("%s: suspend port %d", hcd->bus_name, i);
1084+dbg ("%s: suspend port %d", hcd_to_bus (hcd)->bus_name, i);
1085 temp |= PORT_SUSPEND;
1086 writel (temp, &ehci->regs->port_status [i]);
1087 }
1088
1089 if (hcd->state == USB_STATE_RUNNING)
1090 ehci_ready (ehci);
1091- while (readl (&ehci->regs->status) & (STS_ASS | STS_PSS))
1092- udelay (100);
1093 writel (readl (&ehci->regs->command) & ~CMD_RUN, &ehci->regs->command);
1094
1095 // save pci FLADJ value
1096@@ -384,7 +560,7 @@
1097 int ports;
1098 int i;
1099
1100- dbg ("%s: resume", hcd->bus_name);
1101+ dbg ("%s: resume", hcd_to_bus (hcd)->bus_name);
1102
1103 ports = HCS_N_PORTS (ehci->hcs_params);
1104
1105@@ -404,7 +580,7 @@
1106 if ((temp & PORT_PE) == 0
1107 || (temp & PORT_SUSPEND) != 0)
1108 continue;
1109-dbg ("%s: resume port %d", hcd->bus_name, i);
1110+dbg ("%s: resume port %d", hcd_to_bus (hcd)->bus_name, i);
1111 temp |= PORT_RESUME;
1112 writel (temp, &ehci->regs->port_status [i]);
1113 readl (&ehci->regs->command); /* unblock posted writes */
1114@@ -429,11 +605,15 @@
1115 {
1116 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
1117
1118+ spin_lock_irq (&ehci->lock);
1119+
1120 if (ehci->reclaim_ready)
1121 end_unlink_async (ehci);
1122 scan_async (ehci);
1123 if (ehci->next_uframe != -1)
1124 scan_periodic (ehci);
1125+
1126+ spin_unlock_irq (&ehci->lock);
1127
1128 // FIXME: when nothing is connected to the root hub,
1129 // turn off the RUN bit so the host can C3 "sleep" power
1130@@ -444,6 +624,12 @@
1131 u32 status = readl (&ehci->regs->status);
1132 int bh;
1133
1134+ /* e.g. cardbus physical eject */
1135+ if (status == ~(u32) 0) {
1136+ dbg ("%s: device removed!", hcd_to_bus (hcd)->bus_name);
1137+ goto dead;
1138+ }
1139+
1140 status &= INTR_MASK;
1141 if (!status) /* irq sharing? */
1142 return;
1143@@ -461,21 +647,30 @@
1144 /* INT, ERR, and IAA interrupt rates can be throttled */
1145
1146 /* normal [4.15.1.2] or error [4.15.1.1] completion */
1147- if (likely ((status & (STS_INT|STS_ERR)) != 0))
1148+ if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
1149+ if (likely ((status & STS_ERR) == 0))
1150+ COUNT (ehci->stats.normal);
1151+ else
1152+ COUNT (ehci->stats.error);
1153 bh = 1;
1154+ }
1155
1156 /* complete the unlinking of some qh [4.15.2.3] */
1157 if (status & STS_IAA) {
1158+ COUNT (ehci->stats.reclaim);
1159 ehci->reclaim_ready = 1;
1160 bh = 1;
1161 }
1162
1163 /* PCI errors [4.15.2.4] */
1164 if (unlikely ((status & STS_FATAL) != 0)) {
1165- err ("%s: fatal error, state %x", hcd->bus_name, hcd->state);
1166+ err ("%s: fatal error, state %x",
1167+ hcd_to_bus (hcd)->bus_name, hcd->state);
1168+dead:
1169 ehci_reset (ehci);
1170- // generic layer kills/unlinks all urbs
1171- // then tasklet cleans up the rest
1172+ /* generic layer kills/unlinks all urbs, then
1173+ * uses ehci_stop to clean up the rest
1174+ */
1175 bh = 1;
1176 }
1177
1178@@ -495,7 +690,8 @@
1179 *
1180 * hcd-specific init for hcpriv hasn't been done yet
1181 *
1182- * NOTE: EHCI queues control and bulk requests transparently, like OHCI.
1183+ * NOTE: control, bulk, and interrupt share the same code to append TDs
1184+ * to a (possibly active) QH, and the same QH scanning code.
1185 */
1186 static int ehci_urb_enqueue (
1187 struct usb_hcd *hcd,
1188@@ -507,10 +703,11 @@
1189
1190 urb->transfer_flags &= ~EHCI_STATE_UNLINK;
1191 INIT_LIST_HEAD (&qtd_list);
1192- switch (usb_pipetype (urb->pipe)) {
1193
1194- case PIPE_CONTROL:
1195- case PIPE_BULK:
1196+ switch (usb_pipetype (urb->pipe)) {
1197+ // case PIPE_CONTROL:
1198+ // case PIPE_BULK:
1199+ default:
1200 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
1201 return -ENOMEM;
1202 return submit_async (ehci, urb, &qtd_list, mem_flags);
1203@@ -530,9 +727,6 @@
1204 dbg ("no split iso support yet");
1205 return -ENOSYS;
1206 #endif /* have_split_iso */
1207-
1208- default: /* can't happen */
1209- return -ENOSYS;
1210 }
1211 }
1212
1213@@ -546,15 +740,22 @@
1214 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
1215 unsigned long flags;
1216
1217- dbg ("%s urb_dequeue %p qh state %d",
1218- hcd->bus_name, urb, qh->qh_state);
1219+ dbg ("%s urb_dequeue %p qh %p state %d",
1220+ hcd_to_bus (hcd)->bus_name, urb, qh, qh->qh_state);
1221
1222 switch (usb_pipetype (urb->pipe)) {
1223- case PIPE_CONTROL:
1224- case PIPE_BULK:
1225+ // case PIPE_CONTROL:
1226+ // case PIPE_BULK:
1227+ default:
1228 spin_lock_irqsave (&ehci->lock, flags);
1229 if (ehci->reclaim) {
1230-dbg ("dq: reclaim busy, %s", RUN_CONTEXT);
1231+ dbg ("dq %p: reclaim = %p, %s",
1232+ qh, ehci->reclaim, RUN_CONTEXT);
1233+ if (qh == ehci->reclaim) {
1234+ /* unlinking qh for another queued urb? */
1235+ spin_unlock_irqrestore (&ehci->lock, flags);
1236+ return 0;
1237+ }
1238 if (in_interrupt ()) {
1239 spin_unlock_irqrestore (&ehci->lock, flags);
1240 return -EAGAIN;
1241@@ -564,25 +765,43 @@
1242 && ehci->hcd.state != USB_STATE_HALT
1243 ) {
1244 spin_unlock_irqrestore (&ehci->lock, flags);
1245-// yeech ... this could spin for up to two frames!
1246-dbg ("wait for dequeue: state %d, reclaim %p, hcd state %d",
1247- qh->qh_state, ehci->reclaim, ehci->hcd.state
1248-);
1249- udelay (100);
1250+ /* let pending unlinks complete */
1251+ wait_ms (1);
1252 spin_lock_irqsave (&ehci->lock, flags);
1253 }
1254 }
1255 if (qh->qh_state == QH_STATE_LINKED)
1256 start_unlink_async (ehci, qh);
1257 spin_unlock_irqrestore (&ehci->lock, flags);
1258- return 0;
1259+ break;
1260
1261 case PIPE_INTERRUPT:
1262- intr_deschedule (ehci, urb->start_frame, qh, urb->interval);
1263- if (ehci->hcd.state == USB_STATE_HALT)
1264- urb->status = -ESHUTDOWN;
1265- qh_completions (ehci, qh, 1);
1266- return 0;
1267+ spin_lock_irqsave (&ehci->lock, flags);
1268+ if (qh->qh_state == QH_STATE_LINKED) {
1269+ /* messy, can spin or block a microframe ... */
1270+ intr_deschedule (ehci, qh, 1);
1271+ /* qh_state == IDLE */
1272+ }
1273+ qh_completions (ehci, qh);
1274+
1275+ /* reschedule QH iff another request is queued */
1276+ if (!list_empty (&qh->qtd_list)
1277+ && HCD_IS_RUNNING (ehci->hcd.state)) {
1278+ int status;
1279+
1280+ status = qh_schedule (ehci, qh);
1281+ spin_unlock_irqrestore (&ehci->lock, flags);
1282+
1283+ if (status != 0) {
1284+ // shouldn't happen often, but ...
1285+ // FIXME kill those tds' urbs
1286+ err ("can't reschedule qh %p, err %d",
1287+ qh, status);
1288+ }
1289+ return status;
1290+ }
1291+ spin_unlock_irqrestore (&ehci->lock, flags);
1292+ break;
1293
1294 case PIPE_ISOCHRONOUS:
1295 // itd or sitd ...
1296@@ -593,9 +809,9 @@
1297 // wait till next completion, do it then.
1298 // completion irqs can wait up to 1024 msec,
1299 urb->transfer_flags |= EHCI_STATE_UNLINK;
1300- return 0;
1301+ break;
1302 }
1303- return -EINVAL;
1304+ return 0;
1305 }
1306
1307 /*-------------------------------------------------------------------------*/
1308@@ -609,42 +825,67 @@
1309 int i;
1310 unsigned long flags;
1311
1312+ /* ASSERT: no requests/urbs are still linked (so no TDs) */
1313 /* ASSERT: nobody can be submitting urbs for this any more */
1314
1315- dbg ("%s: free_config devnum %d", hcd->bus_name, udev->devnum);
1316+ dbg ("%s: free_config devnum %d",
1317+ hcd_to_bus (hcd)->bus_name, udev->devnum);
1318
1319 spin_lock_irqsave (&ehci->lock, flags);
1320 for (i = 0; i < 32; i++) {
1321 if (dev->ep [i]) {
1322 struct ehci_qh *qh;
1323+ char *why;
1324
1325 /* dev->ep never has ITDs or SITDs */
1326 qh = (struct ehci_qh *) dev->ep [i];
1327- vdbg ("free_config, ep 0x%02x qh %p", i, qh);
1328- if (!list_empty (&qh->qtd_list)) {
1329- dbg ("ep 0x%02x qh %p not empty!", i, qh);
1330+
1331+ /* detect/report non-recoverable errors */
1332+ if (in_interrupt ())
1333+ why = "disconnect() didn't";
1334+ else if ((qh->hw_info2 & cpu_to_le32 (0xffff)) != 0
1335+ && qh->qh_state != QH_STATE_IDLE)
1336+ why = "(active periodic)";
1337+ else
1338+ why = 0;
1339+ if (why) {
1340+ err ("dev %s-%s ep %d-%s error: %s",
1341+ hcd_to_bus (hcd)->bus_name,
1342+ udev->devpath,
1343+ i & 0xf, (i & 0x10) ? "IN" : "OUT",
1344+ why);
1345 BUG ();
1346 }
1347- dev->ep [i] = 0;
1348
1349- /* wait_ms() won't spin here -- we're a thread */
1350+ dev->ep [i] = 0;
1351+ if (qh->qh_state == QH_STATE_IDLE)
1352+ goto idle;
1353+ dbg ("free_config, async ep 0x%02x qh %p", i, qh);
1354+
1355+ /* scan_async() empties the ring as it does its work,
1356+ * using IAA, but doesn't (yet?) turn it off. if it
1357+ * doesn't empty this qh, likely it's the last entry.
1358+ */
1359 while (qh->qh_state == QH_STATE_LINKED
1360 && ehci->reclaim
1361 && ehci->hcd.state != USB_STATE_HALT
1362 ) {
1363 spin_unlock_irqrestore (&ehci->lock, flags);
1364+ /* wait_ms() won't spin, we're a thread;
1365+ * and we know IRQ+tasklet can progress
1366+ */
1367 wait_ms (1);
1368 spin_lock_irqsave (&ehci->lock, flags);
1369 }
1370- if (qh->qh_state == QH_STATE_LINKED) {
1371+ if (qh->qh_state == QH_STATE_LINKED)
1372 start_unlink_async (ehci, qh);
1373- while (qh->qh_state != QH_STATE_IDLE) {
1374- spin_unlock_irqrestore (&ehci->lock,
1375- flags);
1376- wait_ms (1);
1377- spin_lock_irqsave (&ehci->lock, flags);
1378- }
1379+ while (qh->qh_state != QH_STATE_IDLE
1380+ && ehci->hcd.state != USB_STATE_HALT) {
1381+ spin_unlock_irqrestore (&ehci->lock, flags);
1382+ wait_ms (1);
1383+ spin_lock_irqsave (&ehci->lock, flags);
1384 }
1385+idle:
1386 qh_put (ehci, qh);
1387 }
1388 }
1389@@ -654,50 +895,48 @@
1390
1391 /*-------------------------------------------------------------------------*/
1392
1393-static const char hcd_name [] = "ehci-hcd";
1394-
1395 static const struct hc_driver ehci_driver = {
1396- description: hcd_name,
1397+ .description = hcd_name,
1398
1399 /*
1400 * generic hardware linkage
1401 */
1402- irq: ehci_irq,
1403- flags: HCD_MEMORY | HCD_USB2,
1404+ .irq = ehci_irq,
1405+ .flags = HCD_MEMORY | HCD_USB2,
1406
1407 /*
1408 * basic lifecycle operations
1409 */
1410- start: ehci_start,
1411+ .start = ehci_start,
1412 #ifdef CONFIG_PM
1413- suspend: ehci_suspend,
1414- resume: ehci_resume,
1415+ .suspend = ehci_suspend,
1416+ .resume = ehci_resume,
1417 #endif
1418- stop: ehci_stop,
1419+ .stop = ehci_stop,
1420
1421 /*
1422 * memory lifecycle (except per-request)
1423 */
1424- hcd_alloc: ehci_hcd_alloc,
1425- hcd_free: ehci_hcd_free,
1426+ .hcd_alloc = ehci_hcd_alloc,
1427+ .hcd_free = ehci_hcd_free,
1428
1429 /*
1430 * managing i/o requests and associated device resources
1431 */
1432- urb_enqueue: ehci_urb_enqueue,
1433- urb_dequeue: ehci_urb_dequeue,
1434- free_config: ehci_free_config,
1435+ .urb_enqueue = ehci_urb_enqueue,
1436+ .urb_dequeue = ehci_urb_dequeue,
1437+ .free_config = ehci_free_config,
1438
1439 /*
1440 * scheduling support
1441 */
1442- get_frame_number: ehci_get_frame,
1443+ .get_frame_number = ehci_get_frame,
1444
1445 /*
1446 * root hub support
1447 */
1448- hub_status_data: ehci_hub_status_data,
1449- hub_control: ehci_hub_control,
1450+ .hub_status_data = ehci_hub_status_data,
1451+ .hub_control = ehci_hub_control,
1452 };
1453
1454 /*-------------------------------------------------------------------------*/
1455@@ -709,15 +948,15 @@
1456
1457 /* handle any USB 2.0 EHCI controller */
1458
1459- class: ((PCI_CLASS_SERIAL_USB << 8) | 0x20),
1460- class_mask: ~0,
1461- driver_data: (unsigned long) &ehci_driver,
1462+ .class = ((PCI_CLASS_SERIAL_USB << 8) | 0x20),
1463+ .class_mask = ~0,
1464+ .driver_data = (unsigned long) &ehci_driver,
1465
1466 /* no matter who makes it */
1467- vendor: PCI_ANY_ID,
1468- device: PCI_ANY_ID,
1469- subvendor: PCI_ANY_ID,
1470- subdevice: PCI_ANY_ID,
1471+ .vendor = PCI_ANY_ID,
1472+ .device = PCI_ANY_ID,
1473+ .subvendor = PCI_ANY_ID,
1474+ .subdevice = PCI_ANY_ID,
1475
1476 }, { /* end: all zeroes */ }
1477 };
1478@@ -725,21 +964,20 @@
1479
1480 /* pci driver glue; this is a "new style" PCI driver module */
1481 static struct pci_driver ehci_pci_driver = {
1482- name: (char *) hcd_name,
1483- id_table: pci_ids,
1484+ .name = (char *) hcd_name,
1485+ .id_table = pci_ids,
1486
1487- probe: usb_hcd_pci_probe,
1488- remove: usb_hcd_pci_remove,
1489+ .probe = usb_hcd_pci_probe,
1490+ .remove = usb_hcd_pci_remove,
1491
1492 #ifdef CONFIG_PM
1493- suspend: usb_hcd_pci_suspend,
1494- resume: usb_hcd_pci_resume,
1495+ .suspend = usb_hcd_pci_suspend,
1496+ .resume = usb_hcd_pci_resume,
1497 #endif
1498 };
1499
1500 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1501
1502-EXPORT_NO_SYMBOLS;
1503 MODULE_DESCRIPTION (DRIVER_INFO);
1504 MODULE_AUTHOR (DRIVER_AUTHOR);
1505 MODULE_LICENSE ("GPL");
1506diff -Nru a/drivers/usb/hcd/ehci-hub.c b/drivers/usb/hcd/ehci-hub.c
1507--- a/drivers/usb/hcd/ehci-hub.c Mon Oct 21 22:14:31 2002
1508+++ b/drivers/usb/hcd/ehci-hub.c Mon Oct 21 22:14:31 2002
1509@@ -41,14 +41,17 @@
1510 /* if reset finished and it's still not enabled -- handoff */
1511 if (!(port_status & PORT_PE)) {
1512 dbg ("%s port %d full speed, give to companion, 0x%x",
1513- ehci->hcd.bus_name, index + 1, port_status);
1514+ hcd_to_bus (&ehci->hcd)->bus_name,
1515+ index + 1, port_status);
1516
1517 // what happens if HCS_N_CC(params) == 0 ?
1518 port_status |= PORT_OWNER;
1519 writel (port_status, &ehci->regs->port_status [index]);
1520
1521 } else
1522- dbg ("%s port %d high speed", ehci->hcd.bus_name, index + 1);
1523+ dbg ("%s port %d high speed",
1524+ hcd_to_bus (&ehci->hcd)->bus_name,
1525+ index + 1);
1526
1527 return port_status;
1528 }
1529@@ -236,7 +239,8 @@
1530
1531 /* whoever resets must GetPortStatus to complete it!! */
1532 if ((temp & PORT_RESET)
1533- && jiffies > ehci->reset_done [wIndex]) {
1534+ && time_after (jiffies,
1535+ ehci->reset_done [wIndex])) {
1536 status |= 1 << USB_PORT_FEAT_C_RESET;
1537
1538 /* force reset to complete */
1539@@ -310,11 +314,13 @@
1540 if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
1541 && PORT_USB11 (temp)) {
1542 dbg ("%s port %d low speed, give to companion",
1543- hcd->bus_name, wIndex + 1);
1544+ hcd_to_bus (&ehci->hcd)->bus_name,
1545+ wIndex + 1);
1546 temp |= PORT_OWNER;
1547 } else {
1548 vdbg ("%s port %d reset",
1549- hcd->bus_name, wIndex + 1);
1550+ hcd_to_bus (&ehci->hcd)->bus_name,
1551+ wIndex + 1);
1552 temp |= PORT_RESET;
1553 temp &= ~PORT_PE;
1554
1555diff -Nru a/drivers/usb/hcd/ehci-q.c b/drivers/usb/hcd/ehci-q.c
1556--- a/drivers/usb/hcd/ehci-q.c Mon Oct 21 22:14:31 2002
1557+++ b/drivers/usb/hcd/ehci-q.c Mon Oct 21 22:14:31 2002
1558@@ -26,8 +26,7 @@
1559 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
1560 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
1561 * buffers needed for the larger number). We use one QH per endpoint, queue
1562- * multiple (bulk or control) urbs per endpoint. URBs may need several qtds.
1563- * A scheduled interrupt qh always (for now) has one qtd, one urb.
1564+ * multiple urbs (all three types) per endpoint. URBs may need several qtds.
1565 *
1566 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
1567 * interrupts) needs careful scheduling. Performance improvements can be
1568@@ -47,9 +46,11 @@
1569 qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len, int token)
1570 {
1571 int i, count;
1572+ u64 addr = buf;
1573
1574 /* one buffer entry per 4K ... first might be short or unaligned */
1575- qtd->hw_buf [0] = cpu_to_le32 (buf);
1576+ qtd->hw_buf [0] = cpu_to_le32 ((u32)addr);
1577+ qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32));
1578 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
1579 if (likely (len < count)) /* ... iff needed */
1580 count = len;
1581@@ -59,7 +60,7 @@
1582
1583 /* per-qtd limit: from 16K to 20K (best alignment) */
1584 for (i = 1; count < len && i < 5; i++) {
1585- u64 addr = buf;
1586+ addr = buf;
1587 qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
1588 qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));
1589 buf += 0x1000;
1590@@ -144,97 +145,106 @@
1591 usb_pipeendpoint (pipe),
1592 usb_pipeout (pipe));
1593 if (urb->dev->tt && !usb_pipeint (pipe)) {
1594-err ("must CLEAR_TT_BUFFER, hub port %d%s addr %d ep %d",
1595- urb->dev->ttport, /* devpath */
1596- urb->dev->tt->multi ? "" : " (all-ports TT)",
1597- urb->dev->devnum, usb_pipeendpoint (urb->pipe));
1598- // FIXME something (khubd?) should make the hub
1599- // CLEAR_TT_BUFFER ASAP, it's blocking other
1600- // fs/ls requests... hub_tt_clear_buffer() ?
1601+#ifdef DEBUG
1602+ struct usb_device *tt = urb->dev->tt->hub;
1603+ dbg ("clear tt %s-%s p%d buffer, a%d ep%d",
1604+ tt->bus->bus_name, tt->devpath,
1605+ urb->dev->ttport, urb->dev->devnum,
1606+ usb_pipeendpoint (pipe));
1607+#endif /* DEBUG */
1608+ usb_hub_tt_clear_buffer (urb->dev, pipe);
1609 }
1610 }
1611 }
1612 }
1613
1614-static void ehci_urb_complete (
1615- struct ehci_hcd *ehci,
1616- dma_addr_t addr,
1617- struct urb *urb
1618-) {
1619- if (urb->transfer_buffer_length && usb_pipein (urb->pipe))
1620- pci_dma_sync_single (ehci->hcd.pdev, addr,
1621- urb->transfer_buffer_length,
1622- PCI_DMA_FROMDEVICE);
1623+static void ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb)
1624+{
1625+#ifdef INTR_AUTOMAGIC
1626+ struct urb *resubmit = 0;
1627+ struct usb_device *dev = 0;
1628
1629- /* cleanse status if we saw no error */
1630- if (likely (urb->status == -EINPROGRESS)) {
1631- if (urb->actual_length != urb->transfer_buffer_length
1632- && (urb->transfer_flags & USB_DISABLE_SPD))
1633- urb->status = -EREMOTEIO;
1634- else
1635- urb->status = 0;
1636- }
1637+ static int ehci_urb_enqueue (struct usb_hcd *, struct urb *, int);
1638+#endif
1639
1640- /* only report unlinks once */
1641- if (likely (urb->status != -ENOENT && urb->status != -ENOTCONN))
1642- urb->complete (urb);
1643-}
1644+ if (likely (urb->hcpriv != 0)) {
1645+ struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
1646
1647-/* urb->lock ignored from here on (hcd is done with urb) */
1648+ /* S-mask in a QH means it's an interrupt urb */
1649+ if ((qh->hw_info2 & cpu_to_le32 (0x00ff)) != 0) {
1650
1651-static void ehci_urb_done (
1652- struct ehci_hcd *ehci,
1653- dma_addr_t addr,
1654- struct urb *urb
1655-) {
1656- if (urb->transfer_buffer_length)
1657- pci_unmap_single (ehci->hcd.pdev,
1658- addr,
1659- urb->transfer_buffer_length,
1660- usb_pipein (urb->pipe)
1661- ? PCI_DMA_FROMDEVICE
1662- : PCI_DMA_TODEVICE);
1663- if (likely (urb->hcpriv != 0)) {
1664- qh_put (ehci, (struct ehci_qh *) urb->hcpriv);
1665+ /* ... update hc-wide periodic stats (for usbfs) */
1666+ hcd_to_bus (&ehci->hcd)->bandwidth_int_reqs--;
1667+
1668+#ifdef INTR_AUTOMAGIC
1669+ if (!((urb->status == -ENOENT)
1670+ || (urb->status == -ECONNRESET))) {
1671+ resubmit = usb_get_urb (urb);
1672+ dev = urb->dev;
1673+ }
1674+#endif
1675+ }
1676+ qh_put (ehci, qh);
1677 urb->hcpriv = 0;
1678 }
1679
1680 if (likely (urb->status == -EINPROGRESS)) {
1681 if (urb->actual_length != urb->transfer_buffer_length
1682- && (urb->transfer_flags & USB_DISABLE_SPD))
1683+ && (urb->transfer_flags & URB_SHORT_NOT_OK))
1684 urb->status = -EREMOTEIO;
1685 else
1686 urb->status = 0;
1687 }
1688
1689- /* hand off urb ownership */
1690+ if (likely (urb->status == 0))
1691+ COUNT (ehci->stats.complete);
1692+ else if (urb->status == -ECONNRESET || urb->status == -ENOENT)
1693+ COUNT (ehci->stats.unlink);
1694+ else
1695+ COUNT (ehci->stats.error);
1696+
1697+ /* complete() can reenter this HCD */
1698+ spin_unlock (&ehci->lock);
1699 usb_hcd_giveback_urb (&ehci->hcd, urb);
1700+
1701+#ifdef INTR_AUTOMAGIC
1702+ if (resubmit && ((urb->status == -ENOENT)
1703+ || (urb->status == -ECONNRESET))) {
1704+ usb_put_urb (resubmit);
1705+ resubmit = 0;
1706+ }
1707+ // device drivers will soon be doing something like this
1708+ if (resubmit) {
1709+ int status;
1710+
1711+ resubmit->dev = dev;
1712+ status = SUBMIT_URB (resubmit, SLAB_KERNEL);
1713+ if (status != 0)
1714+ err ("can't resubmit interrupt urb %p: status %d",
1715+ resubmit, status);
1716+ usb_put_urb (resubmit);
1717+ }
1718+#endif
1719+
1720+ spin_lock (&ehci->lock);
1721 }
1722
1723
1724 /*
1725- * Process completed qtds for a qh, issuing completions if needed.
1726- * When freeing: frees qtds, unmaps buf, returns URB to driver.
1727- * When not freeing (queued periodic qh): retain qtds, mapping, and urb.
1728- * Races up to qh->hw_current; returns number of urb completions.
1729+ * Process and free completed qtds for a qh, returning URBs to drivers.
1730+ * Chases up to qh->hw_current. Returns number of completions called,
1731+ * indicating how much "real" work we did.
1732 */
1733-static int
1734-qh_completions (
1735- struct ehci_hcd *ehci,
1736- struct ehci_qh *qh,
1737- int freeing
1738-) {
1739+static unsigned
1740+qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
1741+{
1742 struct ehci_qtd *qtd, *last;
1743 struct list_head *next, *qtd_list = &qh->qtd_list;
1744 int unlink = 0, halted = 0;
1745- unsigned long flags;
1746- int retval = 0;
1747+ unsigned count = 0;
1748
1749- spin_lock_irqsave (&ehci->lock, flags);
1750- if (unlikely (list_empty (qtd_list))) {
1751- spin_unlock_irqrestore (&ehci->lock, flags);
1752- return retval;
1753- }
1754+ if (unlikely (list_empty (qtd_list)))
1755+ return count;
1756
1757 /* scan QTDs till end of list, or we reach an active one */
1758 for (qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list),
1759@@ -248,16 +258,8 @@
1760 /* clean up any state from previous QTD ...*/
1761 if (last) {
1762 if (likely (last->urb != urb)) {
1763- /* complete() can reenter this HCD */
1764- spin_unlock_irqrestore (&ehci->lock, flags);
1765- if (likely (freeing != 0))
1766- ehci_urb_done (ehci, last->buf_dma,
1767- last->urb);
1768- else
1769- ehci_urb_complete (ehci, last->buf_dma,
1770- last->urb);
1771- spin_lock_irqsave (&ehci->lock, flags);
1772- retval++;
1773+ ehci_urb_done (ehci, last->urb);
1774+ count++;
1775 }
1776
1777 /* qh overlays can have HC's old cached copies of
1778@@ -267,10 +269,10 @@
1779 && last->hw_next != qh->hw_qtd_next) {
1780 qh->hw_alt_next = last->hw_alt_next;
1781 qh->hw_qtd_next = last->hw_next;
1782+ COUNT (ehci->stats.qpatch);
1783 }
1784
1785- if (likely (freeing != 0))
1786- ehci_qtd_free (ehci, last);
1787+ ehci_qtd_free (ehci, last);
1788 last = 0;
1789 }
1790 next = qtd->qtd_list.next;
1791@@ -285,9 +287,17 @@
1792 || (ehci->hcd.state == USB_STATE_HALT)
1793 || (qh->qh_state == QH_STATE_IDLE);
1794
1795+ // FIXME Remove the automagic unlink mode.
1796+ // Drivers can now clean up safely; it's their job.
1797+ //
1798+ // FIXME Removing it should fix the short read scenarios
1799+ // with "huge" urb data (more than one 16+KByte td) with
1800+ // the short read someplace other than the last data TD.
1801+ // Except the control case: 'retrigger' status ACKs.
1802+
1803 /* fault: unlink the rest, since this qtd saw an error? */
1804 if (unlikely ((token & QTD_STS_HALT) != 0)) {
1805- freeing = unlink = 1;
1806+ unlink = 1;
1807 /* status copied below */
1808
1809 /* QH halts only because of fault (above) or unlink (here). */
1810@@ -295,13 +305,14 @@
1811
1812 /* unlinking everything because of HC shutdown? */
1813 if (ehci->hcd.state == USB_STATE_HALT) {
1814- freeing = unlink = 1;
1815+ unlink = 1;
1816
1817 /* explicit unlink, maybe starting here? */
1818 } else if (qh->qh_state == QH_STATE_IDLE
1819 && (urb->status == -ECONNRESET
1820+ || urb->status == -ESHUTDOWN
1821 || urb->status == -ENOENT)) {
1822- freeing = unlink = 1;
1823+ unlink = 1;
1824
1825 /* QH halted to unlink urbs _after_ this? */
1826 } else if (!unlink && (token & QTD_STS_ACTIVE) != 0) {
1827@@ -311,7 +322,7 @@
1828
1829 /* unlink the rest? once we start unlinking, after
1830 * a fault or explicit unlink, we unlink all later
1831- * urbs. usb spec requires that.
1832+ * urbs. usb spec requires that for faults...
1833 */
1834 if (unlink && urb->status == -EINPROGRESS)
1835 urb->status = -ECONNRESET;
1836@@ -329,31 +340,7 @@
1837 qtd_copy_status (urb, qtd->length, token);
1838 spin_unlock (&urb->lock);
1839
1840- /*
1841- * NOTE: this won't work right with interrupt urbs that
1842- * need multiple qtds ... only the first scan of qh->qtd_list
1843- * starts at the right qtd, yet multiple scans could happen
1844- * for transfers that are scheduled across multiple uframes.
1845- * (Such schedules are not currently allowed!)
1846- */
1847- if (likely (freeing != 0))
1848- list_del (&qtd->qtd_list);
1849- else {
1850- /* restore everything the HC could change
1851- * from an interrupt QTD
1852- */
1853- qtd->hw_token = (qtd->hw_token
1854- & __constant_cpu_to_le32 (0x8300))
1855- | cpu_to_le32 (qtd->length << 16)
1856- | __constant_cpu_to_le32 (QTD_STS_ACTIVE
1857- | (EHCI_TUNE_CERR << 10));
1858- qtd->hw_buf [0] &= ~__constant_cpu_to_le32 (0x0fff);
1859-
1860- /* this offset, and the length above,
1861- * are likely wrong on QTDs #2..N
1862- */
1863- qtd->hw_buf [0] |= cpu_to_le32 (0x0fff & qtd->buf_dma);
1864- }
1865+ list_del (&qtd->qtd_list);
1866
1867 #if 0
1868 if (urb->status == -EINPROGRESS)
1869@@ -364,31 +351,22 @@
1870 urb, urb->status, qtd, token,
1871 urb->actual_length);
1872 #endif
1873+ }
1874
1875- /* SETUP for control urb? */
1876- if (unlikely (QTD_PID (token) == 2))
1877- pci_unmap_single (ehci->hcd.pdev,
1878- qtd->buf_dma, sizeof (devrequest),
1879- PCI_DMA_TODEVICE);
1880+ /* last urb's completion might still need calling */
1881+ if (likely (last != 0)) {
1882+ ehci_urb_done (ehci, last->urb);
1883+ count++;
1884+ ehci_qtd_free (ehci, last);
1885 }
1886
1887- /* patch up list head? */
1888+ /* reactivate queue after error and driver's cleanup */
1889 if (unlikely (halted && !list_empty (qtd_list))) {
1890 qh_update (qh, list_entry (qtd_list->next,
1891 struct ehci_qtd, qtd_list));
1892 }
1893- spin_unlock_irqrestore (&ehci->lock, flags);
1894
1895- /* last urb's completion might still need calling */
1896- if (likely (last != 0)) {
1897- if (likely (freeing != 0)) {
1898- ehci_urb_done (ehci, last->buf_dma, last->urb);
1899- ehci_qtd_free (ehci, last);
1900- } else
1901- ehci_urb_complete (ehci, last->buf_dma, last->urb);
1902- retval++;
1903- }
1904- return retval;
1905+ return count;
1906 }
1907
1908 /*-------------------------------------------------------------------------*/
1909@@ -403,35 +381,12 @@
1910 struct list_head *qtd_list
1911 ) {
1912 struct list_head *entry, *temp;
1913- int unmapped = 0;
1914
1915 list_for_each_safe (entry, temp, qtd_list) {
1916 struct ehci_qtd *qtd;
1917
1918 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
1919 list_del (&qtd->qtd_list);
1920- if (unmapped != 2) {
1921- int direction;
1922- size_t size;
1923-
1924- /* for ctrl unmap twice: SETUP and DATA;
1925- * else (bulk, intr) just once: DATA
1926- */
1927- if (!unmapped++ && usb_pipecontrol (urb->pipe)) {
1928- direction = PCI_DMA_TODEVICE;
1929- size = sizeof (devrequest);
1930- } else {
1931- direction = usb_pipein (urb->pipe)
1932- ? PCI_DMA_FROMDEVICE
1933- : PCI_DMA_TODEVICE;
1934- size = qtd->urb->transfer_buffer_length;
1935- unmapped++;
1936- }
1937- if (qtd->buf_dma)
1938- pci_unmap_single (ehci->hcd.pdev,
1939- qtd->buf_dma,
1940- size, direction);
1941- }
1942 ehci_qtd_free (ehci, qtd);
1943 }
1944 }
1945@@ -447,8 +402,9 @@
1946 int flags
1947 ) {
1948 struct ehci_qtd *qtd, *qtd_prev;
1949- dma_addr_t buf, map_buf;
1950+ dma_addr_t buf;
1951 int len, maxpacket;
1952+ int is_input, status_patch = 0;
1953 u32 token;
1954
1955 /*
1956@@ -466,17 +422,8 @@
1957 /* for split transactions, SplitXState initialized to zero */
1958
1959 if (usb_pipecontrol (urb->pipe)) {
1960- /* control request data is passed in the "setup" pid */
1961- qtd->buf_dma = pci_map_single (
1962- ehci->hcd.pdev,
1963- urb->setup_packet,
1964- sizeof (devrequest),
1965- PCI_DMA_TODEVICE);
1966- if (unlikely (!qtd->buf_dma))
1967- goto cleanup;
1968-
1969 /* SETUP pid */
1970- qtd_fill (qtd, qtd->buf_dma, sizeof (devrequest),
1971+ qtd_fill (qtd, urb->setup_dma, sizeof (struct usb_ctrlrequest),
1972 token | (2 /* "setup" */ << 8));
1973
1974 /* ... and always at least one more pid */
1975@@ -488,29 +435,26 @@
1976 qtd->urb = urb;
1977 qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
1978 list_add_tail (&qtd->qtd_list, head);
1979+
1980+ if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
1981+ status_patch = 1;
1982 }
1983
1984 /*
1985 * data transfer stage: buffer setup
1986 */
1987 len = urb->transfer_buffer_length;
1988- if (likely (len > 0)) {
1989- buf = map_buf = pci_map_single (ehci->hcd.pdev,
1990- urb->transfer_buffer, len,
1991- usb_pipein (urb->pipe)
1992- ? PCI_DMA_FROMDEVICE
1993- : PCI_DMA_TODEVICE);
1994- if (unlikely (!buf))
1995- goto cleanup;
1996- } else
1997- buf = map_buf = 0;
1998+ is_input = usb_pipein (urb->pipe);
1999+ if (likely (len > 0))
2000+ buf = urb->transfer_dma;
2001+ else
2002+ buf = 0;
2003
2004- if (!buf || usb_pipein (urb->pipe))
2005+ if (!buf || is_input)
2006 token |= (1 /* "in" */ << 8);
2007 /* else it's already initted to "out" pid (0 << 8) */
2008
2009- maxpacket = usb_maxpacket (urb->dev, urb->pipe,
2010- usb_pipeout (urb->pipe));
2011+ maxpacket = usb_maxpacket (urb->dev, urb->pipe, !is_input) & 0x03ff;
2012
2013 /*
2014 * buffer gets wrapped in one or more qtds;
2015@@ -521,7 +465,6 @@
2016 int this_qtd_len;
2017
2018 qtd->urb = urb;
2019- qtd->buf_dma = map_buf;
2020 this_qtd_len = qtd_fill (qtd, buf, len, token);
2021 len -= this_qtd_len;
2022 buf += this_qtd_len;
2023@@ -572,6 +515,19 @@
2024 }
2025 }
2026
2027+ /* if we're permitting a short control read, we want the hardware to
2028+ * just continue after short data and send the status ack. it can do
2029+ * that on the last data packet (typically the only one). for other
2030+ * packets, software fixup is needed (in qh_completions).
2031+ */
2032+ if (status_patch) {
2033+ struct ehci_qtd *prev;
2034+
2035+ prev = list_entry (qtd->qtd_list.prev,
2036+ struct ehci_qtd, qtd_list);
2037+ prev->hw_alt_next = QTD_NEXT (qtd->qtd_dma);
2038+ }
2039+
2040 /* by default, enable interrupt on urb completion */
2041 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
2042 qtd->hw_token |= __constant_cpu_to_le32 (QTD_IOC);
2043@@ -606,6 +562,11 @@
2044 // That'd mean updating how usbcore talks to HCDs. (2.5?)
2045
2046
2047+// high bandwidth multiplier, as encoded in highspeed endpoint descriptors
2048+#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
2049+// ... and packet size, for any kind of endpoint descriptor
2050+#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x03ff)
2051+
2052 /*
2053 * Each QH holds a qtd list; a QH is used for everything except iso.
2054 *
2055@@ -623,6 +584,8 @@
2056 ) {
2057 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
2058 u32 info1 = 0, info2 = 0;
2059+ int is_input, type;
2060+ int maxp = 0;
2061
2062 if (!qh)
2063 return qh;
2064@@ -633,6 +596,53 @@
2065 info1 |= usb_pipeendpoint (urb->pipe) << 8;
2066 info1 |= usb_pipedevice (urb->pipe) << 0;
2067
2068+ is_input = usb_pipein (urb->pipe);
2069+ type = usb_pipetype (urb->pipe);
2070+ maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
2071+
2072+ /* Compute interrupt scheduling parameters just once, and save.
2073+ * - allowing for high bandwidth, how many nsec/uframe are used?
2074+ * - split transactions need a second CSPLIT uframe; same question
2075+ * - splits also need a schedule gap (for full/low speed I/O)
2076+ * - qh has a polling interval
2077+ *
2078+ * For control/bulk requests, the HC or TT handles these.
2079+ */
2080+ if (type == PIPE_INTERRUPT) {
2081+ qh->usecs = usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
2082+ hb_mult (maxp) * max_packet (maxp));
2083+ qh->start = NO_FRAME;
2084+
2085+ if (urb->dev->speed == USB_SPEED_HIGH) {
2086+ qh->c_usecs = 0;
2087+ qh->gap_uf = 0;
2088+
2089+ /* FIXME handle HS periods of less than 1 frame. */
2090+ qh->period = urb->interval >> 3;
2091+ if (qh->period < 1) {
2092+ dbg ("intr period %d uframes, NYET!",
2093+ urb->interval);
2094+ qh = 0;
2095+ goto done;
2096+ }
2097+ } else {
2098+ /* gap is f(FS/LS transfer times) */
2099+ qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
2100+ is_input, 0, maxp) / (125 * 1000);
2101+
2102+ /* FIXME this just approximates SPLIT/CSPLIT times */
2103+ if (is_input) { // SPLIT, gap, CSPLIT+DATA
2104+ qh->c_usecs = qh->usecs + HS_USECS (0);
2105+ qh->usecs = HS_USECS (1);
2106+ } else { // SPLIT+DATA, gap, CSPLIT
2107+ qh->usecs += HS_USECS (1);
2108+ qh->c_usecs = HS_USECS (0);
2109+ }
2110+
2111+ qh->period = urb->interval;
2112+ }
2113+ }
2114+
2115 /* using TT? */
2116 switch (urb->dev->speed) {
2117 case USB_SPEED_LOW:
2118@@ -642,67 +652,62 @@
2119 case USB_SPEED_FULL:
2120 /* EPS 0 means "full" */
2121 info1 |= (EHCI_TUNE_RL_TT << 28);
2122- if (usb_pipecontrol (urb->pipe)) {
2123+ if (type == PIPE_CONTROL) {
2124 info1 |= (1 << 27); /* for TT */
2125 info1 |= 1 << 14; /* toggle from qtd */
2126 }
2127- info1 |= usb_maxpacket (urb->dev, urb->pipe,
2128- usb_pipeout (urb->pipe)) << 16;
2129+ info1 |= maxp << 16;
2130
2131 info2 |= (EHCI_TUNE_MULT_TT << 30);
2132 info2 |= urb->dev->ttport << 23;
2133 info2 |= urb->dev->tt->hub->devnum << 16;
2134
2135- /* NOTE: if (usb_pipeint (urb->pipe)) { scheduler sets c-mask }
2136- * ... and a 0.96 scheduler might use FSTN nodes too
2137- */
2138+ /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
2139+
2140 break;
2141
2142 case USB_SPEED_HIGH: /* no TT involved */
2143 info1 |= (2 << 12); /* EPS "high" */
2144 info1 |= (EHCI_TUNE_RL_HS << 28);
2145- if (usb_pipecontrol (urb->pipe)) {
2146+ if (type == PIPE_CONTROL) {
2147 info1 |= 64 << 16; /* usb2 fixed maxpacket */
2148 info1 |= 1 << 14; /* toggle from qtd */
2149 info2 |= (EHCI_TUNE_MULT_HS << 30);
2150- } else if (usb_pipebulk (urb->pipe)) {
2151+ } else if (type == PIPE_BULK) {
2152 info1 |= 512 << 16; /* usb2 fixed maxpacket */
2153 info2 |= (EHCI_TUNE_MULT_HS << 30);
2154- } else {
2155- u32 temp;
2156- temp = usb_maxpacket (urb->dev, urb->pipe,
2157- usb_pipeout (urb->pipe));
2158- info1 |= (temp & 0x3ff) << 16; /* maxpacket */
2159- /* HS intr can be "high bandwidth" */
2160- temp = 1 + ((temp >> 11) & 0x03);
2161- info2 |= temp << 30; /* mult */
2162+ } else { /* PIPE_INTERRUPT */
2163+ info1 |= max_packet (maxp) << 16;
2164+ info2 |= hb_mult (maxp) << 30;
2165 }
2166 break;
2167 default:
2168-#ifdef DEBUG
2169- BUG ();
2170-#endif
2171+ dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
2172+ return 0;
2173 }
2174
2175- /* NOTE: if (usb_pipeint (urb->pipe)) { scheduler sets s-mask } */
2176+ /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
2177
2178 qh->qh_state = QH_STATE_IDLE;
2179 qh->hw_info1 = cpu_to_le32 (info1);
2180 qh->hw_info2 = cpu_to_le32 (info2);
2181
2182 /* initialize sw and hw queues with these qtds */
2183- list_splice (qtd_list, &qh->qtd_list);
2184- qh_update (qh, list_entry (qtd_list->next, struct ehci_qtd, qtd_list));
2185+ if (!list_empty (qtd_list)) {
2186+ list_splice (qtd_list, &qh->qtd_list);
2187+ qh_update (qh, list_entry (qtd_list->next, struct ehci_qtd, qtd_list));
2188+ } else {
2189+ qh->hw_qtd_next = qh->hw_alt_next = EHCI_LIST_END;
2190+ }
2191
2192 /* initialize data toggle state */
2193- if (!usb_pipecontrol (urb->pipe))
2194- clear_toggle (urb->dev,
2195- usb_pipeendpoint (urb->pipe),
2196- usb_pipeout (urb->pipe),
2197- qh);
2198+ clear_toggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, qh);
2199
2200+done:
2201 return qh;
2202 }
2203+#undef hb_mult
2204+#undef hb_packet
2205
2206 /*-------------------------------------------------------------------------*/
2207
2208@@ -719,8 +722,7 @@
2209 u32 cmd = readl (&ehci->regs->command);
2210
2211 /* in case a clear of CMD_ASE didn't take yet */
2212- while (readl (&ehci->regs->status) & STS_ASS)
2213- udelay (100);
2214+ (void) handshake (&ehci->regs->status, STS_ASS, 0, 150);
2215
2216 qh->hw_info1 |= __constant_cpu_to_le32 (QH_HEAD); /* [4.8] */
2217 qh->qh_next.qh = qh;
2218@@ -743,58 +745,58 @@
2219 }
2220 qh->qh_state = QH_STATE_LINKED;
2221 /* qtd completions reported later by interrupt */
2222+
2223+ ehci->async_idle = 0;
2224 }
2225
2226 /*-------------------------------------------------------------------------*/
2227
2228-static int
2229-submit_async (
2230+/*
2231+ * For control/bulk/interrupt, return QH with these TDs appended.
2232+ * Allocates and initializes the QH if necessary.
2233+ * Returns null if it can't allocate a QH it needs to.
2234+ * If the QH has TDs (urbs) already, that's great.
2235+ */
2236+static struct ehci_qh *qh_append_tds (
2237 struct ehci_hcd *ehci,
2238 struct urb *urb,
2239 struct list_head *qtd_list,
2240- int mem_flags
2241-) {
2242- struct ehci_qtd *qtd;
2243- struct hcd_dev *dev;
2244- int epnum;
2245- unsigned long flags;
2246+ int epnum,
2247+ void **ptr
2248+)
2249+{
2250 struct ehci_qh *qh = 0;
2251
2252- qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
2253- dev = (struct hcd_dev *)urb->dev->hcpriv;
2254- epnum = usb_pipeendpoint (urb->pipe);
2255- if (usb_pipein (urb->pipe))
2256- epnum |= 0x10;
2257-
2258- vdbg ("%s: submit_async urb %p len %d ep %d-%s qtd %p [qh %p]",
2259- ehci->hcd.bus_name, urb, urb->transfer_buffer_length,
2260- epnum & 0x0f, (epnum & 0x10) ? "in" : "out",
2261- qtd, dev ? dev->ep [epnum] : (void *)~0);
2262-
2263- spin_lock_irqsave (&ehci->lock, flags);
2264-
2265- qh = (struct ehci_qh *) dev->ep [epnum];
2266+ qh = (struct ehci_qh *) *ptr;
2267 if (likely (qh != 0)) {
2268- u32 hw_next = QTD_NEXT (qtd->qtd_dma);
2269+ struct ehci_qtd *qtd;
2270+
2271+ if (unlikely (list_empty (qtd_list)))
2272+ qtd = 0;
2273+ else
2274+ qtd = list_entry (qtd_list->next, struct ehci_qtd,
2275+ qtd_list);
2276
2277 /* maybe patch the qh used for set_address */
2278 if (unlikely (epnum == 0
2279 && le32_to_cpu (qh->hw_info1 & 0x7f) == 0))
2280 qh->hw_info1 |= cpu_to_le32 (usb_pipedevice(urb->pipe));
2281
2282- /* is an URB is queued to this qh already? */
2283- if (unlikely (!list_empty (&qh->qtd_list))) {
2284+ /* append to tds already queued to this qh? */
2285+ if (unlikely (!list_empty (&qh->qtd_list) && qtd)) {
2286 struct ehci_qtd *last_qtd;
2287 int short_rx = 0;
2288+ u32 hw_next;
2289
2290 /* update the last qtd's "next" pointer */
2291 // dbg_qh ("non-empty qh", ehci, qh);
2292 last_qtd = list_entry (qh->qtd_list.prev,
2293 struct ehci_qtd, qtd_list);
2294+ hw_next = QTD_NEXT (qtd->qtd_dma);
2295 last_qtd->hw_next = hw_next;
2296
2297 /* previous urb allows short rx? maybe optimize. */
2298- if (!(last_qtd->urb->transfer_flags & USB_DISABLE_SPD)
2299+ if (!(last_qtd->urb->transfer_flags & URB_SHORT_NOT_OK)
2300 && (epnum & 0x10)) {
2301 // only the last QTD for now
2302 last_qtd->hw_alt_next = hw_next;
2303@@ -805,6 +807,7 @@
2304 * Interrupt code must cope with case of HC having it
2305 * cached, and clobbering these updates.
2306 * ... complicates getting rid of extra interrupts!
2307+ * (Or: use dummy td, so cache always stays valid.)
2308 */
2309 if (qh->hw_current == cpu_to_le32 (last_qtd->qtd_dma)) {
2310 wmb ();
2311@@ -824,31 +827,62 @@
2312 */
2313
2314 /* usb_clear_halt() means qh data toggle gets reset */
2315- if (usb_pipebulk (urb->pipe)
2316- && unlikely (!usb_gettoggle (urb->dev,
2317+ if (unlikely (!usb_gettoggle (urb->dev,
2318 (epnum & 0x0f),
2319 !(epnum & 0x10)))) {
2320 clear_toggle (urb->dev,
2321 epnum & 0x0f, !(epnum & 0x10), qh);
2322 }
2323- qh_update (qh, qtd);
2324+ if (qtd)
2325+ qh_update (qh, qtd);
2326 }
2327 list_splice (qtd_list, qh->qtd_list.prev);
2328
2329 } else {
2330 /* can't sleep here, we have ehci->lock... */
2331 qh = ehci_qh_make (ehci, urb, qtd_list, SLAB_ATOMIC);
2332- if (likely (qh != 0)) {
2333- // dbg_qh ("new qh", ehci, qh);
2334- dev->ep [epnum] = qh;
2335- }
2336+ // if (qh) dbg_qh ("new qh", ehci, qh);
2337+ *ptr = qh;
2338 }
2339+ if (qh)
2340+ urb->hcpriv = qh_get (qh);
2341+ return qh;
2342+}
2343+
2344+/*-------------------------------------------------------------------------*/
2345+
2346+static int
2347+submit_async (
2348+ struct ehci_hcd *ehci,
2349+ struct urb *urb,
2350+ struct list_head *qtd_list,
2351+ int mem_flags
2352+) {
2353+ struct ehci_qtd *qtd;
2354+ struct hcd_dev *dev;
2355+ int epnum;
2356+ unsigned long flags;
2357+ struct ehci_qh *qh = 0;
2358+
2359+ qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
2360+ dev = (struct hcd_dev *)urb->dev->hcpriv;
2361+ epnum = usb_pipeendpoint (urb->pipe);
2362+ if (usb_pipein (urb->pipe) && !usb_pipecontrol (urb->pipe))
2363+ epnum |= 0x10;
2364+
2365+ vdbg ("%s: submit_async urb %p len %d ep %d-%s qtd %p [qh %p]",
2366+ hcd_to_bus (&ehci->hcd)->bus_name,
2367+ urb, urb->transfer_buffer_length,
2368+ epnum & 0x0f, (epnum & 0x10) ? "in" : "out",
2369+ qtd, dev ? dev->ep [epnum] : (void *)~0);
2370+
2371+ spin_lock_irqsave (&ehci->lock, flags);
2372+ qh = qh_append_tds (ehci, urb, qtd_list, epnum, &dev->ep [epnum]);
2373
2374 /* Control/bulk operations through TTs don't need scheduling,
2375 * the HC and TT handle it when the TT has a buffer ready.
2376 */
2377 if (likely (qh != 0)) {
2378- urb->hcpriv = qh_get (qh);
2379 if (likely (qh->qh_state == QH_STATE_IDLE))
2380 qh_link_async (ehci, qh_get (qh));
2381 }
2382@@ -869,16 +903,16 @@
2383 {
2384 struct ehci_qh *qh = ehci->reclaim;
2385
2386+ del_timer (&ehci->watchdog);
2387+
2388 qh->qh_state = QH_STATE_IDLE;
2389 qh->qh_next.qh = 0;
2390 qh_put (ehci, qh); // refcount from reclaim
2391 ehci->reclaim = 0;
2392 ehci->reclaim_ready = 0;
2393
2394- qh_completions (ehci, qh, 1);
2395+ qh_completions (ehci, qh);
2396
2397- // unlink any urb should now unlink all following urbs, so that
2398- // relinking only happens for urbs before the unlinked ones.
2399 if (!list_empty (&qh->qtd_list)
2400 && HCD_IS_RUNNING (ehci->hcd.state))
2401 qh_link_async (ehci, qh);
2402@@ -886,7 +920,6 @@
2403 qh_put (ehci, qh); // refcount from async list
2404 }
2405
2406-
2407 /* makes sure the async qh will become idle */
2408 /* caller must own ehci->lock */
2409
2410@@ -916,13 +949,14 @@
2411 if (unlikely (qh == ehci->async && qh->qh_next.qh == qh)) {
2412 /* can't get here without STS_ASS set */
2413 if (ehci->hcd.state != USB_STATE_HALT) {
2414- if (cmd & CMD_PSE)
2415- writel (cmd & ~CMD_ASE, &ehci->regs->command);
2416- else {
2417- ehci_ready (ehci);
2418- while (readl (&ehci->regs->status) & STS_ASS)
2419- udelay (100);
2420- }
2421+ writel (cmd & ~CMD_ASE, &ehci->regs->command);
2422+ (void) handshake (&ehci->regs->status, STS_ASS, 0, 150);
2423+#if 0
2424+ // one VT8235 system wants to die with STS_FATAL
2425+ // unless this qh is leaked here. others seem ok...
2426+ qh = qh_get (qh);
2427+ dbg_qh ("async/off", ehci, qh);
2428+#endif
2429 }
2430 qh->qh_next.qh = ehci->async = 0;
2431
2432@@ -940,10 +974,6 @@
2433 prev = ehci->async;
2434 while (prev->qh_next.qh != qh && prev->qh_next.qh != ehci->async)
2435 prev = prev->qh_next.qh;
2436-#ifdef DEBUG
2437- if (prev->qh_next.qh != qh)
2438- BUG ();
2439-#endif
2440
2441 if (qh->hw_info1 & __constant_cpu_to_le32 (QH_HEAD)) {
2442 ehci->async = prev;
2443@@ -957,48 +987,63 @@
2444 cmd |= CMD_IAAD;
2445 writel (cmd, &ehci->regs->command);
2446 /* posted write need not be known to HC yet ... */
2447+
2448+ mod_timer (&ehci->watchdog, jiffies + EHCI_WATCHDOG_JIFFIES);
2449 }
2450
2451 /*-------------------------------------------------------------------------*/
2452
2453-static void scan_async (struct ehci_hcd *ehci)
2454+static void
2455+scan_async (struct ehci_hcd *ehci)
2456 {
2457 struct ehci_qh *qh;
2458- unsigned long flags;
2459+ unsigned count;
2460
2461- spin_lock_irqsave (&ehci->lock, flags);
2462 rescan:
2463 qh = ehci->async;
2464+ count = 0;
2465 if (likely (qh != 0)) {
2466 do {
2467 /* clean any finished work for this qh */
2468 if (!list_empty (&qh->qtd_list)) {
2469 // dbg_qh ("scan_async", ehci, qh);
2470 qh = qh_get (qh);
2471- spin_unlock_irqrestore (&ehci->lock, flags);
2472
2473 /* concurrent unlink could happen here */
2474- qh_completions (ehci, qh, 1);
2475-
2476- spin_lock_irqsave (&ehci->lock, flags);
2477+ count += qh_completions (ehci, qh);
2478 qh_put (ehci, qh);
2479 }
2480
2481- /* unlink idle entries (reduces PCI usage) */
2482+ /* unlink idle entries, reducing HC PCI usage as
2483+ * well as HCD schedule-scanning costs. removing
2484+ * the last qh is deferred, since it's costly.
2485+ *
2486+ * FIXME don't unlink idle entries so quickly; it
2487+ * can penalize (common) half duplex protocols.
2488+ */
2489 if (list_empty (&qh->qtd_list) && !ehci->reclaim) {
2490 if (qh->qh_next.qh != qh) {
2491 // dbg ("irq/empty");
2492 start_unlink_async (ehci, qh);
2493- } else {
2494- // FIXME: arrange to stop
2495- // after it's been idle a while.
2496+ } else if (!timer_pending (&ehci->watchdog)) {
2497+ /* can't use IAA for last entry */
2498+ ehci->async_idle = 1;
2499+ mod_timer (&ehci->watchdog,
2500+ jiffies + EHCI_ASYNC_JIFFIES);
2501 }
2502 }
2503+
2504+ /* keep latencies down: let any irqs in */
2505+ if (count > max_completions) {
2506+ spin_unlock_irq (&ehci->lock);
2507+ cpu_relax ();
2508+ spin_lock_irq (&ehci->lock);
2509+ goto rescan;
2510+ }
2511+
2512 qh = qh->qh_next.qh;
2513 if (!qh) /* unlinked? */
2514 goto rescan;
2515 } while (qh != ehci->async);
2516 }
2517-
2518- spin_unlock_irqrestore (&ehci->lock, flags);
2519 }
2520diff -Nru a/drivers/usb/hcd/ehci-sched.c b/drivers/usb/hcd/ehci-sched.c
2521--- a/drivers/usb/hcd/ehci-sched.c Mon Oct 21 22:14:31 2002
2522+++ b/drivers/usb/hcd/ehci-sched.c Mon Oct 21 22:14:31 2002
2523@@ -33,19 +33,6 @@
2524 * or with "USB On The Go" additions to USB 2.0 ...)
2525 */
2526
2527-/*
2528- * Ceiling microseconds (typical) for that many bytes at high speed
2529- * ISO is a bit less, no ACK ... from USB 2.0 spec, 5.11.3 (and needed
2530- * to preallocate bandwidth)
2531- */
2532-#define EHCI_HOST_DELAY 5 /* nsec, guess */
2533-#define HS_USECS(bytes) NS_TO_US ( ((55 * 8 * 2083)/1000) \
2534- + ((2083UL * (3167 + BitTime (bytes)))/1000) \
2535- + EHCI_HOST_DELAY)
2536-#define HS_USECS_ISO(bytes) NS_TO_US ( ((long)(38 * 8 * 2.083)) \
2537- + ((2083UL * (3167 + BitTime (bytes)))/1000) \
2538- + EHCI_HOST_DELAY)
2539-
2540 static int ehci_get_frame (struct usb_hcd *hcd);
2541
2542 /*-------------------------------------------------------------------------*/
2543@@ -124,6 +111,9 @@
2544 /* is it in the S-mask? */
2545 if (q->qh->hw_info2 & cpu_to_le32 (1 << uframe))
2546 usecs += q->qh->usecs;
2547+ /* ... or C-mask? */
2548+ if (q->qh->hw_info2 & cpu_to_le32 (1 << (8 + uframe)))
2549+ usecs += q->qh->c_usecs;
2550 q = &q->qh->qh_next;
2551 break;
2552 case Q_TYPE_FSTN:
2553@@ -181,15 +171,19 @@
2554
2555 /*-------------------------------------------------------------------------*/
2556
2557-static void enable_periodic (struct ehci_hcd *ehci)
2558+static int enable_periodic (struct ehci_hcd *ehci)
2559 {
2560 u32 cmd;
2561+ int status;
2562
2563 /* did clearing PSE did take effect yet?
2564 * takes effect only at frame boundaries...
2565 */
2566- while (readl (&ehci->regs->status) & STS_PSS)
2567- udelay (20);
2568+ status = handshake (&ehci->regs->status, STS_PSS, 0, 9 * 125);
2569+ if (status != 0) {
2570+ ehci->hcd.state = USB_STATE_HALT;
2571+ return status;
2572+ }
2573
2574 cmd = readl (&ehci->regs->command) | CMD_PSE;
2575 writel (cmd, &ehci->regs->command);
2576@@ -199,80 +193,104 @@
2577 /* make sure tasklet scans these */
2578 ehci->next_uframe = readl (&ehci->regs->frame_index)
2579 % (ehci->periodic_size << 3);
2580+ return 0;
2581 }
2582
2583-static void disable_periodic (struct ehci_hcd *ehci)
2584+static int disable_periodic (struct ehci_hcd *ehci)
2585 {
2586 u32 cmd;
2587+ int status;
2588
2589 /* did setting PSE not take effect yet?
2590 * takes effect only at frame boundaries...
2591 */
2592- while (!(readl (&ehci->regs->status) & STS_PSS))
2593- udelay (20);
2594+ status = handshake (&ehci->regs->status, STS_PSS, STS_PSS, 9 * 125);
2595+ if (status != 0) {
2596+ ehci->hcd.state = USB_STATE_HALT;
2597+ return status;
2598+ }
2599
2600 cmd = readl (&ehci->regs->command) & ~CMD_PSE;
2601 writel (cmd, &ehci->regs->command);
2602 /* posted write ... */
2603
2604 ehci->next_uframe = -1;
2605+ return 0;
2606 }
2607
2608 /*-------------------------------------------------------------------------*/
2609
2610+// FIXME microframe periods not yet handled
2611+
2612 static void intr_deschedule (
2613 struct ehci_hcd *ehci,
2614- unsigned frame,
2615 struct ehci_qh *qh,
2616- unsigned period
2617+ int wait
2618 ) {
2619- unsigned long flags;
2620-
2621- period >>= 3; // FIXME microframe periods not handled yet
2622-
2623- spin_lock_irqsave (&ehci->lock, flags);
2624+ int status;
2625+ unsigned frame = qh->start;
2626
2627 do {
2628 periodic_unlink (ehci, frame, qh);
2629 qh_put (ehci, qh);
2630- frame += period;
2631+ frame += qh->period;
2632 } while (frame < ehci->periodic_size);
2633
2634 qh->qh_state = QH_STATE_UNLINK;
2635 qh->qh_next.ptr = 0;
2636- ehci->periodic_urbs--;
2637+ ehci->periodic_sched--;
2638
2639 /* maybe turn off periodic schedule */
2640- if (!ehci->periodic_urbs)
2641- disable_periodic (ehci);
2642- else
2643+ if (!ehci->periodic_sched)
2644+ status = disable_periodic (ehci);
2645+ else {
2646+ status = 0;
2647 vdbg ("periodic schedule still enabled");
2648-
2649- spin_unlock_irqrestore (&ehci->lock, flags);
2650+ }
2651
2652 /*
2653 * If the hc may be looking at this qh, then delay a uframe
2654 * (yeech!) to be sure it's done.
2655 * No other threads may be mucking with this qh.
2656 */
2657- if (((ehci_get_frame (&ehci->hcd) - frame) % period) == 0)
2658- udelay (125);
2659+ if (((ehci_get_frame (&ehci->hcd) - frame) % qh->period) == 0) {
2660+ if (wait) {
2661+ udelay (125);
2662+ qh->hw_next = EHCI_LIST_END;
2663+ } else {
2664+ /* we may not be IDLE yet, but if the qh is empty
2665+ * the race is very short. then if qh also isn't
2666+ * rescheduled soon, it won't matter. otherwise...
2667+ */
2668+ vdbg ("intr_deschedule...");
2669+ }
2670+ } else
2671+ qh->hw_next = EHCI_LIST_END;
2672
2673 qh->qh_state = QH_STATE_IDLE;
2674- qh->hw_next = EHCI_LIST_END;
2675
2676- vdbg ("descheduled qh %p, per = %d frame = %d count = %d, urbs = %d",
2677- qh, period, frame,
2678- atomic_read (&qh->refcount), ehci->periodic_urbs);
2679+ /* update per-qh bandwidth utilization (for usbfs) */
2680+ hcd_to_bus (&ehci->hcd)->bandwidth_allocated -=
2681+ (qh->usecs + qh->c_usecs) / qh->period;
2682+
2683+ dbg ("descheduled qh %p, period = %d frame = %d count = %d, urbs = %d",
2684+ qh, qh->period, frame,
2685+ atomic_read (&qh->refcount), ehci->periodic_sched);
2686 }
2687
2688 static int check_period (
2689 struct ehci_hcd *ehci,
2690 unsigned frame,
2691- int uframe,
2692+ unsigned uframe,
2693 unsigned period,
2694 unsigned usecs
2695 ) {
2696+ /* complete split running into next frame?
2697+ * given FSTN support, we could sometimes check...
2698+ */
2699+ if (uframe >= 8)
2700+ return 0;
2701+
2702 /*
2703 * 80% periodic == 100 usec/uframe available
2704 * convert "usecs we need" to "max already claimed"
2705@@ -284,6 +302,8 @@
2706
2707 // FIXME delete when intr_submit handles non-empty queues
2708 // this gives us a one intr/frame limit (vs N/uframe)
2709+// ... and also lets us avoid tracking split transactions
2710+// that might collide at a given TT/hub.
2711 if (ehci->pshadow [frame].ptr)
2712 return 0;
2713
2714@@ -298,226 +318,203 @@
2715 return 1;
2716 }
2717
2718-static int intr_submit (
2719- struct ehci_hcd *ehci,
2720- struct urb *urb,
2721- struct list_head *qtd_list,
2722- int mem_flags
2723-) {
2724- unsigned epnum, period;
2725- unsigned short usecs;
2726- unsigned long flags;
2727- struct ehci_qh *qh;
2728- struct hcd_dev *dev;
2729- int status = 0;
2730+static int check_intr_schedule (
2731+ struct ehci_hcd *ehci,
2732+ unsigned frame,
2733+ unsigned uframe,
2734+ const struct ehci_qh *qh,
2735+ u32 *c_maskp
2736+)
2737+{
2738+ int retval = -ENOSPC;
2739
2740- /* get endpoint and transfer data */
2741- epnum = usb_pipeendpoint (urb->pipe);
2742- if (usb_pipein (urb->pipe))
2743- epnum |= 0x10;
2744- if (urb->dev->speed != USB_SPEED_HIGH) {
2745- dbg ("no intr/tt scheduling yet");
2746- status = -ENOSYS;
2747+ if (!check_period (ehci, frame, uframe, qh->period, qh->usecs))
2748+ goto done;
2749+ if (!qh->c_usecs) {
2750+ retval = 0;
2751+ *c_maskp = cpu_to_le32 (0);
2752 goto done;
2753 }
2754
2755- /*
2756- * NOTE: current completion/restart logic doesn't handle more than
2757- * one qtd in a periodic qh ... 16-20 KB/urb is pretty big for this.
2758- * such big requests need many periods to transfer.
2759+ /* This is a split transaction; check the bandwidth available for
2760+ * the completion too. Check both worst and best case gaps: worst
2761+ * case is SPLIT near uframe end, and CSPLIT near start ... best is
2762+ * vice versa. Difference can be almost two uframe times, but we
2763+ * reserve unnecessary bandwidth (waste it) this way. (Actually
2764+ * even better cases exist, like immediate device NAK.)
2765 *
2766- * FIXME want to change hcd core submit model to expect queuing
2767- * for all transfer types ... not just ISO and (with flag) BULK.
2768- * that means: getting rid of this check; handling the "interrupt
2769- * urb already queued" case below like bulk queuing is handled (no
2770- * errors possible!); and completly getting rid of that annoying
2771- * qh restart logic. simpler/smaller overall, and more flexible.
2772+ * FIXME don't even bother unless we know this TT is idle in that
2773+ * range of uframes ... for now, check_period() allows only one
2774+ * interrupt transfer per frame, so needn't check "TT busy" status
2775+ * when scheduling a split (QH, SITD, or FSTN).
2776+ *
2777+ * FIXME ehci 0.96 and above can use FSTNs
2778 */
2779- if (unlikely (qtd_list->next != qtd_list->prev)) {
2780- dbg ("only one intr qtd per urb allowed");
2781- status = -EINVAL;
2782+ if (!check_period (ehci, frame, uframe + qh->gap_uf + 1,
2783+ qh->period, qh->c_usecs))
2784 goto done;
2785- }
2786-
2787- usecs = HS_USECS (urb->transfer_buffer_length);
2788-
2789- /* FIXME handle HS periods of less than 1 frame. */
2790- period = urb->interval >> 3;
2791- if (period < 1) {
2792- dbg ("intr period %d uframes, NYET!", urb->interval);
2793- status = -EINVAL;
2794+ if (!check_period (ehci, frame, uframe + qh->gap_uf,
2795+ qh->period, qh->c_usecs))
2796 goto done;
2797- }
2798
2799- spin_lock_irqsave (&ehci->lock, flags);
2800-
2801- /* get the qh (must be empty and idle) */
2802- dev = (struct hcd_dev *)urb->dev->hcpriv;
2803- qh = (struct ehci_qh *) dev->ep [epnum];
2804- if (qh) {
2805- /* only allow one queued interrupt urb per EP */
2806- if (unlikely (qh->qh_state != QH_STATE_IDLE
2807- || !list_empty (&qh->qtd_list))) {
2808- dbg ("interrupt urb already queued");
2809- status = -EBUSY;
2810- } else {
2811- /* maybe reset hardware's data toggle in the qh */
2812- if (unlikely (!usb_gettoggle (urb->dev, epnum & 0x0f,
2813- !(epnum & 0x10)))) {
2814- qh->hw_token |=
2815- __constant_cpu_to_le32 (QTD_TOGGLE);
2816- usb_settoggle (urb->dev, epnum & 0x0f,
2817- !(epnum & 0x10), 1);
2818- }
2819- /* trust the QH was set up as interrupt ... */
2820- list_splice (qtd_list, &qh->qtd_list);
2821- qh_update (qh, list_entry (qtd_list->next,
2822- struct ehci_qtd, qtd_list));
2823- qtd_list = &qh->qtd_list;
2824- }
2825- } else {
2826- /* can't sleep here, we have ehci->lock... */
2827- qh = ehci_qh_make (ehci, urb, qtd_list, SLAB_ATOMIC);
2828- if (likely (qh != 0)) {
2829- // dbg ("new INTR qh %p", qh);
2830- dev->ep [epnum] = qh;
2831- qtd_list = &qh->qtd_list;
2832- } else
2833- status = -ENOMEM;
2834- }
2835+ *c_maskp = cpu_to_le32 (0x03 << (8 + uframe + qh->gap_uf));
2836+ retval = 0;
2837+done:
2838+ return retval;
2839+}
2840
2841- /* Schedule this periodic QH. */
2842- if (likely (status == 0)) {
2843- unsigned frame = period;
2844+static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh)
2845+{
2846+ int status;
2847+ unsigned uframe;
2848+ u32 c_mask;
2849+ unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */
2850
2851- qh->hw_next = EHCI_LIST_END;
2852- qh->usecs = usecs;
2853+ qh->hw_next = EHCI_LIST_END;
2854+ frame = qh->start;
2855
2856- urb->hcpriv = qh_get (qh);
2857+ /* reuse the previous schedule slots, if we can */
2858+ if (frame < qh->period) {
2859+ uframe = ffs (le32_to_cpup (&qh->hw_info2) & 0x00ff);
2860+ status = check_intr_schedule (ehci, frame, --uframe,
2861+ qh, &c_mask);
2862+ } else {
2863+ uframe = 0;
2864+ c_mask = 0;
2865 status = -ENOSPC;
2866+ }
2867
2868- /* pick a set of schedule slots, link the QH into them */
2869+ /* else scan the schedule to find a group of slots such that all
2870+ * uframes have enough periodic bandwidth available.
2871+ */
2872+ if (status) {
2873+ frame = qh->period - 1;
2874 do {
2875- int uframe;
2876-
2877- /* pick a set of slots such that all uframes have
2878- * enough periodic bandwidth available.
2879- *
2880- * FIXME for TT splits, need uframes for start and end.
2881- * FSTNs can put end into next frame (uframes 0 or 1).
2882- */
2883- frame--;
2884 for (uframe = 0; uframe < 8; uframe++) {
2885- if (check_period (ehci, frame, uframe,
2886- period, usecs) != 0)
2887+ status = check_intr_schedule (ehci,
2888+ frame, uframe, qh,
2889+ &c_mask);
2890+ if (status == 0)
2891 break;
2892 }
2893- if (uframe == 8)
2894- continue;
2895+ } while (status && --frame);
2896+ if (status)
2897+ goto done;
2898+ qh->start = frame;
2899+
2900+ /* reset S-frame and (maybe) C-frame masks */
2901+ qh->hw_info2 &= ~0xffff;
2902+ qh->hw_info2 |= cpu_to_le32 (1 << uframe) | c_mask;
2903+ } else
2904+ dbg ("reused previous qh %p schedule", qh);
2905+
2906+ /* stuff into the periodic schedule */
2907+ qh->qh_state = QH_STATE_LINKED;
2908+ dbg ("scheduled qh %p usecs %d/%d period %d.0 starting %d.%d (gap %d)",
2909+ qh, qh->usecs, qh->c_usecs,
2910+ qh->period, frame, uframe, qh->gap_uf);
2911+ do {
2912+ if (unlikely (ehci->pshadow [frame].ptr != 0)) {
2913
2914- /* QH will run once each period, starting there */
2915- urb->start_frame = frame;
2916- status = 0;
2917-
2918- /* set S-frame mask */
2919- qh->hw_info2 |= cpu_to_le32 (1 << uframe);
2920- // dbg_qh ("Schedule INTR qh", ehci, qh);
2921-
2922- /* stuff into the periodic schedule */
2923- qh->qh_state = QH_STATE_LINKED;
2924- vdbg ("qh %p usecs %d period %d starting %d.%d",
2925- qh, qh->usecs, period, frame, uframe);
2926- do {
2927- if (unlikely (ehci->pshadow [frame].ptr != 0)) {
2928 // FIXME -- just link toward the end, before any qh with a shorter period,
2929-// AND handle it already being (implicitly) linked into this frame
2930-// AS WELL AS updating the check_period() logic
2931- BUG ();
2932- } else {
2933- ehci->pshadow [frame].qh = qh_get (qh);
2934- ehci->periodic [frame] =
2935- QH_NEXT (qh->qh_dma);
2936- }
2937- wmb ();
2938- frame += period;
2939- } while (frame < ehci->periodic_size);
2940-
2941- /* update bandwidth utilization records (for usbfs) */
2942- usb_claim_bandwidth (urb->dev, urb, usecs/period, 0);
2943-
2944- /* maybe enable periodic schedule processing */
2945- if (!ehci->periodic_urbs++)
2946- enable_periodic (ehci);
2947- break;
2948+// AND accomodate it already having been linked here (after some other qh)
2949+// AS WELL AS updating the schedule checking logic
2950+
2951+ BUG ();
2952+ } else {
2953+ ehci->pshadow [frame].qh = qh_get (qh);
2954+ ehci->periodic [frame] =
2955+ QH_NEXT (qh->qh_dma);
2956+ }
2957+ wmb ();
2958+ frame += qh->period;
2959+ } while (frame < ehci->periodic_size);
2960+
2961+ /* update per-qh bandwidth for usbfs */
2962+ hcd_to_bus (&ehci->hcd)->bandwidth_allocated +=
2963+ (qh->usecs + qh->c_usecs) / qh->period;
2964+
2965+ /* maybe enable periodic schedule processing */
2966+ if (!ehci->periodic_sched++)
2967+ status = enable_periodic (ehci);
2968+done:
2969+ return status;
2970+}
2971
2972- } while (frame);
2973+static int intr_submit (
2974+ struct ehci_hcd *ehci,
2975+ struct urb *urb,
2976+ struct list_head *qtd_list,
2977+ int mem_flags
2978+) {
2979+ unsigned epnum;
2980+ unsigned long flags;
2981+ struct ehci_qh *qh;
2982+ struct hcd_dev *dev;
2983+ int is_input;
2984+ int status = 0;
2985+ struct list_head empty;
2986+
2987+ /* get endpoint and transfer/schedule data */
2988+ epnum = usb_pipeendpoint (urb->pipe);
2989+ is_input = usb_pipein (urb->pipe);
2990+ if (is_input)
2991+ epnum |= 0x10;
2992+
2993+ spin_lock_irqsave (&ehci->lock, flags);
2994+ dev = (struct hcd_dev *)urb->dev->hcpriv;
2995+
2996+ /* get qh and force any scheduling errors */
2997+ INIT_LIST_HEAD (&empty);
2998+ qh = qh_append_tds (ehci, urb, &empty, epnum, &dev->ep [epnum]);
2999+ if (qh == 0) {
3000+ status = -ENOMEM;
3001+ goto done;
3002 }
3003- spin_unlock_irqrestore (&ehci->lock, flags);
3004+ if (qh->qh_state == QH_STATE_IDLE) {
3005+ if ((status = qh_schedule (ehci, qh)) != 0)
3006+ goto done;
3007+ }
3008+
3009+ /* then queue the urb's tds to the qh */
3010+ qh = qh_append_tds (ehci, urb, qtd_list, epnum, &dev->ep [epnum]);
3011+ BUG_ON (qh == 0);
3012+
3013+ /* ... update usbfs periodic stats */
3014+ hcd_to_bus (&ehci->hcd)->bandwidth_int_reqs++;
3015+
3016 done:
3017+ spin_unlock_irqrestore (&ehci->lock, flags);
3018 if (status)
3019 qtd_list_free (ehci, urb, qtd_list);
3020
3021 return status;
3022 }
3023
3024-static unsigned long
3025+static unsigned
3026 intr_complete (
3027 struct ehci_hcd *ehci,
3028 unsigned frame,
3029- struct ehci_qh *qh,
3030- unsigned long flags /* caller owns ehci->lock ... */
3031+ struct ehci_qh *qh
3032 ) {
3033- struct ehci_qtd *qtd;
3034- struct urb *urb;
3035- int unlinking;
3036+ unsigned count;
3037
3038 /* nothing to report? */
3039 if (likely ((qh->hw_token & __constant_cpu_to_le32 (QTD_STS_ACTIVE))
3040 != 0))
3041- return flags;
3042+ return 0;
3043 if (unlikely (list_empty (&qh->qtd_list))) {
3044 dbg ("intr qh %p no TDs?", qh);
3045- return flags;
3046+ return 0;
3047 }
3048
3049- qtd = list_entry (qh->qtd_list.next, struct ehci_qtd, qtd_list);
3050- urb = qtd->urb;
3051- unlinking = (urb->status == -ENOENT) || (urb->status == -ECONNRESET);
3052-
3053- /* call any completions, after patching for reactivation */
3054- spin_unlock_irqrestore (&ehci->lock, flags);
3055- /* NOTE: currently restricted to one qtd per qh! */
3056- if (qh_completions (ehci, qh, 0) == 0)
3057- urb = 0;
3058- spin_lock_irqsave (&ehci->lock, flags);
3059+ /* handle any completions */
3060+ count = qh_completions (ehci, qh);
3061
3062- /* never reactivate requests that were unlinked ... */
3063- if (likely (urb != 0)) {
3064- if (unlinking
3065- || urb->status == -ECONNRESET
3066- || urb->status == -ENOENT
3067- // || (urb->dev == null)
3068- || ehci->hcd.state == USB_STATE_HALT)
3069- urb = 0;
3070- // FIXME look at all those unlink cases ... we always
3071- // need exactly one completion that reports unlink.
3072- // the one above might not have been it!
3073- }
3074-
3075- /* normally reactivate */
3076- if (likely (urb != 0)) {
3077- if (usb_pipeout (urb->pipe))
3078- pci_dma_sync_single (ehci->hcd.pdev,
3079- qtd->buf_dma,
3080- urb->transfer_buffer_length,
3081- PCI_DMA_TODEVICE);
3082- urb->status = -EINPROGRESS;
3083- urb->actual_length = 0;
3084+ if (unlikely (list_empty (&qh->qtd_list)))
3085+ intr_deschedule (ehci, qh, 0);
3086
3087- /* patch qh and restart */
3088- qh_update (qh, qtd);
3089- }
3090- return flags;
3091+ return count;
3092 }
3093
3094 /*-------------------------------------------------------------------------*/
3095@@ -527,11 +524,6 @@
3096 {
3097 struct ehci_itd *first_itd = urb->hcpriv;
3098
3099- pci_unmap_single (ehci->hcd.pdev,
3100- first_itd->buf_dma, urb->transfer_buffer_length,
3101- usb_pipein (urb->pipe)
3102- ? PCI_DMA_FROMDEVICE
3103- : PCI_DMA_TODEVICE);
3104 while (!list_empty (&first_itd->itd_list)) {
3105 struct ehci_itd *itd;
3106
3107@@ -557,6 +549,7 @@
3108 u32 buf1;
3109 unsigned i, epnum, maxp, multi;
3110 unsigned length;
3111+ int is_input;
3112
3113 itd->hw_next = EHCI_LIST_END;
3114 itd->urb = urb;
3115@@ -578,7 +571,8 @@
3116 * as encoded in the ep descriptor's maxpacket field
3117 */
3118 epnum = usb_pipeendpoint (urb->pipe);
3119- if (usb_pipein (urb->pipe)) {
3120+ is_input = usb_pipein (urb->pipe);
3121+ if (is_input) {
3122 maxp = urb->dev->epmaxpacketin [epnum];
3123 buf1 = (1 << 11);
3124 } else {
3125@@ -598,7 +592,7 @@
3126 urb->iso_frame_desc [index].length);
3127 return -ENOSPC;
3128 }
3129- itd->usecs = HS_USECS_ISO (length);
3130+ itd->usecs = usb_calc_bus_time (USB_SPEED_HIGH, is_input, 1, length);
3131
3132 /* "plus" info in low order bits of buffer pointers */
3133 itd->hw_bufp [0] |= cpu_to_le32 ((epnum << 8) | urb->dev->devnum);
3134@@ -625,16 +619,7 @@
3135 int frame_index;
3136 struct ehci_itd *first_itd, *itd;
3137 int status;
3138- dma_addr_t buf_dma, itd_dma;
3139-
3140- /* set up one dma mapping for this urb */
3141- buf_dma = pci_map_single (ehci->hcd.pdev,
3142- urb->transfer_buffer, urb->transfer_buffer_length,
3143- usb_pipein (urb->pipe)
3144- ? PCI_DMA_FROMDEVICE
3145- : PCI_DMA_TODEVICE);
3146- if (buf_dma == 0)
3147- return -ENOMEM;
3148+ dma_addr_t itd_dma;
3149
3150 /* allocate/init ITDs */
3151 for (frame_index = 0, first_itd = 0;
3152@@ -648,7 +633,8 @@
3153 memset (itd, 0, sizeof *itd);
3154 itd->itd_dma = itd_dma;
3155
3156- status = itd_fill (ehci, itd, urb, frame_index, buf_dma);
3157+ status = itd_fill (ehci, itd, urb, frame_index,
3158+ urb->transfer_dma);
3159 if (status != 0)
3160 goto fail;
3161
3162@@ -737,7 +723,7 @@
3163
3164 /* calculate the legal range [start,max) */
3165 now = readl (&ehci->regs->frame_index) + 1; /* next uframe */
3166- if (!ehci->periodic_urbs)
3167+ if (!ehci->periodic_sched)
3168 now += 8; /* startup delay */
3169 now %= mod;
3170 end = now + mod;
3171@@ -857,8 +843,12 @@
3172 usb_claim_bandwidth (urb->dev, urb, usecs, 1);
3173
3174 /* maybe enable periodic schedule processing */
3175- if (!ehci->periodic_urbs++)
3176- enable_periodic (ehci);
3177+ if (!ehci->periodic_sched++) {
3178+ if ((status = enable_periodic (ehci)) != 0) {
3179+ // FIXME deschedule right away
3180+ err ("itd_schedule, enable = %d", status);
3181+ }
3182+ }
3183
3184 return 0;
3185
3186@@ -873,15 +863,14 @@
3187
3188 #define ISO_ERRS (EHCI_ISOC_BUF_ERR | EHCI_ISOC_BABBLE | EHCI_ISOC_XACTERR)
3189
3190-static unsigned long
3191+static unsigned
3192 itd_complete (
3193 struct ehci_hcd *ehci,
3194 struct ehci_itd *itd,
3195- unsigned uframe,
3196- unsigned long flags
3197+ unsigned uframe
3198 ) {
3199 struct urb *urb = itd->urb;
3200- iso_packet_descriptor_t *desc;
3201+ struct usb_iso_packet_descriptor *desc;
3202 u32 t;
3203
3204 /* update status for this uframe's transfers */
3205@@ -916,7 +905,7 @@
3206
3207 /* handle completion now? */
3208 if ((itd->index + 1) != urb->number_of_packets)
3209- return flags;
3210+ return 0;
3211
3212 /*
3213 * Always give the urb back to the driver ... expect it to submit
3214@@ -931,16 +920,17 @@
3215 if (urb->status == -EINPROGRESS)
3216 urb->status = 0;
3217
3218- spin_unlock_irqrestore (&ehci->lock, flags);
3219+ /* complete() can reenter this HCD */
3220+ spin_unlock (&ehci->lock);
3221 usb_hcd_giveback_urb (&ehci->hcd, urb);
3222- spin_lock_irqsave (&ehci->lock, flags);
3223+ spin_lock (&ehci->lock);
3224
3225 /* defer stopping schedule; completion can submit */
3226- ehci->periodic_urbs--;
3227- if (!ehci->periodic_urbs)
3228- disable_periodic (ehci);
3229+ ehci->periodic_sched--;
3230+ if (!ehci->periodic_sched)
3231+ (void) disable_periodic (ehci);
3232
3233- return flags;
3234+ return 1;
3235 }
3236
3237 /*-------------------------------------------------------------------------*/
3238@@ -978,130 +964,21 @@
3239 /*
3240 * "Split ISO TDs" ... used for USB 1.1 devices going through
3241 * the TTs in USB 2.0 hubs.
3242+ *
3243+ * FIXME not yet implemented
3244 */
3245
3246-static void
3247-sitd_free (struct ehci_hcd *ehci, struct ehci_sitd *sitd)
3248-{
3249- pci_pool_free (ehci->sitd_pool, sitd, sitd->sitd_dma);
3250-}
3251-
3252-static struct ehci_sitd *
3253-sitd_make (
3254- struct ehci_hcd *ehci,
3255- struct urb *urb,
3256- unsigned index, // urb->iso_frame_desc [index]
3257- unsigned uframe, // scheduled start
3258- dma_addr_t dma, // mapped transfer buffer
3259- int mem_flags
3260-) {
3261- struct ehci_sitd *sitd;
3262- unsigned length;
3263-
3264- sitd = pci_pool_alloc (ehci->sitd_pool, mem_flags, &dma);
3265- if (!sitd)
3266- return sitd;
3267- sitd->urb = urb;
3268- length = urb->iso_frame_desc [index].length;
3269- dma += urb->iso_frame_desc [index].offset;
3270-
3271-#if 0
3272- // FIXME: do the rest!
3273-#else
3274- sitd_free (ehci, sitd);
3275- return 0;
3276-#endif
3277-
3278-}
3279-
3280-static void
3281-sitd_link (struct ehci_hcd *ehci, unsigned frame, struct ehci_sitd *sitd)
3282-{
3283- u32 ptr;
3284-
3285- ptr = cpu_to_le32 (sitd->sitd_dma | 2); // type 2 == sitd
3286- if (ehci->pshadow [frame].ptr) {
3287- if (!sitd->sitd_next.ptr) {
3288- sitd->sitd_next = ehci->pshadow [frame];
3289- sitd->hw_next = ehci->periodic [frame];
3290- } else if (sitd->sitd_next.ptr != ehci->pshadow [frame].ptr) {
3291- dbg ("frame %d sitd link goof", frame);
3292- BUG ();
3293- }
3294- }
3295- ehci->pshadow [frame].sitd = sitd;
3296- ehci->periodic [frame] = ptr;
3297-}
3298-
3299-static unsigned long
3300-sitd_complete (
3301- struct ehci_hcd *ehci,
3302- struct ehci_sitd *sitd,
3303- unsigned long flags
3304-) {
3305- // FIXME -- implement!
3306-
3307- dbg ("NYI -- sitd_complete");
3308- return flags;
3309-}
3310-
3311-/*-------------------------------------------------------------------------*/
3312-
3313-static int sitd_submit (struct ehci_hcd *ehci, struct urb *urb, int mem_flags)
3314-{
3315- // struct ehci_sitd *first_sitd = 0;
3316- unsigned frame_index;
3317- dma_addr_t dma;
3318-
3319- dbg ("NYI -- sitd_submit");
3320-
3321- // FIXME -- implement!
3322-
3323- // FIXME: setup one big dma mapping
3324- dma = 0;
3325-
3326- for (frame_index = 0;
3327- frame_index < urb->number_of_packets;
3328- frame_index++) {
3329- struct ehci_sitd *sitd;
3330- unsigned uframe;
3331-
3332- // FIXME: use real arguments, schedule this!
3333- uframe = -1;
3334-
3335- sitd = sitd_make (ehci, urb, frame_index,
3336- uframe, dma, mem_flags);
3337-
3338- if (sitd) {
3339- /*
3340- if (first_sitd)
3341- list_add_tail (&sitd->sitd_list,
3342- &first_sitd->sitd_list);
3343- else
3344- first_sitd = sitd;
3345- */
3346- } else {
3347- // FIXME: clean everything up
3348- }
3349- }
3350-
3351- // if we have a first sitd, then
3352- // store them all into the periodic schedule!
3353- // urb->hcpriv = first sitd in sitd_list
3354-
3355- return -ENOSYS;
3356-}
3357 #endif /* have_split_iso */
3358
3359 /*-------------------------------------------------------------------------*/
3360
3361-static void scan_periodic (struct ehci_hcd *ehci)
3362+static void
3363+scan_periodic (struct ehci_hcd *ehci)
3364 {
3365 unsigned frame, clock, now_uframe, mod;
3366- unsigned long flags;
3367+ unsigned count = 0;
3368
3369 mod = ehci->periodic_size << 3;
3370- spin_lock_irqsave (&ehci->lock, flags);
3371
3372 /*
3373 * When running, scan from last scan point up to "now"
3374@@ -1122,6 +999,14 @@
3375 u32 type, *hw_p;
3376 unsigned uframes;
3377
3378+ /* keep latencies down: let any irqs in */
3379+ if (count > max_completions) {
3380+ spin_unlock_irq (&ehci->lock);
3381+ cpu_relax ();
3382+ count = 0;
3383+ spin_lock_irq (&ehci->lock);
3384+ }
3385+
3386 restart:
3387 /* scan schedule to _before_ current frame index */
3388 if (frame == clock)
3389@@ -1145,8 +1030,8 @@
3390 last = (q.qh->hw_next == EHCI_LIST_END);
3391 temp = q.qh->qh_next;
3392 type = Q_NEXT_TYPE (q.qh->hw_next);
3393- flags = intr_complete (ehci, frame,
3394- qh_get (q.qh), flags);
3395+ count += intr_complete (ehci, frame,
3396+ qh_get (q.qh));
3397 qh_put (ehci, q.qh);
3398 q = temp;
3399 break;
3400@@ -1178,8 +1063,8 @@
3401 type = Q_NEXT_TYPE (*hw_p);
3402
3403 /* might free q.itd ... */
3404- flags = itd_complete (ehci,
3405- temp.itd, uf, flags);
3406+ count += itd_complete (ehci,
3407+ temp.itd, uf);
3408 break;
3409 }
3410 }
3411@@ -1195,7 +1080,7 @@
3412 #ifdef have_split_iso
3413 case Q_TYPE_SITD:
3414 last = (q.sitd->hw_next == EHCI_LIST_END);
3415- flags = sitd_complete (ehci, q.sitd, flags);
3416+ sitd_complete (ehci, q.sitd);
3417 type = Q_NEXT_TYPE (q.sitd->hw_next);
3418
3419 // FIXME unlink SITD after split completes
3420@@ -1241,5 +1126,4 @@
3421 } else
3422 frame = (frame + 1) % ehci->periodic_size;
3423 }
3424- spin_unlock_irqrestore (&ehci->lock, flags);
3425 }
3426diff -Nru a/drivers/usb/hcd/ehci.h b/drivers/usb/hcd/ehci.h
3427--- a/drivers/usb/hcd/ehci.h Mon Oct 21 22:14:31 2002
3428+++ b/drivers/usb/hcd/ehci.h Mon Oct 21 22:14:31 2002
3429@@ -21,6 +21,23 @@
3430
3431 /* definitions used for the EHCI driver */
3432
3433+/* statistics can be kept for for tuning/monitoring */
3434+struct ehci_stats {
3435+ /* irq usage */
3436+ unsigned long normal;
3437+ unsigned long error;
3438+ unsigned long reclaim;
3439+
3440+ /* termination of urbs from core */
3441+ unsigned long complete;
3442+ unsigned long unlink;
3443+
3444+ /* qhs patched to recover from td queueing race
3445+ * (can avoid by using 'dummy td', allowing fewer irqs)
3446+ */
3447+ unsigned long qpatch;
3448+};
3449+
3450 /* ehci_hcd->lock guards shared data against other CPUs:
3451 * ehci_hcd: async, reclaim, periodic (and shadow), ...
3452 * hcd_dev: ep[]
3453@@ -39,7 +56,8 @@
3454 /* async schedule support */
3455 struct ehci_qh *async;
3456 struct ehci_qh *reclaim;
3457- int reclaim_ready;
3458+ int reclaim_ready : 1,
3459+ async_idle : 1;
3460
3461 /* periodic schedule support */
3462 #define DEFAULT_I_TDPS 1024 /* some HCs can do less */
3463@@ -50,7 +68,7 @@
3464
3465 union ehci_shadow *pshadow; /* mirror hw periodic table */
3466 int next_uframe; /* scan periodic, start here */
3467- unsigned periodic_urbs; /* how many urbs scheduled? */
3468+ unsigned periodic_sched; /* periodic activity count */
3469
3470 /* deferred work from IRQ, etc */
3471 struct tasklet_struct tasklet;
3472@@ -69,10 +87,19 @@
3473 struct pci_pool *qtd_pool; /* one or more per qh */
3474 struct pci_pool *itd_pool; /* itd per iso urb */
3475 struct pci_pool *sitd_pool; /* sitd per split iso urb */
3476+
3477+ struct timer_list watchdog;
3478+
3479+#ifdef EHCI_STATS
3480+ struct ehci_stats stats;
3481+# define COUNT(x) do { (x)++; } while (0)
3482+#else
3483+# define COUNT(x) do {} while (0)
3484+#endif
3485 };
3486
3487 /* unwrap an HCD pointer to get an EHCI_HCD pointer */
3488-#define hcd_to_ehci(hcd_ptr) list_entry(hcd_ptr, struct ehci_hcd, hcd)
3489+#define hcd_to_ehci(hcd_ptr) container_of(hcd_ptr, struct ehci_hcd, hcd)
3490
3491 /* NOTE: urb->transfer_flags expected to not use this bit !!! */
3492 #define EHCI_STATE_UNLINK 0x8000 /* urb being unlinked */
3493@@ -219,7 +246,6 @@
3494
3495 /* dma same in urb's qtds, except 1st control qtd (setup buffer) */
3496 struct urb *urb; /* qtd's urb */
3497- dma_addr_t buf_dma; /* buffer address */
3498 size_t length; /* length of buffer */
3499 } __attribute__ ((aligned (32)));
3500
3501@@ -287,15 +313,20 @@
3502 struct list_head qtd_list; /* sw qtd list */
3503
3504 atomic_t refcount;
3505- unsigned short usecs; /* intr bandwidth */
3506- short qh_state;
3507+
3508+ u8 qh_state;
3509 #define QH_STATE_LINKED 1 /* HC sees this */
3510 #define QH_STATE_UNLINK 2 /* HC may still see this */
3511 #define QH_STATE_IDLE 3 /* HC doesn't see this */
3512
3513-#ifdef EHCI_SOFT_RETRIES
3514- int retries;
3515-#endif
3516+ /* periodic schedule info */
3517+ u8 usecs; /* intr bandwidth */
3518+ u8 gap_uf; /* uframes split/csplit gap */
3519+ u8 c_usecs; /* ... split completion bw */
3520+ unsigned short period; /* polling interval */
3521+ unsigned short start; /* where polling starts */
3522+#define NO_FRAME ((unsigned short)~0) /* pick new start */
3523+
3524 } __attribute__ ((aligned (32)));
3525
3526 /*-------------------------------------------------------------------------*/
3527@@ -360,6 +391,9 @@
3528 union ehci_shadow sitd_next; /* ptr to periodic q entry */
3529 struct urb *urb;
3530 dma_addr_t buf_dma; /* buffer address */
3531+
3532+ unsigned short usecs; /* start bandwidth */
3533+ unsigned short c_usecs; /* completion bandwidth */
3534 } __attribute__ ((aligned (32)));
3535
3536 /*-------------------------------------------------------------------------*/
3537@@ -381,5 +415,40 @@
3538 dma_addr_t fstn_dma;
3539 union ehci_shadow fstn_next; /* ptr to periodic q entry */
3540 } __attribute__ ((aligned (32)));
3541+
3542+/*-------------------------------------------------------------------------*/
3543+
3544+#include <linux/version.h>
3545+#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,32)
3546+
3547+#define SUBMIT_URB(urb,mem_flags) usb_submit_urb(urb)
3548+#define STUB_DEBUG_FILES
3549+
3550+static inline int hcd_register_root (struct usb_hcd *hcd)
3551+{
3552+ return usb_new_device (hcd_to_bus (hcd)->root_hub);
3553+}
3554+
3555+#else /* LINUX_VERSION_CODE */
3556+
3557+// hcd_to_bus() eventually moves to hcd.h on 2.5 too
3558+static inline struct usb_bus *hcd_to_bus (struct usb_hcd *hcd)
3559+ { return &hcd->self; }
3560+// ... as does hcd_register_root()
3561+static inline int hcd_register_root (struct usb_hcd *hcd)
3562+{
3563+ return usb_register_root_hub (
3564+ hcd_to_bus (hcd)->root_hub, &hcd->pdev->dev);
3565+}
3566+
3567+#define SUBMIT_URB(urb,mem_flags) usb_submit_urb(urb,mem_flags)
3568+
3569+#ifndef DEBUG
3570+#define STUB_DEBUG_FILES
3571+#endif /* DEBUG */
3572+
3573+#endif /* LINUX_VERSION_CODE */
3574+
3575+/*-------------------------------------------------------------------------*/
3576
3577 #endif /* __LINUX_EHCI_HCD_H */
3578diff -Nru a/drivers/usb/hcd.c b/drivers/usb/hcd.c
3579--- a/drivers/usb/hcd.c Mon Oct 21 22:14:31 2002
3580+++ b/drivers/usb/hcd.c Mon Oct 21 22:14:31 2002
3581@@ -296,7 +296,7 @@
3582
3583 // serial number
3584 } else if (id == 1) {
3585- strcpy (buf, hcd->bus_name);
3586+ strcpy (buf, hcd->bus->bus_name);
3587
3588 // product description
3589 } else if (id == 2) {
3590@@ -392,7 +392,7 @@
3591 case DeviceOutRequest | USB_REQ_SET_ADDRESS:
3592 // wValue == urb->dev->devaddr
3593 dbg ("%s root hub device address %d",
3594- hcd->bus_name, wValue);
3595+ hcd->bus->bus_name, wValue);
3596 break;
3597
3598 /* INTERFACE REQUESTS (no defined feature/status flags) */
3599@@ -506,7 +506,7 @@
3600 && rh_status_urb (hcd, urb) != 0) {
3601 /* another driver snuck in? */
3602 dbg ("%s, can't resubmit roothub status urb?",
3603- hcd->bus_name);
3604+ hcd->bus->bus_name);
3605 spin_unlock_irqrestore (&hcd_data_lock, flags);
3606 BUG ();
3607 }
3608@@ -687,6 +687,7 @@
3609 base);
3610
3611 // FIXME simpler: make "bus" be that data, not pointer to it.
3612+// (fixed in 2.5)
3613 bus = usb_alloc_bus (&hcd_operations);
3614 if (bus == NULL) {
3615 dbg ("usb_alloc_bus fail");
3616@@ -695,7 +696,7 @@
3617 goto clean_3;
3618 }
3619 hcd->bus = bus;
3620- hcd->bus_name = dev->slot_name;
3621+ bus->bus_name = dev->slot_name;
3622 hcd->product_desc = dev->name;
3623 bus->hcpriv = (void *) hcd;
3624
3625@@ -739,14 +739,14 @@
3626 hcd = pci_get_drvdata(dev);
3627 if (!hcd)
3628 return;
3629- info ("remove: %s, state %x", hcd->bus_name, hcd->state);
3630+ info ("remove: %s, state %x", hcd->bus->bus_name, hcd->state);
3631
3632 if (in_interrupt ()) BUG ();
3633
3634 hub = hcd->bus->root_hub;
3635 hcd->state = USB_STATE_QUIESCING;
3636
3637- dbg ("%s: roothub graceful disconnect", hcd->bus_name);
3638+ dbg ("%s: roothub graceful disconnect", hcd->bus->bus_name);
3639 usb_disconnect (&hub);
3640 // usb_disconnect (&hcd->bus->root_hub);
3641
3642@@ -817,7 +817,7 @@
3643 int retval;
3644
3645 hcd = pci_get_drvdata(dev);
3646- info ("suspend %s to state %d", hcd->bus_name, state);
3647+ info ("suspend %s to state %d", hcd->bus->bus_name, state);
3648
3649 pci_save_state (dev, hcd->pci_state);
3650
3651@@ -846,12 +846,12 @@
3652 int retval;
3653
3654 hcd = pci_get_drvdata(dev);
3655- info ("resume %s", hcd->bus_name);
3656+ info ("resume %s", hcd->bus->bus_name);
3657
3658 /* guard against multiple resumes (APM bug?) */
3659 atomic_inc (&hcd->resume_count);
3660 if (atomic_read (&hcd->resume_count) != 1) {
3661- err ("concurrent PCI resumes for %s", hcd->bus_name);
3662+ err ("concurrent PCI resumes for %s", hcd->bus->bus_name);
3663 retval = 0;
3664 goto done;
3665 }
3666@@ -868,7 +868,8 @@
3667
3668 retval = hcd->driver->resume (hcd);
3669 if (!HCD_IS_RUNNING (hcd->state)) {
3670- dbg ("resume %s failure, retval %d", hcd->bus_name, retval);
3671+ dbg ("resume %s failure, retval %d",
3672+ hcd->bus->bus_name, retval);
3673 hc_died (hcd);
3674 // FIXME: recover, reset etc.
3675 } else {
3676@@ -943,7 +944,8 @@
3677 list_for_each (urblist, &dev->urb_list) {
3678 urb = list_entry (urblist, struct urb, urb_list);
3679 dbg ("shutdown %s urb %p pipe %x, current status %d",
3680- hcd->bus_name, urb, urb->pipe, urb->status);
3681+ hcd->bus->bus_name,
3682+ urb, urb->pipe, urb->status);
3683 if (urb->status == -EINPROGRESS)
3684 urb->status = -ESHUTDOWN;
3685 }
3686@@ -1186,16 +1186,26 @@
3687 if (status)
3688 return status;
3689
3690+ // NOTE: 2.5 does this if !URB_NO_DMA_MAP transfer flag
3691+ if (usb_pipecontrol (urb->pipe))
3692+ urb->setup_dma = pci_map_single (
3693+ hcd->pdev,
3694+ urb->setup_packet,
3695+ sizeof (struct usb_ctrlrequest),
3696+ PCI_DMA_TODEVICE);
3697+ if (urb->transfer_buffer_length != 0)
3698+ urb->transfer_dma = pci_map_single (
3699+ hcd->pdev,
3700+ urb->transfer_buffer,
3701+ urb->transfer_buffer_length,
3702+ usb_pipein (urb->pipe)
3703+ ? PCI_DMA_FROMDEVICE
3704+ : PCI_DMA_TODEVICE);
3705+
3706 if (urb->dev == hcd->bus->root_hub)
3707 status = rh_urb_enqueue (hcd, urb);
3708 else
3709 status = hcd->driver->urb_enqueue (hcd, urb, mem_flags);
3710- /* urb->dev got nulled if hcd called giveback for us
3711- * NOTE: ref to urb->dev is a race without (2.5) refcounting,
3712- * unless driver only returns status when it didn't giveback
3713- */
3714- if (status && urb->dev)
3715- urb_unlink (urb);
3716 return status;
3717 }
3718
3719@@ -1282,25 +1292,25 @@
3720 goto done;
3721 }
3722
3723- /* For non-periodic transfers, any status except -EINPROGRESS means
3724- * the HCD has already started to unlink this URB from the hardware.
3725- * In that case, there's no more work to do.
3726+ /* Any status except -EINPROGRESS means the HCD has already started
3727+ * to return this URB to the driver. In that case, there's no
3728+ * more work for us to do.
3729 *
3730- * For periodic transfers, this is the only way to trigger unlinking
3731- * from the hardware. Since we (currently) overload urb->status to
3732- * tell the driver to unlink, error status might get clobbered ...
3733- * unless that transfer hasn't yet restarted. One such case is when
3734- * the URB gets unlinked from its completion handler.
3735+ * There's much magic because of "automagic resubmit" of interrupt
3736+ * transfers, stopped only by explicit unlinking. We won't issue
3737+ * an "it's unlinked" callback more than once, but device drivers
3738+ * can need to retry (SMP, -EAGAIN) an unlink request as well as
3739+ * fake out the "not yet completed" state (set -EINPROGRESS) if
3740+ * unlinking from complete(). Automagic eventually vanishes.
3741 *
3742 * FIXME use an URB_UNLINKED flag to match URB_TIMEOUT_KILLED
3743 */
3744- switch (usb_pipetype (urb->pipe)) {
3745- case PIPE_CONTROL:
3746- case PIPE_BULK:
3747- if (urb->status != -EINPROGRESS) {
3748+ if (urb->status != -EINPROGRESS) {
3749+ if (usb_pipetype (urb->pipe) == PIPE_INTERRUPT)
3750+ retval = -EAGAIN;
3751+ else
3752 retval = -EINVAL;
3753- goto done;
3754- }
3755+ goto done;
3756 }
3757
3758 /* maybe set up to block on completion notification */
3759@@ -1340,7 +1350,7 @@
3760 && HCD_IS_RUNNING (hcd->state)
3761 && !retval) {
3762 dbg ("%s: wait for giveback urb %p",
3763- hcd->bus_name, urb);
3764+ hcd->bus->bus_name, urb);
3765 wait_for_completion (&splice.done);
3766 } else if ((urb->transfer_flags & USB_ASYNC_UNLINK) && retval == 0) {
3767 return -EINPROGRESS;
3768@@ -1352,7 +1362,7 @@
3769 bye:
3770 if (retval)
3771 dbg ("%s: hcd_unlink_urb fail %d",
3772- hcd ? hcd->bus_name : "(no bus?)",
3773+ hcd ? hcd->bus->bus_name : "(no bus?)",
3774 retval);
3775 return retval;
3776 }
3777@@ -1385,7 +1395,7 @@
3778 /* device driver problem with refcounts? */
3779 if (!list_empty (&dev->urb_list)) {
3780 dbg ("free busy dev, %s devnum %d (bug!)",
3781- hcd->bus_name, udev->devnum);
3782+ hcd->bus->bus_name, udev->devnum);
3783 return -EINVAL;
3784 }
3785
3786@@ -1460,6 +1470,18 @@
3787 dbg ("giveback urb %p status %d len %d",
3788 urb, urb->status, urb->actual_length);
3789
3790+ // NOTE: 2.5 does this if !URB_NO_DMA_MAP transfer flag
3791+ if (usb_pipecontrol (urb->pipe))
3792+ pci_unmap_single (hcd->pdev, urb->setup_dma,
3793+ sizeof (struct usb_ctrlrequest),
3794+ PCI_DMA_TODEVICE);
3795+ if (urb->transfer_buffer_length != 0)
3796+ pci_unmap_single (hcd->pdev, urb->transfer_dma,
3797+ urb->transfer_buffer_length,
3798+ usb_pipein (urb->pipe)
3799+ ? PCI_DMA_FROMDEVICE
3800+ : PCI_DMA_TODEVICE);
3801+
3802 /* pass ownership to the completion handler */
3803 urb->complete (urb);
3804 }
3805diff -Nru a/drivers/usb/hcd.h b/drivers/usb/hcd.h
3806--- a/drivers/usb/hcd.h Mon Oct 21 22:14:31 2002
3807+++ b/drivers/usb/hcd.h Mon Oct 21 22:14:31 2002
3808@@ -36,7 +36,6 @@
3809 struct usb_bus *bus; /* hcd is-a bus */
3810 struct list_head hcd_list;
3811
3812- const char *bus_name;
3813 const char *product_desc;
3814 const char *description; /* "ehci-hcd" etc */
3815
The Linux kernel (the core of the Linux operating system)
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