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Commit | Line | Data |
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8c9054af JP |
1 | The AFBC decoder used in the Rockchip VOP assumes the use of the |
2 | YUV-like colourspace transform (YTR). YTR is lossless for RGB(A) | |
3 | buffers, which covers the RGBA8 and RGB565 formats supported in | |
4 | vop_convert_afbc_format. Use of YTR is signaled with the | |
5 | AFBC_FORMAT_MOD_YTR modifier, which prior to this commit was missing. As | |
6 | such, a producer would have to generate buffers that do not use YTR, | |
7 | which the VOP would erroneously decode as YTR, leading to severe visual | |
8 | corruption. | |
9 | ||
10 | The upstream AFBC support was developed against a captured frame, which | |
11 | failed to exercise modifier support. Prior to bring-up of AFBC in Mesa | |
12 | (in the Panfrost driver), no open userspace respected modifier | |
13 | reporting. As such, this change is not expected to affect broken | |
14 | userspaces. | |
15 | ||
16 | Tested on RK3399 with Panfrost and Weston. | |
17 | ||
18 | Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig at collabora.com> | |
19 | --- | |
20 | drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 11 +++++++++++ | |
21 | 1 file changed, 11 insertions(+) | |
22 | ||
23 | diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h | |
24 | index 4a2099cb5..857d97cdc 100644 | |
25 | --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h | |
26 | +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h | |
27 | @@ -17,9 +17,20 @@ | |
28 | ||
29 | #define NUM_YUV2YUV_COEFFICIENTS 12 | |
30 | ||
31 | +/* AFBC supports a number of configurable modes. Relevant to us is block size | |
32 | + * (16x16 or 32x8), storage modifiers (SPARSE, SPLIT), and the YUV-like | |
33 | + * colourspace transform (YTR). 16x16 SPARSE mode is always used. SPLIT mode | |
34 | + * could be enabled via the hreg_block_split register, but is not currently | |
35 | + * handled. The colourspace transform is implicitly always assumed by the | |
36 | + * decoder, so consumers must use this transform as well. | |
37 | + * | |
38 | + * Failure to match modifiers will cause errors displaying AFBC buffers | |
39 | + * produced by conformant AFBC producers, including Mesa. | |
40 | + */ | |
41 | #define ROCKCHIP_AFBC_MOD \ | |
42 | DRM_FORMAT_MOD_ARM_AFBC( \ | |
43 | AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | AFBC_FORMAT_MOD_SPARSE \ | |
44 | + | AFBC_FORMAT_MOD_YTR \ | |
45 | ) | |
46 | ||
47 | enum vop_data_format { | |
48 | -- | |
49 | 2.28.0 | |
50 |