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Commit | Line | Data |
---|---|---|
52abe9db | 1 | diff -Nru a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S |
2 | --- a/arch/ppc/boot/common/util.S 2004-03-01 15:34:28 -08:00 | |
3 | +++ b/arch/ppc/boot/common/util.S 2004-10-07 11:15:16 -07:00 | |
4 | @@ -41,7 +41,7 @@ | |
5 | /* Test for a 601 */ | |
6 | mfpvr r10 | |
7 | srwi r10,r10,16 | |
8 | - cmpi 0,r10,1 /* 601 ? */ | |
9 | + cmpwi 0,r10,1 /* 601 ? */ | |
10 | beq .clearbats_601 | |
11 | ||
12 | /* Clear BATs */ | |
13 | @@ -117,9 +117,9 @@ | |
14 | /* Wait for the invalidation to complete */ | |
15 | mfspr r8,PVR | |
16 | srwi r8,r8,16 | |
17 | - cmpli cr0,r8,0x8000 /* 7450 */ | |
18 | - cmpli cr1,r8,0x8001 /* 7455 */ | |
19 | - cmpli cr2,r8,0x8002 /* 7457 */ | |
20 | + cmplwi cr0,r8,0x8000 /* 7450 */ | |
21 | + cmplwi cr1,r8,0x8001 /* 7455 */ | |
22 | + cmplwi cr2,r8,0x8002 /* 7457 */ | |
23 | cror 4*cr0+eq,4*cr0+eq,4*cr1+eq /* Now test if any are true. */ | |
24 | cror 4*cr0+eq,4*cr0+eq,4*cr2+eq | |
25 | bne 2f | |
26 | @@ -190,7 +190,7 @@ | |
27 | udelay: | |
28 | mfspr r4,PVR | |
29 | srwi r4,r4,16 | |
30 | - cmpi 0,r4,1 /* 601 ? */ | |
31 | + cmpwi 0,r4,1 /* 601 ? */ | |
32 | bne .udelay_not_601 | |
33 | 00: li r0,86 /* Instructions / microsecond? */ | |
34 | mtctr r0 | |
35 | @@ -213,16 +213,16 @@ | |
36 | 1: mftbu r5 | |
37 | mftb r6 | |
38 | mftbu r7 | |
39 | - cmp 0,r5,r7 | |
40 | + cmpw 0,r5,r7 | |
41 | bne 1b /* Get [synced] base time */ | |
42 | addc r9,r6,r4 /* Compute end time */ | |
43 | addze r8,r5 | |
44 | 2: mftbu r5 | |
45 | - cmp 0,r5,r8 | |
46 | + cmpw 0,r5,r8 | |
47 | blt 2b | |
48 | bgt 3f | |
49 | mftb r6 | |
50 | - cmp 0,r6,r9 | |
51 | + cmpw 0,r6,r9 | |
52 | blt 2b | |
53 | 3: blr | |
54 | ||
55 | diff -Nru a/arch/ppc/boot/openfirmware/misc.S b/arch/ppc/boot/openfirmware/misc.S | |
56 | --- a/arch/ppc/boot/openfirmware/misc.S 2003-08-25 05:13:38 -07:00 | |
57 | +++ b/arch/ppc/boot/openfirmware/misc.S 2004-10-07 12:17:53 -07:00 | |
58 | @@ -16,7 +16,7 @@ | |
59 | setup_bats: | |
60 | mfpvr 5 | |
61 | rlwinm 5,5,16,16,31 /* r3 = 1 for 601, 4 for 604 */ | |
62 | - cmpi 0,5,1 | |
63 | + cmpwi 0,5,1 | |
64 | li 0,0 | |
65 | bne 4f | |
66 | mtibatl 3,0 /* invalidate BAT first */ | |
67 | diff -Nru a/arch/ppc/boot/simple/misc.c b/arch/ppc/boot/simple/misc.c | |
68 | --- a/arch/ppc/boot/simple/misc.c 2004-09-07 23:33:06 -07:00 | |
69 | +++ b/arch/ppc/boot/simple/misc.c 2004-10-08 02:57:32 -07:00 | |
70 | @@ -94,7 +94,7 @@ | |
71 | #endif | |
72 | char *cp; | |
73 | struct bi_record *rec; | |
74 | - unsigned long initrd_loc, TotalMemory = 0; | |
75 | + unsigned long initrd_loc = 0, TotalMemory = 0; | |
76 | ||
77 | #ifdef CONFIG_SERIAL_8250_CONSOLE | |
78 | com_port = serial_init(0, NULL); | |
79 | diff -Nru a/arch/ppc/boot/simple/relocate.S b/arch/ppc/boot/simple/relocate.S | |
80 | --- a/arch/ppc/boot/simple/relocate.S 2004-04-02 19:13:47 -08:00 | |
81 | +++ b/arch/ppc/boot/simple/relocate.S 2004-10-07 12:17:13 -07:00 | |
82 | @@ -50,7 +50,7 @@ | |
83 | * Check if we need to relocate ourselves to the link addr or were | |
84 | * we loaded there to begin with. | |
85 | */ | |
86 | - cmp cr0,r3,r4 | |
87 | + cmpw cr0,r3,r4 | |
88 | beq start_ldr /* If 0, we don't need to relocate */ | |
89 | ||
90 | /* Move this code somewhere safe. This is max(load + size, end) | |
91 | @@ -122,7 +122,7 @@ | |
92 | GETSYM(r4, start) | |
93 | mr r3,r8 /* Get the load addr */ | |
94 | ||
95 | - cmp cr0,r4,r3 /* If we need to copy from the end, do so */ | |
96 | + cmpw cr0,r4,r3 /* If we need to copy from the end, do so */ | |
97 | bgt do_relocate_from_end | |
98 | ||
99 | do_relocate_from_start: | |
100 | @@ -165,7 +165,7 @@ | |
101 | subi r4,r4,4 | |
102 | li r0,0 | |
103 | 50: stwu r0,4(r3) | |
104 | - cmp cr0,r3,r4 | |
105 | + cmpw cr0,r3,r4 | |
106 | bne 50b | |
107 | 90: mr r9,r1 /* Save old stack pointer (in case it matters) */ | |
108 | lis r1,.stack@h | |
109 | diff -Nru a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S | |
110 | --- a/arch/ppc/kernel/cpu_setup_6xx.S 2004-08-26 02:16:36 -07:00 | |
111 | +++ b/arch/ppc/kernel/cpu_setup_6xx.S 2004-10-07 09:45:55 -07:00 | |
112 | @@ -172,9 +172,9 @@ | |
113 | setup_750cx: | |
114 | mfspr r10, SPRN_HID1 | |
115 | rlwinm r10,r10,4,28,31 | |
116 | - cmpi cr0,r10,7 | |
117 | - cmpi cr1,r10,9 | |
118 | - cmpi cr2,r10,11 | |
119 | + cmpwi cr0,r10,7 | |
120 | + cmpwi cr1,r10,9 | |
121 | + cmpwi cr2,r10,11 | |
122 | cror 4*cr0+eq,4*cr0+eq,4*cr1+eq | |
123 | cror 4*cr0+eq,4*cr0+eq,4*cr2+eq | |
124 | bnelr | |
125 | @@ -287,12 +287,12 @@ | |
126 | /* Now deal with CPU type dependent registers */ | |
127 | mfspr r3,PVR | |
128 | srwi r3,r3,16 | |
129 | - cmpli cr0,r3,0x8000 /* 7450 */ | |
130 | - cmpli cr1,r3,0x000c /* 7400 */ | |
131 | - cmpli cr2,r3,0x800c /* 7410 */ | |
132 | - cmpli cr3,r3,0x8001 /* 7455 */ | |
133 | - cmpli cr4,r3,0x8002 /* 7457 */ | |
134 | - cmpli cr5,r3,0x7000 /* 750FX */ | |
135 | + cmplwi cr0,r3,0x8000 /* 7450 */ | |
136 | + cmplwi cr1,r3,0x000c /* 7400 */ | |
137 | + cmplwi cr2,r3,0x800c /* 7410 */ | |
138 | + cmplwi cr3,r3,0x8001 /* 7455 */ | |
139 | + cmplwi cr4,r3,0x8002 /* 7457 */ | |
140 | + cmplwi cr5,r3,0x7000 /* 750FX */ | |
141 | /* cr1 is 7400 || 7410 */ | |
142 | cror 4*cr1+eq,4*cr1+eq,4*cr2+eq | |
143 | /* cr0 is 74xx */ | |
144 | @@ -323,7 +323,7 @@ | |
145 | /* If rev 2.x, backup HID2 */ | |
146 | mfspr r3,PVR | |
147 | andi. r3,r3,0xff00 | |
148 | - cmpi cr0,r3,0x0200 | |
149 | + cmpwi cr0,r3,0x0200 | |
150 | bne 1f | |
151 | mfspr r4,SPRN_HID2 | |
152 | stw r4,CS_HID2(r5) | |
153 | @@ -354,12 +354,12 @@ | |
154 | /* Now deal with CPU type dependent registers */ | |
155 | mfspr r3,PVR | |
156 | srwi r3,r3,16 | |
157 | - cmpli cr0,r3,0x8000 /* 7450 */ | |
158 | - cmpli cr1,r3,0x000c /* 7400 */ | |
159 | - cmpli cr2,r3,0x800c /* 7410 */ | |
160 | - cmpli cr3,r3,0x8001 /* 7455 */ | |
161 | - cmpli cr4,r3,0x8002 /* 7457 */ | |
162 | - cmpli cr5,r3,0x7000 /* 750FX */ | |
163 | + cmplwi cr0,r3,0x8000 /* 7450 */ | |
164 | + cmplwi cr1,r3,0x000c /* 7400 */ | |
165 | + cmplwi cr2,r3,0x800c /* 7410 */ | |
166 | + cmplwi cr3,r3,0x8001 /* 7455 */ | |
167 | + cmplwi cr4,r3,0x8002 /* 7457 */ | |
168 | + cmplwi cr5,r3,0x7000 /* 750FX */ | |
169 | /* cr1 is 7400 || 7410 */ | |
170 | cror 4*cr1+eq,4*cr1+eq,4*cr2+eq | |
171 | /* cr0 is 74xx */ | |
172 | @@ -412,7 +412,7 @@ | |
173 | /* If rev 2.x, restore HID2 with low voltage bit cleared */ | |
174 | mfspr r3,PVR | |
175 | andi. r3,r3,0xff00 | |
176 | - cmpi cr0,r3,0x0200 | |
177 | + cmpwi cr0,r3,0x0200 | |
178 | bne 4f | |
179 | lwz r4,CS_HID2(r5) | |
180 | rlwinm r4,r4,0,19,17 | |
181 | @@ -426,7 +426,7 @@ | |
182 | mftbl r5 | |
183 | 3: mftbl r6 | |
184 | sub r6,r6,r5 | |
185 | - cmpli cr0,r6,10000 | |
186 | + cmplwi cr0,r6,10000 | |
187 | ble 3b | |
188 | /* Setup final PLL */ | |
189 | mtspr SPRN_HID1,r4 | |
190 | diff -Nru a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S | |
191 | --- a/arch/ppc/kernel/entry.S 2004-06-17 23:41:08 -07:00 | |
192 | +++ b/arch/ppc/kernel/entry.S 2004-10-07 09:11:33 -07:00 | |
193 | @@ -206,7 +206,7 @@ | |
194 | andi. r11,r11,_TIF_SYSCALL_TRACE | |
195 | bne- syscall_dotrace | |
196 | syscall_dotrace_cont: | |
197 | - cmpli 0,r0,NR_syscalls | |
198 | + cmplwi 0,r0,NR_syscalls | |
199 | lis r10,sys_call_table@h | |
200 | ori r10,r10,sys_call_table@l | |
201 | slwi r0,r0,2 | |
202 | @@ -222,7 +222,7 @@ | |
203 | #endif | |
204 | mr r6,r3 | |
205 | li r11,-_LAST_ERRNO | |
206 | - cmpl 0,r3,r11 | |
207 | + cmplw 0,r3,r11 | |
208 | rlwinm r12,r1,0,0,18 /* current_thread_info() */ | |
209 | blt+ 30f | |
210 | lwz r11,TI_LOCAL_FLAGS(r12) | |
211 | diff -Nru a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S | |
212 | --- a/arch/ppc/kernel/head.S 2004-07-26 15:12:27 -07:00 | |
213 | +++ b/arch/ppc/kernel/head.S 2004-10-07 09:46:47 -07:00 | |
214 | @@ -800,7 +800,7 @@ | |
215 | tophys(r6,0) /* get __pa constant */ | |
216 | addis r3,r6,last_task_used_math@ha | |
217 | lwz r4,last_task_used_math@l(r3) | |
218 | - cmpi 0,r4,0 | |
219 | + cmpwi 0,r4,0 | |
220 | beq 1f | |
221 | add r4,r4,r6 | |
222 | addi r4,r4,THREAD /* want last_task_used_math->thread */ | |
223 | @@ -927,7 +927,7 @@ | |
224 | tophys(r6,0) | |
225 | addis r3,r6,last_task_used_altivec@ha | |
226 | lwz r4,last_task_used_altivec@l(r3) | |
227 | - cmpi 0,r4,0 | |
228 | + cmpwi 0,r4,0 | |
229 | beq 1f | |
230 | add r4,r4,r6 | |
231 | addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */ | |
232 | @@ -992,11 +992,11 @@ | |
233 | SYNC | |
234 | MTMSRD(r5) /* enable use of AltiVec now */ | |
235 | isync | |
236 | - cmpi 0,r3,0 | |
237 | + cmpwi 0,r3,0 | |
238 | beqlr- /* if no previous owner, done */ | |
239 | addi r3,r3,THREAD /* want THREAD of task */ | |
240 | lwz r5,PT_REGS(r3) | |
241 | - cmpi 0,r5,0 | |
242 | + cmpwi 0,r5,0 | |
243 | SAVE_32VR(0, r4, r3) | |
244 | mfvscr vr0 | |
245 | li r4,THREAD_VSCR | |
246 | @@ -1030,11 +1030,11 @@ | |
247 | MTMSRD(r5) /* enable use of fpu now */ | |
248 | SYNC_601 | |
249 | isync | |
250 | - cmpi 0,r3,0 | |
251 | + cmpwi 0,r3,0 | |
252 | beqlr- /* if no previous owner, done */ | |
253 | addi r3,r3,THREAD /* want THREAD of task */ | |
254 | lwz r5,PT_REGS(r3) | |
255 | - cmpi 0,r5,0 | |
256 | + cmpwi 0,r5,0 | |
257 | SAVE_32FPRS(0, r3) | |
258 | mffs fr0 | |
259 | stfd fr0,THREAD_FPSCR-4(r3) | |
15c18907 | 260 | @@ -1512,7 +1512,7 @@ |
261 | flush_tlbs: | |
262 | lis r10, 0x40 | |
263 | 1: addic. r10, r10, -0x1000 | |
264 | - tlbie r10 | |
265 | + tlbie r10,0 | |
266 | blt 1b | |
267 | sync | |
268 | blr | |
52abe9db | 269 | @@ -1539,7 +1539,7 @@ |
270 | #ifndef CONFIG_PPC64BRIDGE | |
271 | mfspr r9,PVR | |
272 | rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ | |
273 | - cmpi 0,r9,1 | |
274 | + cmpwi 0,r9,1 | |
275 | bne 4f | |
276 | ori r11,r11,4 /* set up BAT registers for 601 */ | |
277 | li r8,0x7f /* valid, block length = 8MB */ | |
278 | @@ -1591,7 +1591,7 @@ | |
279 | lwz r8,4(r8) | |
280 | mfspr r9,PVR | |
281 | rlwinm r9,r9,16,16,31 /* r9 = 1 for 601, 4 for 604 */ | |
282 | - cmpi 0,r9,1 | |
283 | + cmpwi 0,r9,1 | |
284 | beq 1f | |
285 | mtspr DBAT3L,r8 | |
286 | mtspr DBAT3U,r11 | |
6f115be7 | 287 | diff -Nru a/arch/ppc/kernel/head_e500.S b/arch/ppc/kernel/head_e500.S |
288 | --- a/arch/ppc/kernel/head_e500.S 2004-10-10 21:13:08.000000000 +0200 | |
289 | +++ b/arch/ppc/kernel/head_e500.S 2004-10-10 21:13:08.000000000 +0200 | |
290 | @@ -1057,7 +1057,7 @@ | |
291 | #ifndef CONFIG_SMP | |
292 | lis r3,last_task_used_spe@ha | |
293 | lwz r4,last_task_used_spe@l(r3) | |
294 | - cmpi 0,r4,0 | |
295 | + cmpwi 0,r4,0 | |
296 | beq 1f | |
297 | addi r4,r4,THREAD /* want THREAD of last_task_used_spe */ | |
298 | SAVE_32EVR(0,r10,r4) | |
299 | @@ -1167,11 +1167,11 @@ | |
300 | SYNC | |
301 | mtmsr r5 /* enable use of SPE now */ | |
302 | isync | |
303 | - cmpi 0,r3,0 | |
304 | + cmpwi 0,r3,0 | |
305 | beqlr- /* if no previous owner, done */ | |
306 | addi r3,r3,THREAD /* want THREAD of task */ | |
307 | lwz r5,PT_REGS(r3) | |
308 | - cmpi 0,r5,0 | |
309 | + cmpwi 0,r5,0 | |
310 | SAVE_32EVR(0, r4, r3) | |
311 | evxor evr6, evr6, evr6 /* clear out evr6 */ | |
312 | evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */ | |
52abe9db | 313 | diff -Nru a/arch/ppc/kernel/idle_6xx.S b/arch/ppc/kernel/idle_6xx.S |
314 | --- a/arch/ppc/kernel/idle_6xx.S 2003-09-22 17:12:45 -07:00 | |
315 | +++ b/arch/ppc/kernel/idle_6xx.S 2004-10-07 09:47:04 -07:00 | |
316 | @@ -79,12 +79,12 @@ | |
317 | /* Now check if user or arch enabled NAP mode */ | |
318 | lis r4,powersave_nap@ha | |
319 | lwz r4,powersave_nap@l(r4) | |
320 | - cmpi 0,r4,0 | |
321 | + cmpwi 0,r4,0 | |
322 | beq 1f | |
323 | lis r3,HID0_NAP@h | |
324 | 1: | |
325 | END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) | |
326 | - cmpi 0,r3,0 | |
327 | + cmpwi 0,r3,0 | |
328 | beqlr | |
329 | ||
330 | /* Clear MSR:EE */ | |
331 | @@ -133,7 +133,7 @@ | |
332 | /* Go to low speed mode on some 750FX */ | |
333 | lis r4,powersave_lowspeed@ha | |
334 | lwz r4,powersave_lowspeed@l(r4) | |
335 | - cmpi 0,r4,0 | |
336 | + cmpwi 0,r4,0 | |
337 | beq 1f | |
338 | mfspr r4,SPRN_HID1 | |
339 | oris r4,r4,0x0001 | |
340 | diff -Nru a/arch/ppc/kernel/idle_power4.S b/arch/ppc/kernel/idle_power4.S | |
341 | --- a/arch/ppc/kernel/idle_power4.S 2004-02-04 19:44:27 -08:00 | |
342 | +++ b/arch/ppc/kernel/idle_power4.S 2004-10-07 09:47:13 -07:00 | |
343 | @@ -56,7 +56,7 @@ | |
344 | /* Now check if user or arch enabled NAP mode */ | |
345 | lis r4,powersave_nap@ha | |
346 | lwz r4,powersave_nap@l(r4) | |
347 | - cmpi 0,r4,0 | |
348 | + cmpwi 0,r4,0 | |
349 | beqlr | |
350 | ||
351 | /* Clear MSR:EE */ | |
352 | diff -Nru a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S | |
353 | --- a/arch/ppc/kernel/misc.S 2004-08-17 10:42:55 -07:00 | |
354 | +++ b/arch/ppc/kernel/misc.S 2004-10-07 09:45:17 -07:00 | |
355 | @@ -214,7 +214,7 @@ | |
356 | mtmsr r0 | |
357 | ||
358 | /* If switching to PLL1, disable HID0:BTIC */ | |
359 | - cmpli cr0,r3,0 | |
360 | + cmplwi cr0,r3,0 | |
361 | beq 1f | |
362 | mfspr r5,HID0 | |
363 | rlwinm r5,r5,0,27,25 | |
364 | @@ -239,7 +239,7 @@ | |
365 | stw r4,nap_save_hid1@l(r6) | |
366 | ||
367 | /* If switching to PLL0, enable HID0:BTIC */ | |
368 | - cmpli cr0,r3,0 | |
369 | + cmplwi cr0,r3,0 | |
370 | bne 1f | |
371 | mfspr r5,HID0 | |
372 | ori r5,r5,HID0_BTIC | |
373 | @@ -470,7 +470,7 @@ | |
374 | ori r9,r9,mmu_hash_lock@l | |
375 | tophys(r9,r9) | |
376 | 10: lwarx r7,0,r9 | |
377 | - cmpi 0,r7,0 | |
378 | + cmpwi 0,r7,0 | |
379 | bne- 10b | |
380 | stwcx. r8,0,r9 | |
381 | bne- 10b | |
15c18907 | 382 | @@ -551,12 +551,12 @@ |
52abe9db | 383 | ori r9,r9,mmu_hash_lock@l |
384 | tophys(r9,r9) | |
385 | 10: lwarx r7,0,r9 | |
386 | - cmpi 0,r7,0 | |
387 | + cmpwi 0,r7,0 | |
388 | bne- 10b | |
389 | stwcx. r8,0,r9 | |
390 | bne- 10b | |
15c18907 | 391 | eieio |
392 | - tlbie r3 | |
393 | + tlbie r3,0 | |
394 | sync | |
395 | TLBSYNC | |
396 | li r0,0 | |
397 | @@ -565,7 +565,7 @@ | |
398 | SYNC_601 | |
399 | isync | |
400 | #else /* CONFIG_SMP */ | |
401 | - tlbie r3 | |
402 | + tlbie r3,0 | |
403 | sync | |
404 | #endif /* CONFIG_SMP */ | |
405 | #endif /* ! CONFIG_40x */ | |
52abe9db | 406 | @@ -599,7 +599,7 @@ |
407 | #else | |
408 | mfspr r3,PVR | |
409 | rlwinm r3,r3,16,16,31 | |
410 | - cmpi 0,r3,1 | |
411 | + cmpwi 0,r3,1 | |
412 | beqlr /* for 601, do nothing */ | |
413 | /* 603/604 processor - use invalidate-all bit in HID0 */ | |
414 | mfspr r3,HID0 | |
6f115be7 | 415 | @@ -619,7 +619,7 @@ |
416 | _GLOBAL(flush_icache_range) | |
417 | mfspr r5,PVR | |
418 | rlwinm r5,r5,16,16,31 | |
419 | - cmpi 0,r5,1 | |
420 | + cmpwi 0,r5,1 | |
421 | beqlr /* for 601, do nothing */ | |
422 | li r5,L1_CACHE_LINE_SIZE-1 | |
423 | andc r3,r3,r5 | |
424 | @@ -737,7 +737,7 @@ | |
425 | _GLOBAL(__flush_dcache_icache) | |
426 | mfspr r5,PVR | |
427 | rlwinm r5,r5,16,16,31 | |
428 | - cmpi 0,r5,1 | |
429 | + cmpwi 0,r5,1 | |
430 | beqlr /* for 601, do nothing */ | |
431 | rlwinm r3,r3,0,0,19 /* Get page base address */ | |
432 | li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */ | |
433 | @@ -766,7 +766,7 @@ | |
434 | _GLOBAL(__flush_dcache_icache_phys) | |
435 | mfspr r5,PVR | |
436 | rlwinm r5,r5,16,16,31 | |
437 | - cmpi 0,r5,1 | |
438 | + cmpwi 0,r5,1 | |
439 | beqlr /* for 601, do nothing */ | |
440 | mfmsr r10 | |
441 | rlwinm r0,r10,0,28,26 /* clear DR */ | |
52abe9db | 442 | @@ -1141,7 +1141,7 @@ |
443 | li r4,0 /* new sp (unused) */ | |
444 | li r0,__NR_clone | |
445 | sc | |
446 | - cmpi 0,r3,0 /* parent or child? */ | |
447 | + cmpwi 0,r3,0 /* parent or child? */ | |
448 | bne 1f /* return if parent */ | |
449 | li r0,0 /* make top-level stack frame */ | |
450 | stwu r0,-16(r1) | |
15c18907 | 451 | @@ -1439,7 +1439,7 @@ |
452 | .long sys_ni_syscall /* 255 - rtas (used on ppc64) */ | |
453 | .long sys_ni_syscall /* 256 reserved for sys_debug_setcontext */ | |
454 | .long sys_ni_syscall /* 257 reserved for vserver */ | |
455 | - .long sys_ni_syscall /* 258 reserved for new sys_remap_file_pages */ | |
456 | + .long sys_ni_syscall /* 258 reserved for new sys_remap_file_page | |
457 | .long sys_ni_syscall /* 259 reserved for new sys_mbind */ | |
458 | .long sys_ni_syscall /* 260 reserved for new sys_get_mempolicy */ | |
459 | .long sys_ni_syscall /* 261 reserved for new sys_set_mempolicy */ | |
52abe9db | 460 | diff -Nru a/arch/ppc/kernel/signal.c b/arch/ppc/kernel/signal.c |
461 | --- a/arch/ppc/kernel/signal.c 2004-08-25 10:13:41 -07:00 | |
462 | +++ b/arch/ppc/kernel/signal.c 2004-10-05 23:05:22 -07:00 | |
463 | @@ -270,7 +270,7 @@ | |
464 | static int | |
465 | restore_user_regs(struct pt_regs *regs, struct mcontext __user *sr, int sig) | |
466 | { | |
467 | - unsigned long save_r2; | |
468 | + unsigned long save_r2 = 0; | |
469 | #if defined(CONFIG_ALTIVEC) || defined(CONFIG_SPE) | |
470 | unsigned long msr; | |
471 | #endif | |
472 | diff -Nru a/arch/ppc/lib/checksum.S b/arch/ppc/lib/checksum.S | |
473 | --- a/arch/ppc/lib/checksum.S 2002-09-15 21:51:59 -07:00 | |
474 | +++ b/arch/ppc/lib/checksum.S 2004-10-07 09:13:16 -07:00 | |
475 | @@ -80,13 +80,13 @@ | |
476 | adde r0,r0,r5 /* be unnecessary to unroll this loop */ | |
477 | bdnz 2b | |
478 | andi. r4,r4,3 | |
479 | -3: cmpi 0,r4,2 | |
480 | +3: cmpwi 0,r4,2 | |
481 | blt+ 4f | |
482 | lhz r5,4(r3) | |
483 | addi r3,r3,2 | |
484 | subi r4,r4,2 | |
485 | adde r0,r0,r5 | |
486 | -4: cmpi 0,r4,1 | |
487 | +4: cmpwi 0,r4,1 | |
488 | bne+ 5f | |
489 | lbz r5,4(r3) | |
490 | slwi r5,r5,8 /* Upper byte of word */ | |
491 | @@ -143,7 +143,7 @@ | |
492 | adde r0,r0,r9 | |
493 | bdnz 82b | |
494 | 13: andi. r5,r5,3 | |
495 | -3: cmpi 0,r5,2 | |
496 | +3: cmpwi 0,r5,2 | |
497 | blt+ 4f | |
498 | 83: lhz r6,4(r3) | |
499 | addi r3,r3,2 | |
500 | @@ -151,7 +151,7 @@ | |
501 | 93: sth r6,4(r4) | |
502 | addi r4,r4,2 | |
503 | adde r0,r0,r6 | |
504 | -4: cmpi 0,r5,1 | |
505 | +4: cmpwi 0,r5,1 | |
506 | bne+ 5f | |
507 | 84: lbz r6,4(r3) | |
508 | 94: stb r6,4(r4) | |
509 | @@ -188,7 +188,7 @@ | |
510 | 97: stbu r6,1(r4) | |
511 | bdnz 97b | |
512 | src_error: | |
513 | - cmpi 0,r7,0 | |
514 | + cmpwi 0,r7,0 | |
515 | beq 1f | |
516 | li r6,-EFAULT | |
517 | stw r6,0(r7) | |
518 | @@ -196,7 +196,7 @@ | |
519 | blr | |
520 | ||
521 | dst_error: | |
522 | - cmpi 0,r8,0 | |
523 | + cmpwi 0,r8,0 | |
524 | beq 1f | |
525 | li r6,-EFAULT | |
526 | stw r6,0(r8) | |
527 | diff -Nru a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c | |
528 | --- a/arch/ppc/mm/44x_mmu.c 2004-08-07 11:05:38 -07:00 | |
529 | +++ b/arch/ppc/mm/44x_mmu.c 2004-10-05 23:05:22 -07:00 | |
530 | @@ -72,7 +72,7 @@ | |
531 | static void __init | |
532 | ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys) | |
533 | { | |
534 | - unsigned long attrib; | |
535 | + unsigned long attrib = 0; | |
536 | ||
537 | __asm__ __volatile__("\ | |
538 | clrrwi %2,%2,10\n\ | |
539 | diff -Nru a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c | |
540 | --- a/arch/ppc/platforms/pmac_pci.c 2004-09-28 21:05:15 -07:00 | |
541 | +++ b/arch/ppc/platforms/pmac_pci.c 2004-08-16 21:18:09 -07:00 | |
542 | @@ -316,6 +316,10 @@ | |
543 | unsigned int addr; | |
544 | int i; | |
545 | ||
546 | + struct device_node *np = pci_busdev_to_OF_node(bus, devfn); | |
547 | + if (np == NULL) | |
548 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
549 | + | |
550 | /* | |
551 | * When a device in K2 is powered down, we die on config | |
552 | * cycle accesses. Fix that here. | |
553 | @@ -363,6 +367,9 @@ | |
554 | unsigned int addr; | |
555 | int i; | |
556 | ||
557 | + struct device_node *np = pci_busdev_to_OF_node(bus, devfn); | |
558 | + if (np == NULL) | |
559 | + return PCIBIOS_DEVICE_NOT_FOUND; | |
560 | /* | |
561 | * When a device in K2 is powered down, we die on config | |
562 | * cycle accesses. Fix that here. | |
563 | diff -Nru a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c | |
564 | --- a/arch/ppc/syslib/ppc4xx_pic.c 2004-07-01 22:23:47 -07:00 | |
565 | +++ b/arch/ppc/syslib/ppc4xx_pic.c 2004-10-05 23:05:22 -07:00 | |
566 | @@ -256,7 +256,7 @@ | |
567 | ppc4xx_uic_end(unsigned int irq) | |
568 | { | |
569 | int bit, word; | |
570 | - unsigned int tr_bits; | |
571 | + unsigned int tr_bits = 0; | |
572 | ||
573 | bit = irq & 0x1f; | |
574 | word = irq >> 5; | |
575 | diff -Nru a/arch/ppc/syslib/todc_time.c b/arch/ppc/syslib/todc_time.c | |
576 | --- a/arch/ppc/syslib/todc_time.c 2004-03-02 10:54:26 -08:00 | |
577 | +++ b/arch/ppc/syslib/todc_time.c 2004-10-05 23:05:22 -07:00 | |
578 | @@ -277,9 +277,9 @@ | |
579 | ulong | |
580 | todc_get_rtc_time(void) | |
581 | { | |
582 | - uint year, mon, day, hour, min, sec; | |
583 | + uint year = 0, mon = 0, day = 0, hour = 0, min = 0, sec = 0; | |
584 | uint limit, i; | |
585 | - u_char save_control, uip; | |
586 | + u_char save_control, uip = 0; | |
587 | ||
588 | spin_lock(&rtc_lock); | |
589 | save_control = todc_read_val(todc_info->control_a); | |
590 | @@ -361,7 +361,7 @@ | |
591 | todc_set_rtc_time(unsigned long nowtime) | |
592 | { | |
593 | struct rtc_time tm; | |
594 | - u_char save_control, save_freq_select; | |
595 | + u_char save_control, save_freq_select = 0; | |
596 | ||
597 | spin_lock(&rtc_lock); | |
598 | to_tm(nowtime, &tm); | |
599 | @@ -416,7 +416,7 @@ | |
600 | */ | |
601 | static unsigned char __init todc_read_timereg(int addr) | |
602 | { | |
603 | - unsigned char save_control, val; | |
604 | + unsigned char save_control = 0, val; | |
605 | ||
606 | switch (todc_info->rtc_type) { | |
607 | case TODC_TYPE_DS1557: | |
608 | diff -Nru a/arch/ppc64/kernel/ItLpQueue.c b/arch/ppc64/kernel/ItLpQueue.c | |
609 | --- a/arch/ppc64/kernel/ItLpQueue.c 2004-07-01 22:23:46 -07:00 | |
610 | +++ b/arch/ppc64/kernel/ItLpQueue.c 2004-10-07 11:48:51 -07:00 | |
611 | @@ -25,7 +25,7 @@ | |
612 | ||
613 | __asm__ __volatile__("\n\ | |
614 | 1: lwarx %0,0,%2 \n\ | |
615 | - cmpi 0,%0,0 \n\ | |
616 | + cmpwi 0,%0,0 \n\ | |
617 | li %0,0 \n\ | |
618 | bne- 2f \n\ | |
619 | addi %0,%0,1 \n\ | |
620 | diff -Nru a/arch/ppc64/kernel/entry.S b/arch/ppc64/kernel/entry.S | |
621 | --- a/arch/ppc64/kernel/entry.S 2004-09-21 00:22:33 -07:00 | |
622 | +++ b/arch/ppc64/kernel/entry.S 2004-10-07 14:52:16 -07:00 | |
623 | @@ -122,7 +122,7 @@ | |
624 | andi. r11,r10,_TIF_SYSCALL_T_OR_A | |
625 | bne- syscall_dotrace | |
626 | syscall_dotrace_cont: | |
627 | - cmpli 0,r0,NR_syscalls | |
628 | + cmpldi 0,r0,NR_syscalls | |
629 | bge- syscall_enosys | |
630 | ||
631 | system_call: /* label this so stack traces look sane */ | |
632 | @@ -204,7 +204,7 @@ | |
633 | ||
634 | syscall_error: | |
635 | lbz r11,TI_SC_NOERR(r12) | |
636 | - cmpi 0,r11,0 | |
637 | + cmpwi 0,r11,0 | |
638 | bne- syscall_error_cont | |
639 | neg r3,r3 | |
640 | oris r5,r5,0x1000 /* Set SO bit in CR */ | |
641 | diff -Nru a/arch/ppc64/kernel/idle_power4.S b/arch/ppc64/kernel/idle_power4.S | |
642 | --- a/arch/ppc64/kernel/idle_power4.S 2004-02-11 19:47:50 -08:00 | |
643 | +++ b/arch/ppc64/kernel/idle_power4.S 2004-10-07 14:52:16 -07:00 | |
644 | @@ -46,7 +46,7 @@ | |
645 | /* Now check if user or arch enabled NAP mode */ | |
646 | LOADBASE(r3,powersave_nap) | |
647 | lwz r4,powersave_nap@l(r3) | |
648 | - cmpi 0,r4,0 | |
649 | + cmpwi 0,r4,0 | |
650 | beqlr | |
651 | ||
652 | /* Clear MSR:EE */ | |
653 | diff -Nru a/arch/ppc64/kernel/misc.S b/arch/ppc64/kernel/misc.S | |
654 | --- a/arch/ppc64/kernel/misc.S 2004-09-26 22:36:58 -07:00 | |
655 | +++ b/arch/ppc64/kernel/misc.S 2004-10-07 14:52:16 -07:00 | |
656 | @@ -670,7 +670,7 @@ | |
657 | li r4,0 /* new sp (unused) */ | |
658 | li r0,__NR_clone | |
659 | sc | |
660 | - cmpi 0,r3,0 /* parent or child? */ | |
661 | + cmpdi 0,r3,0 /* parent or child? */ | |
662 | bne 1f /* return if parent */ | |
663 | li r0,0 | |
664 | stdu r0,-STACK_FRAME_OVERHEAD(r1) | |
665 | diff -Nru a/arch/ppc64/lib/checksum.S b/arch/ppc64/lib/checksum.S | |
666 | --- a/arch/ppc64/lib/checksum.S 2002-09-17 16:32:53 -07:00 | |
667 | +++ b/arch/ppc64/lib/checksum.S 2004-10-07 15:38:13 -07:00 | |
668 | @@ -92,19 +92,19 @@ | |
669 | adde r5,r5,r6 | |
670 | bdnz 2b | |
671 | andi. r4,r4,7 /* compute bytes left to sum after doublewords */ | |
672 | -3: cmpi 0,r4,4 /* is at least a full word left? */ | |
673 | +3: cmpwi 0,r4,4 /* is at least a full word left? */ | |
674 | blt 4f | |
675 | lwz r6,8(r3) /* sum this word */ | |
676 | addi r3,r3,4 | |
677 | subi r4,r4,4 | |
678 | adde r5,r5,r6 | |
679 | -4: cmpi 0,r4,2 /* is at least a halfword left? */ | |
680 | +4: cmpwi 0,r4,2 /* is at least a halfword left? */ | |
681 | blt+ 5f | |
682 | lhz r6,8(r3) /* sum this halfword */ | |
683 | addi r3,r3,2 | |
684 | subi r4,r4,2 | |
685 | adde r5,r5,r6 | |
686 | -5: cmpi 0,r4,1 /* is at least a byte left? */ | |
687 | +5: cmpwi 0,r4,1 /* is at least a byte left? */ | |
688 | bne+ 6f | |
689 | lbz r6,8(r3) /* sum this byte */ | |
690 | slwi r6,r6,8 /* this byte is assumed to be the upper byte of a halfword */ | |
691 | @@ -150,7 +150,7 @@ | |
692 | adde r0,r0,r6 | |
693 | bdnz 82b | |
694 | andi. r5,r5,3 | |
695 | -3: cmpi 0,r5,2 | |
696 | +3: cmpwi 0,r5,2 | |
697 | blt+ 4f | |
698 | 83: lhz r6,4(r3) | |
699 | addi r3,r3,2 | |
700 | @@ -158,7 +158,7 @@ | |
701 | 93: sth r6,4(r4) | |
702 | addi r4,r4,2 | |
703 | adde r0,r0,r6 | |
704 | -4: cmpi 0,r5,1 | |
705 | +4: cmpwi 0,r5,1 | |
706 | bne+ 5f | |
707 | 84: lbz r6,4(r3) | |
708 | 94: stb r6,4(r4) | |
709 | @@ -198,7 +198,7 @@ | |
710 | bdnz 97b | |
711 | .globl src_error | |
712 | src_error: | |
713 | - cmpi 0,r7,0 | |
714 | + cmpdi 0,r7,0 | |
715 | beq 1f | |
716 | li r6,-EFAULT | |
717 | stw r6,0(r7) | |
718 | @@ -207,7 +207,7 @@ | |
719 | ||
720 | .globl dst_error | |
721 | dst_error: | |
722 | - cmpi 0,r8,0 | |
723 | + cmpdi 0,r8,0 | |
724 | beq 1f | |
725 | li r6,-EFAULT | |
726 | stw r6,0(r8) | |
727 | diff -Nru a/arch/ppc64/mm/hash_low.S b/arch/ppc64/mm/hash_low.S | |
728 | --- a/arch/ppc64/mm/hash_low.S 2004-08-23 23:49:57 -07:00 | |
729 | +++ b/arch/ppc64/mm/hash_low.S 2004-10-07 14:52:16 -07:00 | |
730 | @@ -172,9 +172,9 @@ | |
731 | li r9,0 | |
732 | _GLOBAL(htab_call_hpte_insert1) | |
733 | bl . /* Will be patched by htab_finish_init() */ | |
734 | - cmpi 0,r3,0 | |
735 | + cmpdi 0,r3,0 | |
736 | bge htab_pte_insert_ok /* Insertion successful */ | |
737 | - cmpi 0,r3,-2 /* Critical failure */ | |
738 | + cmpdi 0,r3,-2 /* Critical failure */ | |
739 | beq- htab_pte_insert_failure | |
740 | ||
741 | /* Now try secondary slot */ | |
742 | @@ -194,9 +194,9 @@ | |
743 | li r9,0 | |
744 | _GLOBAL(htab_call_hpte_insert2) | |
745 | bl . /* Will be patched by htab_finish_init() */ | |
746 | - cmpi 0,r3,0 | |
747 | + cmpdi 0,r3,0 | |
748 | bge+ htab_pte_insert_ok /* Insertion successful */ | |
749 | - cmpi 0,r3,-2 /* Critical failure */ | |
750 | + cmpdi 0,r3,-2 /* Critical failure */ | |
751 | beq- htab_pte_insert_failure | |
752 | ||
753 | /* Both are full, we need to evict something */ | |
15c18907 | 754 | diff -Nru a/include/asm-ppc/ppc_asm.h b/include/asm-ppc/ppc_asm.h |
755 | --- a/include/asm-ppc/ppc_asm.h 2004-10-11 10:15:51.000000000 +0200 | |
756 | +++ b/include/asm-ppc/ppc_asm.h 2004-10-11 10:15:51.000000000 +0200 | |
757 | @@ -116,7 +116,7 @@ | |
758 | li r4,1024; \ | |
759 | mtctr r4; \ | |
760 | lis r4,KERNELBASE@h; \ | |
761 | -0: tlbie r4; \ | |
762 | +0: tlbie r4,0; \ | |
763 | addi r4,r4,0x1000; \ | |
764 | bdnz 0b | |
765 | #endif | |
766 | diff -Nru a/arch/ppc/mm/hashtable.S b/arch/ppc/mm/hashtable.S | |
767 | --- a/arch/ppc/mm/hashtable.S 2004-10-11 10:21:10.000000000 +0200 | |
768 | +++ b/arch/ppc/mm/hashtable.S 2004-10-11 10:21:10.000000000 +0200 | |
769 | @@ -375,7 +375,7 @@ | |
770 | */ | |
771 | andi. r6,r6,_PAGE_HASHPTE | |
772 | beq+ 10f /* no PTE: go look for an empty slot */ | |
773 | - tlbie r4 | |
774 | + tlbie r4,0 | |
775 | ||
776 | addis r4,r7,htab_hash_searches@ha | |
777 | lwz r6,htab_hash_searches@l(r4) | |
778 | @@ -616,7 +616,7 @@ | |
779 | 3: li r0,0 | |
780 | STPTE r0,0(r12) /* invalidate entry */ | |
781 | 4: sync | |
782 | - tlbie r4 /* in hw tlb too */ | |
783 | + tlbie r4,0 /* in hw tlb too */ | |
784 | sync | |
785 | ||
786 | 8: ble cr1,9f /* if all ptes checked */ | |
787 | diff -Nru a/arch/ppc/platforms/pmac_sleep.S b/arch/ppc/platforms/pmac_sleep.S | |
788 | --- a/arch/ppc/platforms/pmac_sleep.S 2004-10-11 10:21:11.000000000 +0200 | |
789 | +++ b/arch/ppc/platforms/pmac_sleep.S 2004-10-11 10:21:11.000000000 +0200 | |
790 | @@ -339,7 +339,7 @@ | |
791 | /* Flush all TLBs */ | |
792 | lis r4,0x1000 | |
793 | 1: addic. r4,r4,-0x1000 | |
794 | - tlbie r4 | |
795 | + tlbie r4,0 | |
796 | blt 1b | |
797 | sync | |
798 | ||
799 | diff -Nru a/arch/ppc/power/cpu_reg.S b/arch/ppc/power/cpu_reg.S | |
800 | --- a/arch/ppc/power/cpu_reg.S 2004-10-11 10:21:11.000000000 +0200 | |
801 | +++ b/arch/ppc/power/cpu_reg.S 2004-10-11 10:21:11.000000000 +0200 | |
802 | @@ -242,7 +242,7 @@ | |
803 | /* Flush all TLBs */;\ | |
804 | lis r4,0x1000;\ | |
805 | 1: addic. r4,r4,-0x1000;\ | |
806 | - tlbie r4;\ | |
807 | + tlbie r4,0;\ | |
808 | blt 1b;\ | |
809 | sync;\ | |
810 | ;\ |