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1From c250320bf1cb656c39abebac06ae2f56e36b7e78 Mon Sep 17 00:00:00 2001
2From: Eric Anholt <eric@anholt.net>
3Date: Wed, 3 Jun 2009 07:26:58 +0000
4Subject: [PATCH] drm/i915: Save/restore cursor state on suspend/resume.
5
6This may fix cursor corruption in X on resume, which would persist until
7the cursor was hidden and then shown again.
8
9V2: Also include the cursor control regs.
10
11Signed-off-by: Eric Anholt <eric@anholt.net>
12Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
13(cherry picked from commit 1fd1c624362819ecc36db2458c6a972c48ae92d6)
14---
15 drivers/gpu/drm/i915/i915_drv.h | 8 ++++++++
16 drivers/gpu/drm/i915/i915_suspend.c | 20 ++++++++++++++++++++
17 2 files changed, 28 insertions(+), 0 deletions(-)
18
19diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
20index c431fa5..fcaa544 100644
21--- a/drivers/gpu/drm/i915/i915_drv.h
22+++ b/drivers/gpu/drm/i915/i915_drv.h
23@@ -285,6 +285,13 @@ typedef struct drm_i915_private {
24 u8 saveDACMASK;
25 u8 saveCR[37];
26 uint64_t saveFENCE[16];
27+ u32 saveCURACNTR;
28+ u32 saveCURAPOS;
29+ u32 saveCURABASE;
30+ u32 saveCURBCNTR;
31+ u32 saveCURBPOS;
32+ u32 saveCURBBASE;
33+ u32 saveCURSIZE;
34
35 struct {
36 struct drm_mm gtt_space;
37@@ -642,6 +649,7 @@ void i915_gem_detach_phys_object(struct drm_device *dev,
38 void i915_gem_free_all_phys_object(struct drm_device *dev);
39 int i915_gem_object_get_pages(struct drm_gem_object *obj);
40 void i915_gem_object_put_pages(struct drm_gem_object *obj);
41+void i915_gem_release(struct drm_device * dev, struct drm_file *file_priv);
42
43 /* i915_gem_tiling.c */
44 void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
45diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
46index ce8a213..a98e283 100644
47--- a/drivers/gpu/drm/i915/i915_suspend.c
48+++ b/drivers/gpu/drm/i915/i915_suspend.c
49@@ -295,6 +295,16 @@ int i915_save_state(struct drm_device *dev)
50 i915_save_palette(dev, PIPE_B);
51 dev_priv->savePIPEBSTAT = I915_READ(PIPEBSTAT);
52
53+ /* Cursor state */
54+ dev_priv->saveCURACNTR = I915_READ(CURACNTR);
55+ dev_priv->saveCURAPOS = I915_READ(CURAPOS);
56+ dev_priv->saveCURABASE = I915_READ(CURABASE);
57+ dev_priv->saveCURBCNTR = I915_READ(CURBCNTR);
58+ dev_priv->saveCURBPOS = I915_READ(CURBPOS);
59+ dev_priv->saveCURBBASE = I915_READ(CURBBASE);
60+ if (!IS_I9XX(dev))
61+ dev_priv->saveCURSIZE = I915_READ(CURSIZE);
62+
63 /* CRT state */
64 dev_priv->saveADPA = I915_READ(ADPA);
65
66@@ -480,6 +490,16 @@ int i915_restore_state(struct drm_device *dev)
67 I915_WRITE(DSPBCNTR, dev_priv->saveDSPBCNTR);
68 I915_WRITE(DSPBADDR, I915_READ(DSPBADDR));
69
70+ /* Cursor state */
71+ I915_WRITE(CURAPOS, dev_priv->saveCURAPOS);
72+ I915_WRITE(CURACNTR, dev_priv->saveCURACNTR);
73+ I915_WRITE(CURABASE, dev_priv->saveCURABASE);
74+ I915_WRITE(CURBPOS, dev_priv->saveCURBPOS);
75+ I915_WRITE(CURBCNTR, dev_priv->saveCURBCNTR);
76+ I915_WRITE(CURBBASE, dev_priv->saveCURBBASE);
77+ if (!IS_I9XX(dev))
78+ I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
79+
80 /* CRT state */
81 I915_WRITE(ADPA, dev_priv->saveADPA);
82
83--
841.5.4.5
85
86
87From 9ade9105535556fbbb2ac29dfddbadeee4c15b0e Mon Sep 17 00:00:00 2001
88From: Jarod Wilson <jarod@redhat.com>
89Date: Wed, 27 May 2009 17:20:39 -0400
90Subject: [PATCH] drm/i915: add ignore lvds quirk info for AOpen Mini PC
91
92Fix a FIXME in the intel LVDS bring-up code, adding the appropriate
93blacklist entry for the AOpen Mini PC, courtesy of a dmidecode
94dump from Florian Demmer.
95
96Signed-off-by: Jarod Wilson <jarod@redhat.com>
97CC: Florian Demmer <florian@demmer.org>
98Signed-off-by: Eric Anholt <eric@anholt.net>
99(cherry picked from commit 70aa96ca2d8d938fc036ef8fd189b0151f4fc3ba)
100---
101 drivers/gpu/drm/i915/intel_lvds.c | 10 ++++++++--
102 1 files changed, 8 insertions(+), 2 deletions(-)
103
104diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
105index 53cccfa..ecbaa0f 100644
106--- a/drivers/gpu/drm/i915/intel_lvds.c
107+++ b/drivers/gpu/drm/i915/intel_lvds.c
108@@ -420,8 +420,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
109 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
110 },
111 },
112-
113- /* FIXME: add a check for the Aopen Mini PC */
114+ {
115+ .callback = intel_no_lvds_dmi_callback,
116+ .ident = "AOpen Mini PC",
117+ .matches = {
118+ DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
119+ DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
120+ },
121+ },
122
123 { } /* terminating entry */
124 };
125--
1261.5.4.5
127
128
129From 38d9e61c921dd1e14e3135df5ad7d5d4d7e45ffe Mon Sep 17 00:00:00 2001
130From: Jesse Barnes <jbarnes@virtuousgeek.org>
131Date: Tue, 5 May 2009 13:13:16 -0700
132Subject: [PATCH] drm/i915: apply G45 vblank count code to all G4x chips and fix max_frame_count
133
134All G4x and newer chips use the new style frame count register, with a
135full 32 bit frame count. Update the code to reflect this.
136
137Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
138Signed-off-by: Eric Anholt <eric@anholt.net>
139(cherry picked from commit 42c2798b35b95c471877133e19ccc3cab00e9b65)
140---
141 drivers/gpu/drm/i915/i915_dma.c | 5 ++++-
142 drivers/gpu/drm/i915/i915_irq.c | 2 --
143 2 files changed, 4 insertions(+), 3 deletions(-)
144
145diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
146index 0ccb63e..bb58797 100644
147--- a/drivers/gpu/drm/i915/i915_dma.c
148+++ b/drivers/gpu/drm/i915/i915_dma.c
149@@ -1153,8 +1153,11 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
150 #endif
151
152 dev->driver->get_vblank_counter = i915_get_vblank_counter;
153- if (IS_GM45(dev))
154+ dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
155+ if (IS_G4X(dev)) {
156+ dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
157 dev->driver->get_vblank_counter = gm45_get_vblank_counter;
158+ }
159
160 i915_gem_load(dev);
161
162diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
163index 98bb4c8..8ee0969 100644
164--- a/drivers/gpu/drm/i915/i915_irq.c
165+++ b/drivers/gpu/drm/i915/i915_irq.c
166@@ -572,8 +572,6 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
167
168 dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
169
170- dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
171-
172 /* Unmask the interrupts that we always want on. */
173 dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX;
174
175--
1761.5.4.5
177
178
179From 61731f5a5cb17a9535d08a4727e255cd2ff3d529 Mon Sep 17 00:00:00 2001
180From: Jesse Barnes <jbarnes@virtuousgeek.org>
181Date: Fri, 15 May 2009 14:11:48 -0700
182Subject: [PATCH] drm/i915: avoid non-atomic sysrq execution
183
184The sysrq functions are executed in hardirq context, so we shouldn't be
185calling sleeping functions from them, like mutex_locks or memory
186allocations.
187
188Fix up the i915 sysrq handler to avoid this.
189
190Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
191Signed-off-by: Eric Anholt <eric@anholt.net>
192(cherry picked from commit b66d18ddb16603d1e1ec39cb2ff3abf3fd212180)
193---
194 drivers/gpu/drm/i915/intel_fb.c | 8 +++++++-
195 1 files changed, 7 insertions(+), 1 deletions(-)
196
197diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
198index e4652dc..7a66b91 100644
199--- a/drivers/gpu/drm/i915/intel_fb.c
200+++ b/drivers/gpu/drm/i915/intel_fb.c
201@@ -857,9 +857,15 @@ void intelfb_restore(void)
202 drm_crtc_helper_set_config(&kernelfb_mode);
203 }
204
205+static void intelfb_restore_work_fn(struct work_struct *ignored)
206+{
207+ intelfb_restore();
208+}
209+static DECLARE_WORK(intelfb_restore_work, intelfb_restore_work_fn);
210+
211 static void intelfb_sysrq(int dummy1, struct tty_struct *dummy3)
212 {
213- intelfb_restore();
214+ schedule_work(&intelfb_restore_work);
215 }
216
217 static struct sysrq_key_op sysrq_intelfb_restore_op = {
218--
2191.5.4.5
220
221
222From 0025e6e6dd0878f145659a7fa185c1c41ff823c1 Mon Sep 17 00:00:00 2001
223From: Michael Cousin <mika.cousin@gmail.com>
224Date: Fri, 5 Jun 2009 21:16:22 +0200
225Subject: [PATCH] drm/i915: Skip lvds with Aopen i945GTt-VFA
226
227Signed-off-by: Michael Cousin <mika.cousin@gmail.com>
228Signed-off-by: Eric Anholt <eric@anholt.net>
229(cherry picked from commit fa0864b26b4bfa1dd4bb78eeffbc1f398cb56425)
230---
231 drivers/gpu/drm/i915/intel_lvds.c | 7 +++++++
232 1 files changed, 7 insertions(+), 0 deletions(-)
233
234diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
235index ecbaa0f..1e06379 100644
236--- a/drivers/gpu/drm/i915/intel_lvds.c
237+++ b/drivers/gpu/drm/i915/intel_lvds.c
238@@ -428,6 +428,13 @@ static const struct dmi_system_id intel_no_lvds[] = {
239 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
240 },
241 },
242+ {
243+ .callback = intel_no_lvds_dmi_callback,
244+ .ident = "Aopen i945GTt-VFA",
245+ .matches = {
246+ DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
247+ },
248+ },
249
250 { } /* terminating entry */
251 };
252--
2531.5.4.5
254
255
256From 189e96a590446c03977d1f1563290c75266ecacc Mon Sep 17 00:00:00 2001
257From: Keith Packard <keithp@keithp.com>
258Date: Fri, 5 Jun 2009 18:19:56 -0700
259Subject: [PATCH] drm/i915: Hook connector to encoder during load detection (fixes tv/vga detect)
260
261With the DRM-driven DPMS code, encoders are considered idle unless a
262connector is hooked to them, so mode setting is skipped. This makes load
263detection fail as none of the hardware is enabled.
264
265Signed-off-by: Keith Packard <keithp@keithp.com>
266Signed-off-by: Eric Anholt <eric@anholt.net>
267(cherry picked from commit 03d6069912babc07a3da20e715dd6a5dc8f0f867)
268---
269 drivers/gpu/drm/i915/intel_display.c | 2 ++
270 1 files changed, 2 insertions(+), 0 deletions(-)
271
272diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
273index c9d6f10..5469f2c 100644
274--- a/drivers/gpu/drm/i915/intel_display.c
275+++ b/drivers/gpu/drm/i915/intel_display.c
276@@ -1590,6 +1590,7 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output,
277 }
278
279 encoder->crtc = crtc;
280+ intel_output->base.encoder = encoder;
281 intel_output->load_detect_temp = true;
282
283 intel_crtc = to_intel_crtc(crtc);
284@@ -1625,6 +1626,7 @@ void intel_release_load_detect_pipe(struct intel_output *intel_output, int dpms_
285
286 if (intel_output->load_detect_temp) {
287 encoder->crtc = NULL;
288+ intel_output->base.encoder = NULL;
289 intel_output->load_detect_temp = false;
290 crtc->enabled = drm_helper_crtc_in_use(crtc);
291 drm_helper_disable_unused_functions(dev);
292--
2931.5.4.5
294
295
296From ac6a82f4aa69cbc58264004cd1db9143a241df95 Mon Sep 17 00:00:00 2001
297From: =?utf-8?q?Gr=C3=A9goire=20Henry?= <Gregoire.Henry@pps.jussieu.fr>
298Date: Tue, 23 Jun 2009 15:41:02 +0200
299Subject: [PATCH] drm/i915: initialize fence registers to zero when loading GEM
300MIME-Version: 1.0
301Content-Type: text/plain; charset=utf-8
302Content-Transfer-Encoding: 8bit
303
304Unitialized fence register could leads to corrupted display. Problem
305encountered on MacBooks (revision 1 and 2), directly booting from EFI
306or through BIOS emulation.
307
308(bug #21710 at freedestop.org)
309
310Signed-off-by: Grégoire Henry <henry@pps.jussieu.fr>
311Signed-off-by: Eric Anholt <eric@anholt.net>
312(cherry picked from commit b5aa8a0fc132dd512c33e7c2621d075e3b77a65e)
313---
314 drivers/gpu/drm/i915/i915_gem.c | 13 +++++++++++++
315 1 files changed, 13 insertions(+), 0 deletions(-)
316
317diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
318index 39f5c65..91ad93d 100644
319--- a/drivers/gpu/drm/i915/i915_gem.c
320+++ b/drivers/gpu/drm/i915/i915_gem.c
321@@ -4154,6 +4154,7 @@ i915_gem_lastclose(struct drm_device *dev)
322 void
323 i915_gem_load(struct drm_device *dev)
324 {
325+ int i;
326 drm_i915_private_t *dev_priv = dev->dev_private;
327
328 spin_lock_init(&dev_priv->mm.active_list_lock);
329@@ -4173,6 +4174,18 @@ i915_gem_load(struct drm_device *dev)
330 else
331 dev_priv->num_fence_regs = 8;
332
333+ /* Initialize fence registers to zero */
334+ if (IS_I965G(dev)) {
335+ for (i = 0; i < 16; i++)
336+ I915_WRITE64(FENCE_REG_965_0 + (i * 8), 0);
337+ } else {
338+ for (i = 0; i < 8; i++)
339+ I915_WRITE(FENCE_REG_830_0 + (i * 4), 0);
340+ if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev))
341+ for (i = 0; i < 8; i++)
342+ I915_WRITE(FENCE_REG_945_8 + (i * 4), 0);
343+ }
344+
345 i915_gem_detect_bit_6_swizzle(dev);
346 }
347
348--
3491.5.4.5
350
351
352From d2a55f12b2425ed1febb9e29e10bb405b91aa8dd Mon Sep 17 00:00:00 2001
353From: ling.ma@intel.com <ling.ma@intel.com>
354Date: Thu, 25 Jun 2009 10:59:22 +0800
355Subject: [PATCH] drm/i915: Set SSC frequency for 8xx chips correctly
356
357All 8xx class chips have the 66/48 split, not just 855.
358
359Signed-off-by: Ma Ling <ling.ma@intel.com>
360Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
361Signed-off-by: Eric Anholt <eric@anholt.net>
362(cherry picked from commit 6ff4fd05676bc5b5c930bef25901e489f7843660)
363---
364 drivers/gpu/drm/i915/intel_bios.c | 10 ++++++----
365 1 files changed, 6 insertions(+), 4 deletions(-)
366
367diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
368index 9d78cff..cf2a971 100644
369--- a/drivers/gpu/drm/i915/intel_bios.c
370+++ b/drivers/gpu/drm/i915/intel_bios.c
371@@ -185,10 +185,12 @@ parse_general_features(struct drm_i915_private *dev_priv,
372 dev_priv->lvds_use_ssc = general->enable_ssc;
373
374 if (dev_priv->lvds_use_ssc) {
375- if (IS_I855(dev_priv->dev))
376- dev_priv->lvds_ssc_freq = general->ssc_freq ? 66 : 48;
377- else
378- dev_priv->lvds_ssc_freq = general->ssc_freq ? 100 : 96;
379+ if (IS_I85X(dev_priv->dev))
380+ dev_priv->lvds_ssc_freq =
381+ general->ssc_freq ? 66 : 48;
382+ else
383+ dev_priv->lvds_ssc_freq =
384+ general->ssc_freq ? 100 : 96;
385 }
386 }
387 }
388--
3891.5.4.5
390
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