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Commit | Line | Data |
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c9d1c54c AM |
1 | --- linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c.orig 2004-08-10 04:23:46.000000000 +0200 |
2 | +++ linux-2.6.8-rc4/arch/i386/kernel/cpu/proc.c 2004-08-13 16:48:53.971370504 +0200 | |
3 | @@ -44,8 +44,8 @@ | |
4 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
5 | ||
6 | /* Intel-defined (#2) */ | |
7 | - "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2", | |
8 | - "est", NULL, "cid", NULL, NULL, NULL, NULL, NULL, | |
9 | + "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est", | |
10 | + "tm2", NULL, "cid", NULL, NULL, NULL, "xtpr", NULL, | |
11 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
12 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
13 | ||
14 | --- linux-2.6.8-rc4/arch/x86_64/kernel/setup.c.orig 2004-08-10 04:22:11.000000000 +0200 | |
15 | +++ linux-2.6.8-rc4/arch/x86_64/kernel/setup.c 2004-08-13 16:59:14.729001000 +0200 | |
16 | @@ -1042,8 +1042,8 @@ | |
17 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
18 | ||
19 | /* Intel-defined (#2) */ | |
20 | - "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "tm2", | |
21 | - "est", NULL, "cid", NULL, NULL, "cmpxchg16b", NULL, NULL, | |
22 | + "pni", NULL, NULL, "monitor", "ds_cpl", NULL, NULL, "est", | |
23 | + "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL, | |
24 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
25 | NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, | |
26 | }; | |
27 | --- linux-2.6.8-rc4/include/asm-i386/cpufeature.h.orig 2004-08-10 04:23:22.000000000 +0200 | |
28 | +++ linux-2.6.8-rc4/include/asm-i386/cpufeature.h 2004-08-13 16:49:19.439498760 +0200 | |
29 | @@ -71,9 +71,13 @@ | |
30 | #define X86_FEATURE_P4 (3*32+ 7) /* P4 */ | |
31 | ||
32 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | |
33 | -#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */ | |
34 | +#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ | |
35 | #define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */ | |
36 | - | |
37 | +#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */ | |
38 | +#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */ | |
39 | +#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */ | |
40 | +#define X86_FEATURE_CID (4*32+10) /* Context ID */ | |
41 | +#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ | |
42 | ||
43 | /* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ | |
44 | #define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ | |
45 | @@ -93,13 +97,14 @@ | |
46 | #define cpu_has_tsc boot_cpu_has(X86_FEATURE_TSC) | |
47 | #define cpu_has_pae boot_cpu_has(X86_FEATURE_PAE) | |
48 | #define cpu_has_pge boot_cpu_has(X86_FEATURE_PGE) | |
49 | -#define cpu_has_sse2 boot_cpu_has(X86_FEATURE_XMM2) | |
50 | #define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC) | |
51 | #define cpu_has_sep boot_cpu_has(X86_FEATURE_SEP) | |
52 | #define cpu_has_mtrr boot_cpu_has(X86_FEATURE_MTRR) | |
53 | #define cpu_has_mmx boot_cpu_has(X86_FEATURE_MMX) | |
54 | #define cpu_has_fxsr boot_cpu_has(X86_FEATURE_FXSR) | |
55 | #define cpu_has_xmm boot_cpu_has(X86_FEATURE_XMM) | |
56 | +#define cpu_has_xmm2 boot_cpu_has(X86_FEATURE_XMM2) | |
57 | +#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3) | |
58 | #define cpu_has_ht boot_cpu_has(X86_FEATURE_HT) | |
59 | #define cpu_has_mp boot_cpu_has(X86_FEATURE_MP) | |
60 | #define cpu_has_nx boot_cpu_has(X86_FEATURE_NX) | |
61 | --- linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h.orig 2004-08-10 04:23:13.000000000 +0200 | |
62 | +++ linux-2.6.8-rc4/include/asm-x86_64/cpufeature.h 2004-08-13 16:53:48.776553304 +0200 | |
63 | @@ -63,8 +63,14 @@ | |
64 | #define X86_FEATURE_K8_C (3*32+ 4) /* C stepping K8 */ | |
65 | ||
66 | /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ | |
67 | -#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */ | |
68 | +#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ | |
69 | #define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */ | |
70 | +#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */ | |
71 | +#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */ | |
72 | +#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */ | |
73 | +#define X86_FEATURE_CID (4*32+10) /* Context ID */ | |
74 | +#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ | |
75 | +#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ | |
76 | ||
77 | #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) | |
78 | #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) | |
79 | @@ -81,6 +87,8 @@ | |
80 | #define cpu_has_mmx 1 | |
81 | #define cpu_has_fxsr 1 | |
82 | #define cpu_has_xmm 1 | |
83 | +#define cpu_has_xmm2 1 | |
84 | +#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3) | |
85 | #define cpu_has_ht boot_cpu_has(X86_FEATURE_HT) | |
86 | #define cpu_has_mp 1 /* XXX */ | |
87 | #define cpu_has_k6_mtrr 0 |