1 diff -Nur linux-2.6.4-rc2.org/arch/arm/Kconfig linux-2.6.4-rc2/arch/arm/Kconfig
2 --- linux-2.6.4-rc2.org/arch/arm/Kconfig 2004-03-04 06:16:47.000000000 +0000
3 +++ linux-2.6.4-rc2/arch/arm/Kconfig 2004-03-09 13:25:56.000000000 +0000
5 If you have any questions or comments about the Linux kernel port
6 to this board, send e-mail to sjhill@cotw.com.
9 + bool "Psion Windermere"
11 + Say Y here if you want to run this kernel on Psion Windermere
12 + systems with NEC 710T processor. Psion Windermere architecture
13 + covers Psion 5MX, 5MX Pro and Revo. It does not work on older
21 source "arch/arm/mach-iop3xx/Kconfig"
23 +source "arch/arm/mach-psionw/Kconfig"
25 source "arch/arm/mach-pxa/Kconfig"
27 source "arch/arm/mach-sa1100/Kconfig"
29 # Select various configuration options depending on the machine type
32 - depends on ARCH_EDB7211 || ARCH_SA1100
33 + depends on ARCH_EDB7211 || ARCH_PSIONW || ARCH_SA1100
36 Say Y to upport efficient handling of discontiguous physical memory,
37 diff -Nur linux-2.6.4-rc2.org/arch/arm/Makefile linux-2.6.4-rc2/arch/arm/Makefile
38 --- linux-2.6.4-rc2.org/arch/arm/Makefile 2004-03-09 13:22:59.000000000 +0000
39 +++ linux-2.6.4-rc2/arch/arm/Makefile 2004-03-09 13:25:56.000000000 +0000
41 machine-$(CONFIG_ARCH_ANAKIN) := anakin
42 machine-$(CONFIG_ARCH_IOP3XX) := iop3xx
43 machine-$(CONFIG_ARCH_ADIFCC) := adifcc
44 +textaddr-$(CONFIG_ARCH_PSIONW) := 0xc0048000
45 + machine-$(CONFIG_ARCH_PSIONW) := psionw
47 MACHINE := $(machine-y)
48 TEXTADDR := $(textaddr-y)
49 diff -Nur linux-2.6.4-rc2.org/arch/arm/configs/psionw_defconfig linux-2.6.4-rc2/arch/arm/configs/psionw_defconfig
50 --- linux-2.6.4-rc2.org/arch/arm/configs/psionw_defconfig 1970-01-01 00:00:00.000000000 +0000
51 +++ linux-2.6.4-rc2/arch/arm/configs/psionw_defconfig 2004-03-09 13:25:56.000000000 +0000
54 +# Automatically generated make config: don't edit
59 +CONFIG_RWSEM_GENERIC_SPINLOCK=y
62 +# Code maturity level options
64 +CONFIG_EXPERIMENTAL=y
65 +CONFIG_CLEAN_COMPILE=y
67 +CONFIG_BROKEN_ON_SMP=y
74 +# CONFIG_BSD_PROCESS_ACCT is not set
76 +CONFIG_LOG_BUF_SHIFT=14
77 +# CONFIG_IKCONFIG is not set
78 +# CONFIG_EMBEDDED is not set
82 +CONFIG_IOSCHED_NOOP=y
84 +CONFIG_IOSCHED_DEADLINE=y
87 +# Loadable module support
89 +# CONFIG_MODULES is not set
94 +# CONFIG_ARCH_ADIFCC is not set
95 +# CONFIG_ARCH_ANAKIN is not set
96 +# CONFIG_ARCH_CLPS7500 is not set
97 +# CONFIG_ARCH_CLPS711X is not set
98 +# CONFIG_ARCH_CO285 is not set
99 +# CONFIG_ARCH_PXA is not set
100 +# CONFIG_ARCH_EBSA110 is not set
101 +# CONFIG_ARCH_CAMELOT is not set
102 +# CONFIG_ARCH_FOOTBRIDGE is not set
103 +# CONFIG_ARCH_INTEGRATOR is not set
104 +# CONFIG_ARCH_IOP3XX is not set
105 +# CONFIG_ARCH_L7200 is not set
106 +CONFIG_ARCH_PSIONW=y
107 +# CONFIG_ARCH_RPC is not set
108 +# CONFIG_ARCH_SA1100 is not set
109 +# CONFIG_ARCH_SHARK is not set
112 +# CLPS711X/EP721X Implementations
120 +# Footbridge Implementations
124 +# IOP3xx Implementation Options
126 +# CONFIG_ARCH_IOP310 is not set
127 +# CONFIG_ARCH_IOP321 is not set
130 +# IOP3xx Chipset Features
134 +# Psion Implementations
136 +# CONFIG_PSIONW_5MX is not set
137 +# CONFIG_PSIONW_5MXPRO24MB is not set
138 +CONFIG_PSIONW_5MXPRO32MB=y
139 +# CONFIG_PSIONW_REVO is not set
140 +# CONFIG_PSIONW_REVOPLUS is not set
143 +# Intel PXA250/210 Implementations
147 +# SA11x0 Implementations
154 +CONFIG_CPU_ARM720T=y
156 +CONFIG_CPU_ABRT_LV4T=y
157 +CONFIG_CPU_CACHE_V4=y
158 +CONFIG_CPU_COPY_V4WT=y
159 +CONFIG_CPU_TLB_V4WT=y
162 +# Processor Features
164 +# CONFIG_ARM_THUMB is not set
169 +CONFIG_DISCONTIGMEM=y
170 +# CONFIG_ZBOOT_ROM is not set
171 +CONFIG_ZBOOT_ROM_TEXT=0x0
172 +CONFIG_ZBOOT_ROM_BSS=0x0
176 +# PCMCIA/CardBus support
178 +# CONFIG_PCMCIA is not set
179 +# CONFIG_PCMCIA_DEBUG is not set
182 +# At least one math emulation must be selected
185 +# CONFIG_FPE_NWFPE_XP is not set
186 +# CONFIG_FPE_FASTFPE is not set
188 +# CONFIG_BINFMT_AOUT is not set
189 +# CONFIG_BINFMT_MISC is not set
192 +# Generic Driver Options
194 +# CONFIG_FW_LOADER is not set
195 +# CONFIG_PM is not set
196 +# CONFIG_PREEMPT is not set
197 +# CONFIG_ARTHUR is not set
199 +CONFIG_ALIGNMENT_TRAP=y
202 +# Parallel port support
204 +# CONFIG_PARPORT is not set
207 +# Memory Technology Devices (MTD)
209 +# CONFIG_MTD is not set
212 +# Plug and Play support
214 +# CONFIG_PNP is not set
219 +# CONFIG_BLK_DEV_FD is not set
220 +# CONFIG_BLK_DEV_LOOP is not set
221 +CONFIG_BLK_DEV_RAM=y
222 +CONFIG_BLK_DEV_RAM_SIZE=4096
223 +CONFIG_BLK_DEV_INITRD=y
226 +# Multi-device support (RAID and LVM)
228 +# CONFIG_MD is not set
231 +# Networking support
233 +# CONFIG_NET is not set
236 +# Amateur Radio support
238 +# CONFIG_HAMRADIO is not set
241 +# ATA/ATAPI/MFM/RLL support
243 +# CONFIG_IDE is not set
246 +# SCSI device support
248 +# CONFIG_SCSI is not set
251 +# I2O device support
259 +# Input device support
264 +# Userland interfaces
266 +CONFIG_INPUT_MOUSEDEV=y
267 +CONFIG_INPUT_MOUSEDEV_PSAUX=y
268 +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
269 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
270 +# CONFIG_INPUT_JOYDEV is not set
271 +# CONFIG_INPUT_TSDEV is not set
272 +# CONFIG_INPUT_TSLIBDEV is not set
273 +# CONFIG_INPUT_EVDEV is not set
274 +# CONFIG_INPUT_EVBUG is not set
279 +# CONFIG_GAMEPORT is not set
280 +CONFIG_SOUND_GAMEPORT=y
282 +# CONFIG_SERIO_I8042 is not set
283 +# CONFIG_SERIO_SERPORT is not set
284 +# CONFIG_SERIO_CT82C710 is not set
287 +# Input Device Drivers
289 +# CONFIG_INPUT_KEYBOARD is not set
290 +# CONFIG_INPUT_MOUSE is not set
291 +# CONFIG_INPUT_JOYSTICK is not set
292 +# CONFIG_INPUT_TOUCHSCREEN is not set
293 +# CONFIG_INPUT_MISC is not set
301 +# CONFIG_SERIAL_NONSTANDARD is not set
306 +# CONFIG_SERIAL_8250 is not set
309 +# Non-8250 serial port support
311 +CONFIG_SERIAL_PSIONW=y
312 +CONFIG_SERIAL_PSIONW_CONSOLE=y
313 +# CONFIG_SERIAL_DZ is not set
314 +CONFIG_SERIAL_CORE=y
315 +CONFIG_SERIAL_CORE_CONSOLE=y
316 +CONFIG_UNIX98_PTYS=y
317 +CONFIG_UNIX98_PTY_COUNT=256
322 +# CONFIG_I2C is not set
329 +# I2C Hardware Bus support
333 +# I2C Hardware Sensors Chip support
335 +# CONFIG_I2C_SENSOR is not set
338 +# L3 serial bus support
340 +# CONFIG_L3 is not set
345 +# CONFIG_BUSMOUSE is not set
346 +# CONFIG_QIC02_TAPE is not set
351 +# CONFIG_IPMI_HANDLER is not set
356 +# CONFIG_WATCHDOG is not set
357 +# CONFIG_NVRAM is not set
358 +# CONFIG_RTC is not set
359 +# CONFIG_GEN_RTC is not set
360 +# CONFIG_DTLK is not set
361 +# CONFIG_R3964 is not set
362 +# CONFIG_APPLICOM is not set
365 +# Ftape, the floppy tape device driver
367 +# CONFIG_FTAPE is not set
368 +# CONFIG_AGP is not set
369 +# CONFIG_DRM is not set
370 +# CONFIG_RAW_DRIVER is not set
373 +# Multimedia devices
375 +# CONFIG_VIDEO_DEV is not set
378 +# Digital Video Broadcasting Devices
382 +# MMC/SD Card support
384 +# CONFIG_MMC is not set
390 +# CONFIG_EXT2_FS_XATTR is not set
391 +# CONFIG_EXT3_FS is not set
392 +# CONFIG_JBD is not set
393 +# CONFIG_REISERFS_FS is not set
394 +# CONFIG_JFS_FS is not set
395 +# CONFIG_XFS_FS is not set
397 +# CONFIG_ROMFS_FS is not set
398 +# CONFIG_QUOTA is not set
399 +# CONFIG_AUTOFS_FS is not set
400 +# CONFIG_AUTOFS4_FS is not set
403 +# CD-ROM/DVD Filesystems
405 +# CONFIG_ISO9660_FS is not set
406 +# CONFIG_UDF_FS is not set
409 +# DOS/FAT/NT Filesystems
411 +# CONFIG_FAT_FS is not set
412 +# CONFIG_NTFS_FS is not set
415 +# Pseudo filesystems
418 +# CONFIG_DEVFS_FS is not set
420 +# CONFIG_DEVPTS_FS_XATTR is not set
421 +# CONFIG_TMPFS is not set
422 +# CONFIG_HUGETLB_PAGE is not set
426 +# Miscellaneous filesystems
428 +# CONFIG_ADFS_FS is not set
429 +# CONFIG_AFFS_FS is not set
430 +# CONFIG_HFS_FS is not set
431 +# CONFIG_BEFS_FS is not set
432 +# CONFIG_BFS_FS is not set
433 +# CONFIG_EFS_FS is not set
434 +# CONFIG_CRAMFS is not set
435 +# CONFIG_VXFS_FS is not set
436 +# CONFIG_HPFS_FS is not set
437 +# CONFIG_QNX4FS_FS is not set
438 +# CONFIG_SYSV_FS is not set
439 +# CONFIG_UFS_FS is not set
444 +CONFIG_PARTITION_ADVANCED=y
445 +# CONFIG_ACORN_PARTITION is not set
446 +# CONFIG_OSF_PARTITION is not set
447 +# CONFIG_AMIGA_PARTITION is not set
448 +# CONFIG_ATARI_PARTITION is not set
449 +# CONFIG_MAC_PARTITION is not set
450 +CONFIG_MSDOS_PARTITION=y
451 +# CONFIG_BSD_DISKLABEL is not set
452 +# CONFIG_MINIX_SUBPARTITION is not set
453 +# CONFIG_SOLARIS_X86_PARTITION is not set
454 +# CONFIG_UNIXWARE_DISKLABEL is not set
455 +# CONFIG_LDM_PARTITION is not set
456 +# CONFIG_NEC98_PARTITION is not set
457 +# CONFIG_SGI_PARTITION is not set
458 +# CONFIG_ULTRIX_PARTITION is not set
459 +# CONFIG_SUN_PARTITION is not set
460 +# CONFIG_EFI_PARTITION is not set
465 +# CONFIG_FB is not set
468 +# Console display driver support
470 +# CONFIG_VGA_CONSOLE is not set
471 +# CONFIG_MDA_CONSOLE is not set
472 +CONFIG_DUMMY_CONSOLE=y
479 +# Multimedia Capabilities Port drivers
481 +# CONFIG_MCP is not set
486 +# CONFIG_SWITCHES is not set
491 +# CONFIG_USB_GADGET is not set
496 +CONFIG_FRAME_POINTER=y
498 +# CONFIG_DEBUG_INFO is not set
499 +CONFIG_DEBUG_KERNEL=y
500 +# CONFIG_DEBUG_SLAB is not set
501 +CONFIG_MAGIC_SYSRQ=y
502 +# CONFIG_DEBUG_SPINLOCK is not set
503 +# CONFIG_DEBUG_WAITQ is not set
504 +# CONFIG_DEBUG_BUGVERBOSE is not set
505 +# CONFIG_DEBUG_ERRORS is not set
511 +# CONFIG_SECURITY is not set
514 +# Cryptographic options
516 +# CONFIG_CRYPTO is not set
521 +# CONFIG_CRC32 is not set
522 diff -Nur linux-2.6.4-rc2.org/arch/arm/kernel/debug.S linux-2.6.4-rc2/arch/arm/kernel/debug.S
523 --- linux-2.6.4-rc2.org/arch/arm/kernel/debug.S 2004-03-04 06:16:41.000000000 +0000
524 +++ linux-2.6.4-rc2/arch/arm/kernel/debug.S 2004-03-09 13:25:56.000000000 +0000
529 +#elif defined(CONFIG_ARCH_PSIONW)
531 +#include <asm/hardware/psionw.h>
534 + mrc p15, 0, \rx, c1, c0
535 + tst \rx, #1 @ MMU enabled?
536 + moveq \rx, #PSIONW_PHYS_BASE
537 + movne \rx, #PSIONW_VIRT_BASE
538 + orr \rx, \rx, #0x0700 @ UART2
541 + .macro senduart,rd,rx
542 + str \rd, [\rx] @ UARTDR
545 + .macro waituart,rd,rx
546 +1001: ldr \rd, [\rx, #0x0010] @ SYSFLGx
547 + tst \rd, #1 << 3 @ UBUSYx
551 + .macro busyuart,rd,rx
552 + tst \rx, #0x0000 @ UART2 does not have CTS here
554 +1001: ldr \rd, [\rx, #0x0010] @ SYSFLGx
555 + tst \rd, #1 << 0 @ CTS
560 #elif defined(CONFIG_ARCH_ANAKIN)
562 //#//include <asm/arch/serial_reg.h>
563 diff -Nur linux-2.6.4-rc2.org/arch/arm/kernel/entry-armv.S linux-2.6.4-rc2/arch/arm/kernel/entry-armv.S
564 --- linux-2.6.4-rc2.org/arch/arm/kernel/entry-armv.S 2004-03-04 06:16:41.000000000 +0000
565 +++ linux-2.6.4-rc2/arch/arm/kernel/entry-armv.S 2004-03-09 13:25:56.000000000 +0000
568 .macro irq_prio_table
571 +#elif defined(CONFIG_ARCH_PSIONW)
573 +#include <asm/hardware/psionw.h>
578 + .macro get_irqnr_and_base, irqnr, stat, base, mask
579 + mov \base, #PSIONW_BASE
580 + ldr \stat, [\base, #INTRSR]
581 + ldr \mask, [\base, #INTENS]
583 + mov \mask, \mask, lsl #16
584 + and \stat, \stat, \mask, lsr #16
585 + movs \stat, \stat, lsr #4
588 +1001: tst \stat, #255
589 + addeq \irqnr, \irqnr, #8
590 + moveq \stat, \stat, lsr #8
592 + addeq \irqnr, \irqnr, #4
593 + moveq \stat, \stat, lsr #4
595 + addeq \irqnr, \irqnr, #2
596 + moveq \stat, \stat, lsr #2
598 + addeq \irqnr, \irqnr, #1
599 + moveq \stat, \stat, lsr #1
600 + tst \stat, #1 @ bit 0 should be set
603 + .macro irq_prio_table
606 #elif defined (CONFIG_ARCH_CAMELOT)
607 #include <asm/arch/platform.h>
608 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/Kconfig linux-2.6.4-rc2/arch/arm/mach-psionw/Kconfig
609 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/Kconfig 1970-01-01 00:00:00.000000000 +0000
610 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/Kconfig 2004-03-09 13:25:56.000000000 +0000
613 +menu "Psion Implementations"
616 + prompt "Psion Model"
617 + depends on ARCH_PSIONW
621 + bool "Psion 5MX with 16MB of memory"
623 + Say Y if you intend to run the kernel on Psion 5MX machine.
625 +config PSIONW_5MXPRO24MB
626 + bool "Psion 5MX Pro with 24MB of memory"
628 + Say Y if you intend to run the kernel on Psion 5MX Pro 24
631 +config PSIONW_5MXPRO32MB
632 + bool "Psion 5MX Pro with 32MB of memory"
634 + Say Y if you intend to run the kernel on Psion 5MX Pro 32
638 + bool "Psion Revo with 8MB of memory"
640 + Say Y if you intend to run the kernel on Psion Revo machine.
642 +config PSIONW_REVOPLUS
643 + bool "Psion Revo Plus with 16MB of memory"
645 + Say Y if you intend to run the kernel on Psion Revo Plus
652 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/Makefile linux-2.6.4-rc2/arch/arm/mach-psionw/Makefile
653 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/Makefile 1970-01-01 00:00:00.000000000 +0000
654 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/Makefile 2004-03-09 13:25:56.000000000 +0000
657 +# Makefile for the linux kernel.
660 +# Object file lists.
662 +obj-y := irq.o mm.o psionw-arch.o psionw-hardware.o psionw-time.o serial-debug.o
663 +#obj-y := psionw-power.o
668 +#obj-$(CONFIG_ARCH_PSIONW) += psionw-time.o psionw-leds.o psionw-power.o serial-debug.o
669 +#leds-$(CONFIG_ARCH_PSIONW) += psionw-leds.o
670 +obj-$(CONFIG_LEDS) += $(leds-y)
672 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/irq.c linux-2.6.4-rc2/arch/arm/mach-psionw/irq.c
673 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/irq.c 1970-01-01 00:00:00.000000000 +0000
674 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/irq.c 2004-03-09 13:25:56.000000000 +0000
677 + * linux/arch/arm/mach-psionw/irq.c
679 + * Copyright (C) 2001 Yuji Shinokawa <ysh@mob.or.jp>
680 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
682 + * This program is free software; you can redistribute it and/or modify
683 + * it under the terms of the GNU General Public License as published by
684 + * the Free Software Foundation; either version 2 of the License, or
685 + * (at your option) any later version.
687 + * This program is distributed in the hope that it will be useful,
688 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
689 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
690 + * GNU General Public License for more details.
692 + * You should have received a copy of the GNU General Public License
693 + * along with this program; if not, write to the Free Software
694 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
697 +#include <linux/init.h>
698 +#include <linux/list.h>
700 +#include <asm/mach/irq.h>
701 +#include <asm/hardware.h>
703 +#include <asm/irq.h>
705 +#include <asm/hardware/psionw.h>
707 +static void int_mask(unsigned int irq)
711 + intmr = (1 << irq);
712 + psionw_writel(intmr, INTENC);
715 +static void int_ack(unsigned int irq)
719 + intmr = (1 << irq);
720 + psionw_writel(intmr, INTENC);
724 + psionw_writel(1, COEOI);
725 + printk("Received and cleared CSINT irq %d\n", irq);
728 + psionw_writel(1, E2EOI);
729 + printk("Received and cleared EINT2 irq %d\n", irq);
732 + psionw_writel(1, TC1EOI); /* Cleared here, handled in rtc */
735 + psionw_writel(1, TC2EOI); /* Cleared here, handled in timer */
738 + psionw_writel(1, RTCEOI); /* Cleared here, handled in rtc*/
741 + psionw_writel(1, TEOI);
742 + printk("Received and cleared TINT irq %d\n", irq);
747 +static void int_unmask(unsigned int irq)
750 + intmr = (1 << irq);
751 + psionw_writel(intmr, INTENS);
754 +static struct irqchip int_chip = {
757 + .unmask = int_unmask,
761 +psionw_init_irq(void)
763 + unsigned int i, ret;
765 + for (i = 0; i < NR_IRQS; i++) {
766 + if (INT1_IRQS & (1 << i)) {
767 + set_irq_handler(i, do_level_IRQ);
768 + set_irq_chip(i, &int_chip);
769 + set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
774 + * Disable interrupts
776 + psionw_writel(0xffffffff, INTENC);
779 + * Clear down any pending interrupts
781 + psionw_writel(1, MCEOI);
782 + psionw_writel(1, BLEOI);
783 + psionw_writel(1, COEOI);
784 + psionw_writel(1, TC1EOI);
785 + psionw_writel(1, TC2EOI);
786 + psionw_writel(1, RTCEOI);
787 + psionw_writel(1, TEOI);
788 + psionw_writel(1, UMSEOI);
789 + psionw_writel(1, SSCR0);
793 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/mm.c linux-2.6.4-rc2/arch/arm/mach-psionw/mm.c
794 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/mm.c 1970-01-01 00:00:00.000000000 +0000
795 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/mm.c 2004-03-09 13:25:56.000000000 +0000
798 + * linux/arch/arm/mach-psionw/mm.c
800 + * Copyright (C) 2000 Tony Lindgren <tony@atomide.com>
802 + * This program is free software; you can redistribute it and/or modify
803 + * it under the terms of the GNU General Public License as published by
804 + * the Free Software Foundation; either version 2 of the License, or
805 + * (at your option) any later version.
807 + * This program is distributed in the hope that it will be useful,
808 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
809 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
810 + * GNU General Public License for more details.
812 + * You should have received a copy of the GNU General Public License
813 + * along with this program; if not, write to the Free Software
814 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
816 +#include <linux/kernel.h>
817 +#include <linux/mm.h>
818 +#include <linux/init.h>
819 +#include <linux/bootmem.h>
821 +#include <asm/hardware.h>
822 +#include <asm/pgtable.h>
823 +#include <asm/page.h>
824 +#include <asm/mach/map.h>
825 +#include <asm/hardware/psionw.h>
830 +static struct map_desc psionw_io_desc[] __initdata = {
831 + {PSIONW_VIRT_BASE, PSIONW_PHYS_BASE, 0x10000, MT_DEVICE},
832 + {ETNA_V_BASE, ETNA_P_BASE, ETNA_SIZE, MT_DEVICE},
833 + {CF1_V_BASE, CF1_P_BASE, CF_SIZE, MT_DEVICE},
834 + {PSION_V_BR, PSION_P_BR, PSION_BR_SIZE, MT_DEVICE},
835 + {PSION_V_BF, PSION_P_BF, PSION_BF_SIZE, MT_DEVICE},
838 +void __init psionw_map_io(void)
840 + iotable_init(psionw_io_desc, ARRAY_SIZE(psionw_io_desc));
842 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-arch.c linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-arch.c
843 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-arch.c 1970-01-01 00:00:00.000000000 +0000
844 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-arch.c 2004-03-09 13:25:56.000000000 +0000
847 + * linux/arch/arm/mach-psionw/psionw.c
849 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
851 + * Based on the mach-sa1100 code, some portions of the code
852 + * Copyright (C) 2000 Nicolas Pitre <nico@cam.org>.
854 + * This program is free software; you can redistribute it and/or modify
855 + * it under the terms of the GNU General Public License as published by
856 + * the Free Software Foundation; either version 2 of the License, or
857 + * (at your option) any later version.
859 + * This program is distributed in the hope that it will be useful,
860 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
861 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
862 + * GNU General Public License for more details.
864 + * You should have received a copy of the GNU General Public License
865 + * along with this program; if not, write to the Free Software
866 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
869 +#include <linux/config.h>
870 +#include <linux/kernel.h>
871 +#include <linux/init.h>
872 +#include <linux/types.h>
873 +#include <linux/string.h>
874 +#include <linux/mm.h>
876 +#include <asm/hardware.h>
878 +#include <asm/pgtable.h>
879 +#include <asm/page.h>
880 +#include <asm/setup.h>
881 +#include <asm/mach-types.h>
882 +#include <asm/mach/arch.h>
883 +#include <asm/mach/map.h>
885 +extern void psionw_init_irq(void);
886 +extern void psionw_map_io(void);
888 +#define SET_BANK(__nr,__start,__size) \
889 + mi->bank[__nr].start = (__start), \
890 + mi->bank[__nr].size = (__size), \
891 + mi->bank[__nr].node = (((unsigned)(__start) - PHYS_OFFSET) >> 27)
894 +fixup_psionw(struct machine_desc *desc, struct tag *tag,
895 + char **cmdline, struct meminfo *mi)
897 +#if defined(CONFIG_PSIONW_5MX)
898 + SET_BANK(0, 0xc0000000, 8 * 1024 * 1024);
899 + SET_BANK(1, 0xc1000000, 8 * 1024 * 1024);
901 +#elif defined(CONFIG_PSIONW_5MXPRO24MB)
902 + /* Chris Halls <chris.halls@nikocity.de> */
903 + SET_BANK(0, 0xc0000000, 8 * 1024 * 1024);
904 + SET_BANK(1, 0xc1000000, 8 * 1024 * 1024);
905 + SET_BANK(2, 0xd0000000, 4 * 1024 * 1024);
906 + SET_BANK(3, 0xd0800000, 4 * 1024 * 1024);
908 +#elif defined(CONFIG_PSIONW_5MXPRO32MB)
909 + /* Provided by Thilo Hille <thilo@resourcery.de> */
910 + SET_BANK(0, 0xc0000000, 8 * 1024 * 1024);
911 + SET_BANK(1, 0xc1000000, 8 * 1024 * 1024);
912 + SET_BANK(2, 0xd0000000, 8 * 1024 * 1024);
913 + SET_BANK(3, 0xd1000000, 8 * 1024 * 1024);
915 +#elif defined(CONFIG_PSIONW_REVO)
916 + /* This seems to be correct */
917 + SET_BANK(0, 0xc0000000, 4 * 1024 * 1024);
918 + SET_BANK(1, 0xc0800000, 4 * 1024 * 1024);
920 +#elif defined(CONFIG_PSIONW_REVOPLUS)
921 + /* Provided by Ilmar Kotte <i.f.a.kotte@altavista.net> */
922 + SET_BANK(0, 0xc0000000, 4 * 1024 * 1024);
923 + SET_BANK(1, 0xc0800000, 4 * 1024 * 1024);
924 + SET_BANK(2, 0xd0000000, 4 * 1024 * 1024);
925 + SET_BANK(3, 0xd0800000, 4 * 1024 * 1024);
928 +#error Unknown machine type!
932 + ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
934 + /* Merge the command line options from kernel and boot loader */
935 + strcat(*cmdline, " ");
936 + strcat(*cmdline, tag->commandline);
937 + strcpy(tag->commandline, *cmdline);
941 +MACHINE_START(PSIONW, "Psion Windermere NEC ARM710T")
942 +MAINTAINER("Tony Lindgren")
943 +BOOT_MEM(0xc0000000, 0x80000000, 0xff000000)
946 + * VIDEO() does not poke a hole to bootmem.
947 + * See arch/arm/arm/mm/init.c.
949 +//VIDEO(0xc000d000, 0xc000d000 + (PSION_LCD_W * PSION_LCD_H * 4 / 8))
951 +/* Must sync with TEXTADDR */
952 +BOOT_PARAMS(0xc0048000 - (128 * 1024))
955 +MAPIO(psionw_map_io)
956 +INITIRQ(psionw_init_irq)
959 +static int psionw_hw_init(void)
961 + printk("XXX in psionw_hw_init\n");
966 +__initcall(psionw_hw_init);
967 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-hardware.c linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-hardware.c
968 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-hardware.c 1970-01-01 00:00:00.000000000 +0000
969 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-hardware.c 2004-03-09 13:25:56.000000000 +0000
972 + * linux/arch/arm/mach-psionw/hardware.c
974 + * Copyright (C) 2000 Deep Blue Solutions Ltd
976 + * This program is free software; you can redistribute it and/or modify
977 + * it under the terms of the GNU General Public License as published by
978 + * the Free Software Foundation; either version 2 of the License, or
979 + * (at your option) any later version.
981 + * This program is distributed in the hope that it will be useful,
982 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
983 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
984 + * GNU General Public License for more details.
986 + * You should have received a copy of the GNU General Public License
987 + * along with this program; if not, write to the Free Software
988 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
990 +#include <linux/config.h>
991 +#include <linux/init.h>
993 +#include <asm/hardware.h>
996 +#include <asm/arch/psionw-power.h>
999 + * Shut down all unnecessary hardware
1002 +psionw_hw_init(void)
1004 + if (psionw_readb(PCDR) & PCDR_UART1) {
1005 + psionw_writeb(psionw_readb(PCDR) & ~PCDR_UART1, PCDR);
1008 + if (psionw_readb(PCDR) & PCDR_UART2) {
1009 + //psionw_writeb(psionw_readb(PCDR) & ~PCDR_UART2, PCDR);
1015 +__initcall(psionw_hw_init);
1016 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-leds.c linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-leds.c
1017 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-leds.c 1970-01-01 00:00:00.000000000 +0000
1018 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-leds.c 2004-03-09 13:25:56.000000000 +0000
1021 + * linux/arch/arm/mach-psionw/leds.c
1023 + * Psionw LED control routines
1025 + * Copyright (C) 2000 Deep Blue Solutions Ltd
1027 + * This program is free software; you can redistribute it and/or modify
1028 + * it under the terms of the GNU General Public License as published by
1029 + * the Free Software Foundation; either version 2 of the License, or
1030 + * (at your option) any later version.
1032 + * This program is distributed in the hope that it will be useful,
1033 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1034 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1035 + * GNU General Public License for more details.
1037 + * You should have received a copy of the GNU General Public License
1038 + * along with this program; if not, write to the Free Software
1039 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1041 +#include <linux/kernel.h>
1042 +#include <linux/init.h>
1044 +#include <asm/hardware.h>
1045 +#include <asm/io.h>
1046 +#include <asm/leds.h>
1047 +#include <asm/system.h>
1048 +#include <asm/mach-types.h>
1050 +#include <asm/hardware/psionw.h>
1052 +static void psionw_leds_event(led_event_t ledevt)
1054 + unsigned long flags;
1057 + local_irq_save(flags);
1059 + case led_idle_start:
1061 + * Turn off red front led when entering idle.
1062 + * The led then shows the current CPU load.
1064 + port = psionw_readb(PDDR);
1065 + psionw_writeb(port & ~PDDR_SLED, PDDR);
1068 + case led_idle_end:
1069 + /* Turn on red front led when not idle*/
1070 + port = psionw_readb(PDDR);
1071 + psionw_writeb(port | PDDR_SLED, PDDR);
1075 + /* FIXME5MX Blink the green top led, does not work */
1076 + port = psionw_readb(PCDR);
1077 + //psionw_writeb(port ^ PCDR_PLED, PCDR);
1084 + local_irq_restore(flags);
1087 +static int __init leds_init(void)
1089 + leds_event = psionw_leds_event;
1093 +__initcall(leds_init);
1094 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-power.c linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-power.c
1095 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-power.c 1970-01-01 00:00:00.000000000 +0000
1096 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-power.c 2004-03-09 13:25:56.000000000 +0000
1099 + * arch/arm/mach-psionw/psionw-power.c - Psion power managemenent
1101 + * Copyright (C) 2002 Tony Lindgren <tony@atomide.com>
1103 + * Contrast restore after sleep fix (C) 2002 by Simon Howard
1106 +#include <linux/delay.h>
1107 +#include <asm/uaccess.h>
1108 +#include <asm/io.h>
1109 +#include <asm/hardware/psionw.h>
1110 +#include <asm/arch/irqs.h>
1111 +#include <asm/arch/psionw-power.h>
1112 +#include <linux/proc_fs.h>
1113 +#include <linux/module.h>
1115 +extern void disable_irq(unsigned int irq);
1116 +extern void enable_irq(unsigned int irq);
1117 +extern void psionw_lcd_powerdown(int lock);
1118 +extern void psionw_lcd_powerup(int lock);
1119 +extern void etna_powerdown(int lock);
1120 +extern void etna_powerup(int lock);
1121 +extern void ssi5mx_powerdown(int lock);
1122 +extern void ssi5mx_powerup(int lock);
1124 +static int psion_rtc_off;
1127 + * Stops the DC to DC converter
1129 +void stop_pump(int lock)
1134 + save_flags_cli(flags);
1136 + psionw_writel(PUMP_STOP_VAL,PUMPCON);
1137 + psionw_writeb(psionw_readb(PDDR) & ~PDDR_PUMP_PWR1, PDDR);
1140 + restore_flags(flags);
1143 +void stop_timer(int lock)
1146 + unsigned long goto_sleep;
1150 + save_flags_cli(flags);
1152 + psion_rtc_off = xtime.tv_sec - RTCTIME;
1154 + goto_sleep = jiffies;
1156 + disable_irq(IRQ_TC2OI);
1157 + } while (time_after(jiffies, goto_sleep + HZ/50));
1158 + cfg = psionw_readl(TC2CTRL);
1159 + cfg &= ~TC_ENABLE;
1160 + psionw_writel(cfg, TC2CTRL);
1163 + restore_flags(flags);
1166 +void start_timer(int lock)
1172 + save_flags_cli(flags);
1174 + cfg = psionw_readl(TC2CTRL);
1176 + /* These bits need to initialized to 0 */
1180 + cfg |= TC_CLKSEL; // 512kHz mode
1184 + psionw_writel(cfg, TC2CTRL);
1185 + psionw_writel(5119, TC2LOAD); /* 512kHz / 100Hz - 1 */
1187 + psionw_writel(1, TC2EOI);
1188 + enable_irq(IRQ_TC2OI);
1191 + restore_flags(flags);
1193 + /* Set the correct time from RTC */
1194 + xtime.tv_sec = RTCTIME;
1195 + xtime.tv_sec += psion_rtc_off;
1199 + * Puts the Psion into sleep mode until a keyboard, serial,
1200 + * touch panel, or RTC interrupt is received.
1202 +void psion_off(void)
1204 + int adc_clock = 0, rfdiv = 0, rtcdiv1 = 0, rtcdiv2 = 0;
1205 + int uart1 = 0, uart2 = 0;
1208 + if (psionw_readl(PDDR) & PDDR_PUMP_PWR1) {
1210 + save_flags_cli(flags);
1211 + if (psionw_readb(PCDR) & PCDR_UART1) {
1213 + //printk("Looks like UART1 is on\n");
1214 + psionw_writeb(psionw_readb(PCDR) & ~PCDR_UART1, PCDR);
1217 + if (psionw_readb(PCDR) & PCDR_UART2) {
1219 + //printk("Looks like UART2 is on\n");
1220 + psionw_writeb(psionw_readb(PCDR) & ~PCDR_UART2, PCDR);
1222 + restore_flags(flags);
1224 + /* First we must stop the timer */
1228 + * We establish a long lock for the whole sleep-wake procedure
1230 + save_flags_cli(flags);
1232 + psionw_writeb(psionw_readb(PDDR) & ~PDDR_SLED, PDDR);
1233 + psionw_writel(0, KSCAN);
1234 + ssi5mx_powerdown(0); /* SSI, saves only about 0.1mA */
1236 +#ifdef CONFIG_PCMCIA_ETNA
1237 + etna_powerdown(0);
1240 + psionw_lcd_powerdown(0);
1241 + stop_pump(0); /* DC to DC, saves about 0.5mA */
1243 + /* Lower the DRAM refresh to 1 KHz, no real savings */
1244 + rfdiv = psionw_readl(DRAM_CFG) & 0x7f;
1245 + psionw_writel(psionw_readl(DRAM_CFG) | 0x7f, DRAM_CFG);
1247 + /* Disable the ADC clock, no real savings */
1248 + adc_clock = (psionw_readl(PWRCNT) >> 8) & 0xff;
1249 + psionw_writel(psionw_readl(PWRCNT) | (0xff << 8), PWRCNT);
1251 + cpu_cache_clean_invalidate_all();
1253 + rtcdiv1 = psionw_readb(PWRSR) & 0x3f;
1254 + while(rtcdiv1 == rtcdiv2) {
1255 + rtcdiv2 = psionw_readb(PWRSR) & 0x3f;
1257 + while(rtcdiv2 == rtcdiv1) {
1258 + rtcdiv1 = psionw_readb(PWRSR) & 0x3f;
1261 + /* Now go to sleep */
1262 + psionw_writel(1, STBY);
1263 + __asm__ __volatile__("
1269 + /* We're back from sleep */
1271 + /* Restore the ADC clock */
1272 + psionw_writel(psionw_readl(PWRCNT) & ~(0xff << 8), PWRCNT);
1273 + psionw_writel(psionw_readl(PWRCNT) | (adc_clock << 8), PWRCNT);
1275 + /* Restore DRAM refresh rate */
1276 + psionw_writel(psionw_readl(DRAM_CFG) & ~0x7f, DRAM_CFG);
1277 + psionw_writel(psionw_readl(DRAM_CFG) | rfdiv, DRAM_CFG);
1280 + psionw_lcd_powerup(0);
1282 + /* Restore contrast */
1283 + psion_set_contrast(psion_get_contrast(), 1);
1285 +#ifdef CONFIG_PCMCIA_ETNA
1289 + ssi5mx_powerup(0);
1292 + * And finally we release the long lock
1294 + restore_flags(flags);
1297 + save_flags_cli(flags);
1299 + psionw_writeb(psionw_readb(PCDR) | PCDR_UART1, PCDR);
1302 + psionw_writeb(psionw_readb(PCDR) | PCDR_UART2, PCDR);
1303 + restore_flags(flags);
1306 + /* Just in case the LCD is off */
1307 + psionw_lcd_powerup(1);
1312 + * Returns the CPU speed
1314 +unsigned int psionw_get_cpu_speed(int cpu)
1317 + speed = (psionw_readl(PWRCNT) & 0x7) >> 2;
1326 + * Changes the CPU speed
1328 +void psionw_set_cpu_speed(int speed)
1333 + save_flags_cli(flags);
1334 + cpu_cache_clean_invalidate_all();
1335 + pwrcnt = psionw_readl(PWRCNT);
1337 + pwrcnt |= (1 << 2);
1338 + printk("Setting the CPU speed to 36Mhz\n");
1339 + psionw_writel(pwrcnt, PWRCNT);
1341 + pwrcnt &= ~(1 << 2);
1342 + printk("Setting the CPU speed to 18Mhz\n");
1343 + psionw_writel(pwrcnt, PWRCNT);
1345 + restore_flags(flags);
1347 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-time.c linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-time.c
1348 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/psionw-time.c 1970-01-01 00:00:00.000000000 +0000
1349 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/psionw-time.c 2004-03-09 13:25:56.000000000 +0000
1352 + * linux/arch/arm/mach-psionw/time.c
1354 + * RTC handler for Psion 5mx.
1356 + * Copyright (C) 2001 Yuji Shinokawa <ysh@mob.or.jp>
1358 + * This program is free software; you can redistribute it and/or modify
1359 + * it under the terms of the GNU General Public License as published by
1360 + * the Free Software Foundation; either version 2 of the License, or
1361 + * (at your option) any later version.
1363 + * This program is distributed in the hope that it will be useful,
1364 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1365 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1366 + * GNU General Public License for more details.
1368 + * You should have received a copy of the GNU General Public License
1369 + * along with this program; if not, write to the Free Software
1370 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1373 +#include <linux/config.h>
1374 +#include <linux/module.h>
1375 +#include <linux/kernel.h>
1376 +#include <linux/sched.h>
1377 +#include <linux/init.h>
1379 +#include <asm/io.h>
1380 +#include <asm/hardware/psionw.h>
1385 + * Offset to compatible with EPOC time handling.
1386 + * In EPOC, it seems a time for rtc = 0 is "00:00:00 1 Jan 2000 UTC"
1387 + * and rtc has signed value.
1390 + * 0x00000000 = 00:00:00 1 Jan 2000 (London Inner, United Kingdom)
1392 + * You can get this offset by following perl script;
1394 + * require 'timelocal.pl';
1395 + * $time = timegm (0, 0, 0, 1, 0, 2000);
1396 + * print "$time\n";
1398 +#define EPOC_RTC_OFFSET 946684800
1400 +extern int (*set_rtc) (void);
1401 +extern unsigned long (*gettimeoffset) (void);
1403 +unsigned int psionw_read_rtc(void)
1405 + int try_count, rtc1, rtc2;
1411 + (psionw_readl(RTCDRU) << 16) | (psionw_readl(RTCDRL) &
1414 + (psionw_readl(RTCDRU) << 16) | (psionw_readl(RTCDRL) &
1416 + } while (rtc1 != rtc2 && --try_count);
1419 + printk("DEBUG: (psionw_get_rtc) read rtc = %08x\n", rtc1);
1422 + xrtc = rtc1 + EPOC_RTC_OFFSET;
1427 +void psionw_write_rtc(u_int xrtc)
1431 + rtc = xrtc - EPOC_RTC_OFFSET;
1434 + printk("DEBUG: (psionw_set_rtc) write rtc = %08x\n", rtc);
1437 + /* Writing order is important. */
1438 + psionw_writel((rtc >> 16), RTCDRU);
1439 + psionw_writel((rtc & 0xffff), RTCDRL);
1442 +unsigned int psionw_read_rtc_alarm(void)
1444 + int try_count, rtc1, rtc2;
1450 + (psionw_readl(RTCMRU) << 16) | (psionw_readl(RTCMRL) &
1453 + (psionw_readl(RTCMRU) << 16) | (psionw_readl(RTCMRL) &
1455 + } while (rtc1 != rtc2 && --try_count);
1458 + printk("DEBUG: (psionw_get_rtc_alarm) read rtc alarm = %08x\n", rtc1);
1461 + xrtc = rtc1 + EPOC_RTC_OFFSET;
1466 +void psionw_write_rtc_alarm(u_int xrtc)
1470 + rtc = xrtc - EPOC_RTC_OFFSET;
1473 + printk("DEBUG: (psionw_set_rtc_alarm) write rtc alarm = %08x\n", rtc);
1476 + /* Writing order is important. */
1477 + psionw_writel((rtc >> 16), RTCMRU);
1478 + psionw_writel((rtc & 0xffff), RTCMRL);
1481 +EXPORT_SYMBOL(psionw_read_rtc);
1482 +EXPORT_SYMBOL(psionw_write_rtc);
1483 +EXPORT_SYMBOL(psionw_read_rtc_alarm);
1484 +EXPORT_SYMBOL(psionw_write_rtc_alarm);
1487 +psionw_set_rtc(void)
1491 + xrtc = (u_int) xtime.tv_sec;
1493 + psionw_write_rtc(xrtc);
1495 + rtc = psionw_read_rtc();
1496 + if (xrtc > rtc || rtc - xrtc > 1)
1497 + return 1; /* Write failed. */
1502 +static unsigned long
1503 +psionw_gettimeoffset(void)
1509 +psionw_rtc_init(void)
1511 + /* Set the initial RTC value. */
1512 + xtime.tv_sec = (time_t) psionw_read_rtc();
1515 + set_rtc = psionw_set_rtc;
1516 + gettimeoffset = psionw_gettimeoffset;
1521 +__initcall(psionw_rtc_init);
1522 diff -Nur linux-2.6.4-rc2.org/arch/arm/mach-psionw/serial-debug.c linux-2.6.4-rc2/arch/arm/mach-psionw/serial-debug.c
1523 --- linux-2.6.4-rc2.org/arch/arm/mach-psionw/serial-debug.c 1970-01-01 00:00:00.000000000 +0000
1524 +++ linux-2.6.4-rc2/arch/arm/mach-psionw/serial-debug.c 2004-03-09 13:25:56.000000000 +0000
1526 +#include <linux/init.h>
1527 +#include <linux/kernel.h>
1532 + * Allows printing debug information over the serial
1533 + * line even before the console is initialized. Uses
1534 + * the low level debug functions.
1535 + * To use in the code, just add:
1537 + * extern void serial_printk(char *fmt, ...);
1539 + * For debugging only, do not leave serial_printk
1540 + * statements in the code.
1542 + * Copied from the drivers/video/cyber2000fb.h
1544 +#if defined(DEBUG) && defined(CONFIG_DEBUG_LL)
1545 +void serial_printk(char *fmt, ...)
1547 + extern void printascii(const char *);
1551 + va_start(ap, fmt);
1552 + vsprintf(buffer, fmt, ap);
1555 + printascii(buffer);
1558 +inline void serial_printk(char *fmt, ...) {}
1560 diff -Nur linux-2.6.4-rc2.org/arch/arm/mm/Kconfig linux-2.6.4-rc2/arch/arm/mm/Kconfig
1561 --- linux-2.6.4-rc2.org/arch/arm/mm/Kconfig 2004-03-09 13:22:59.000000000 +0000
1562 +++ linux-2.6.4-rc2/arch/arm/mm/Kconfig 2004-03-09 13:25:56.000000000 +0000
1566 bool "Support ARM720T processor" if !ARCH_CLPS711X && !ARCH_L7200 && !ARCH_CDB89712 && ARCH_INTEGRATOR
1567 - default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712
1568 + default y if ARCH_CLPS711X || ARCH_L7200 || ARCH_CDB89712 || ARCH_PSIONW
1570 select CPU_ABRT_LV4T
1572 diff -Nur linux-2.6.4-rc2.org/arch/arm/mm/proc-arm720.S linux-2.6.4-rc2/arch/arm/mm/proc-arm720.S
1573 --- linux-2.6.4-rc2.org/arch/arm/mm/proc-arm720.S 2004-03-04 06:16:50.000000000 +0000
1574 +++ linux-2.6.4-rc2/arch/arm/mm/proc-arm720.S 2004-03-09 13:25:56.000000000 +0000
1575 @@ -141,6 +141,21 @@
1576 mov pc, lr @ __ret (head-armv.S)
1577 .size __arm710_setup, . - __arm710_setup
1579 + .type __arm710_setup, #function
1580 +__arm710_setup: mov r0, #0
1581 + mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
1582 + mcr p15, 0, r0, c8, c7, 0 @ flush TLB (v4)
1583 + mcr p15, 0, r4, c2, c0 @ load page table pointer
1584 + mov r0, #0x1f @ Domains 0, 1 = client
1585 + mcr p15, 0, r0, c3, c0 @ load domain access register
1587 + mrc p15, 0, r0, c1, c0 @ get control register
1588 + bic r0, r0, #0x0e00 @ ..V. ..RS BLDP WCAM
1589 + orr r0, r0, #0x0100 @ .... .... .111 .... (old)
1590 + orr r0, r0, #0x003d @ .... ..01 ..11 1101 (new)
1591 + mov pc, lr @ __ret (head-armv.S)
1592 + .size __arm710_setup, . - __arm710_setup
1594 .type __arm720_setup, #function
1595 __arm720_setup: mov r0, #0
1596 mcr p15, 0, r0, c7, c7, 0 @ invalidate caches
1597 @@ -189,6 +204,11 @@
1599 .size cpu_arm710_name, . - cpu_arm710_name
1601 + .type cpu_arm710_name, #object
1604 + .size cpu_arm710_name, . - cpu_arm710_name
1606 .type cpu_arm720_name, #object
1609 @@ -218,6 +238,22 @@
1611 .size __arm710_proc_info, . - __arm710_proc_info
1613 + .type __arm710_proc_info, #object
1614 +__arm710_proc_info:
1615 + .long 0x41807100 @ cpu_val
1616 + .long 0xffffff00 @ cpu_mask
1617 + .long 0x00000c1e @ section_mmu_flags
1618 + b __arm710_setup @ cpu_flush
1619 + .long cpu_arch_name @ arch_name
1620 + .long cpu_elf_name @ elf_name
1621 + .long HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB @ elf_hwcap
1622 + .long cpu_arm710_name @ name
1623 + .long arm720_processor_functions
1625 + .long v4wt_user_fns
1626 + .long v4_cache_fns
1627 + .size __arm710_proc_info, . - __arm710_proc_info
1629 .type __arm720_proc_info, #object
1631 .long 0x41807200 @ cpu_val
1632 diff -Nur linux-2.6.4-rc2.org/drivers/serial/Kconfig linux-2.6.4-rc2/drivers/serial/Kconfig
1633 --- linux-2.6.4-rc2.org/drivers/serial/Kconfig 2004-03-09 13:23:00.000000000 +0000
1634 +++ linux-2.6.4-rc2/drivers/serial/Kconfig 2004-03-09 13:25:56.000000000 +0000
1635 @@ -226,6 +226,33 @@
1636 your boot loader (lilo or loadlin) about how to pass options to the
1637 kernel at boot time.)
1639 +config SERIAL_PSIONW
1640 + tristate "Psion Windermere serial port support"
1641 + depends on ARCH_PSIONW
1642 + select SERIAL_CORE
1644 + This selects the Psion Windermere serial port. If you have a
1645 + Psion 5MX or Revo type palmtop, say Y or M here. If you have
1646 + Psion 5 palmtop, say N here.
1650 +config SERIAL_PSIONW_CONSOLE
1651 + bool "Support for console on Psion Windermere serial port"
1652 + depends on SERIAL_PSIONW
1653 + select SERIAL_CORE_CONSOLE
1655 + Say Y here if you wish to use the Psion Windermere UART as the system
1656 + console (the system console is the device which receives all kernel
1657 + messages and warnings and which allows logins in single user mode).
1659 + Even if you say Y here, the currently visible framebuffer console
1660 + (/dev/tty0) will still be used as the system console by default, but
1661 + you can alter that using a kernel command line option such as
1662 + "console=ttyAM0". (Try "man bootparam" or see the documentation of
1663 + your boot loader (lilo or loadlin) about how to pass options to the
1664 + kernel at boot time.)
1666 config SERIAL_INTEGRATOR
1668 depends on SERIAL_AMBA && ARCH_INTEGRATOR
1669 diff -Nur linux-2.6.4-rc2.org/drivers/serial/Makefile linux-2.6.4-rc2/drivers/serial/Makefile
1670 --- linux-2.6.4-rc2.org/drivers/serial/Makefile 2004-03-04 06:16:46.000000000 +0000
1671 +++ linux-2.6.4-rc2/drivers/serial/Makefile 2004-03-09 13:29:22.000000000 +0000
1673 obj-$(CONFIG_SERIAL_ANAKIN) += anakin.o
1674 obj-$(CONFIG_SERIAL_AMBA) += amba.o
1675 obj-$(CONFIG_SERIAL_CLPS711X) += clps711x.o
1676 +obj-$(CONFIG_SERIAL_PSIONW) += psionw.o
1677 obj-$(CONFIG_SERIAL_PXA) += pxa.o
1678 obj-$(CONFIG_SERIAL_SA1100) += sa1100.o
1679 obj-$(CONFIG_SERIAL_UART00) += uart00.o
1680 diff -Nur linux-2.6.4-rc2.org/drivers/serial/psionw.c linux-2.6.4-rc2/drivers/serial/psionw.c
1681 --- linux-2.6.4-rc2.org/drivers/serial/psionw.c 1970-01-01 00:00:00.000000000 +0000
1682 +++ linux-2.6.4-rc2/drivers/serial/psionw.c 2004-03-09 13:25:56.000000000 +0000
1685 + * linux/drivers/serial/psionw.c
1687 + * Copyright (C) 2001 Yuji Shinokawa <ysh@mob.or.jp>
1689 + * Written by Yuji Shinokawa, Irda port support and generic
1690 + * updates by Tony Lindgren <tony@atomide.com>
1692 + * Based on the amba.c code, some portions of the code
1693 + * Copyright (C) 2000 Deep Blue Solutions Ltd.
1695 + * This program is free software; you can redistribute it and/or modify
1696 + * it under the terms of the GNU General Public License as published by
1697 + * the Free Software Foundation; either version 2 of the License, or
1698 + * (at your option) any later version.
1700 + * This program is distributed in the hope that it will be useful,
1701 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
1702 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
1703 + * GNU General Public License for more details.
1705 + * You should have received a copy of the GNU General Public License
1706 + * along with this program; if not, write to the Free Software
1707 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
1709 +#include <linux/config.h>
1710 +#include <linux/module.h>
1711 +#include <linux/tty.h>
1712 +#include <linux/ioport.h>
1713 +#include <linux/init.h>
1714 +#include <linux/serial.h>
1715 +#include <linux/console.h>
1716 +#include <linux/sysrq.h>
1718 +#include <asm/io.h>
1719 +#include <asm/irq.h>
1721 +#if defined(CONFIG_SERIAL_PSIONW_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
1722 +#define SUPPORT_SYSRQ
1725 +#include <linux/serial_core.h>
1727 +#include "psionw.h"
1731 +/* Make the Psion serial port appear as standard serial port */
1732 +#define SERIAL_PSIONW_MAJOR 4
1733 +#define SERIAL_PSIONW_MINOR 64
1734 +#define SERIAL_PSIONW_NAME "ttyS"
1735 +#define SERIAL_PSIONW_NR UART_NR
1736 +#define SERIAL_PSIONW_VERSION "040102"
1739 + * We wrap our port structure around the generic uart_port.
1741 +struct uart_psionw_port {
1742 + struct uart_port port;
1743 + unsigned int old_status;
1746 +static void psionwuart_stop_tx(struct uart_port *port, unsigned int from_tty)
1748 + unsigned int uartintm;
1750 + uartintm = UART_GET_INT_MASK(port);
1751 + uartintm &= ~PSIONW_UART_TXINT;
1752 + UART_PUT_INT_MASK(port, uartintm);
1755 +static void psionwuart_start_tx(struct uart_port *port, unsigned int tty_start)
1757 + unsigned int uartintm;
1759 + uartintm = UART_GET_INT_MASK(port);
1760 + uartintm |= PSIONW_UART_TXINT;
1761 + UART_PUT_INT_MASK(port, uartintm);
1764 +static void psionwuart_stop_rx(struct uart_port *port)
1766 + unsigned int uartintm;
1768 + uartintm = UART_GET_INT_MASK(port);
1769 + uartintm &= ~PSIONW_UART_RXINT;
1770 + UART_PUT_INT_MASK(port, uartintm);
1773 +static void psionwuart_enable_ms(struct uart_port *port)
1775 + unsigned int uartintm;
1777 + uartintm = UART_GET_INT_MASK(port);
1778 + uartintm |= PSIONW_UART_MSINT;
1779 + UART_PUT_INT_MASK(port, uartintm);
1783 +#ifdef SUPPORT_SYSRQ
1784 +psionwuart_rx_chars(struct uart_port *port, struct pt_regs *regs)
1786 +psionwuart_rx_chars(struct uart_port *port)
1789 + struct tty_struct *tty = port->info->tty;
1790 + unsigned int status, ch, rsr, max_count = 256;
1792 + status = UART_GET_FR(port);
1793 + while (UART_RX_DATA(status) && max_count--) {
1794 + if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
1795 + tty->flip.work.func((void *) tty);
1796 + if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
1797 + printk(KERN_WARNING "TTY_DONT_FLIP set\n");
1802 + /* Get the data plus 3 error bits */
1803 + rsr = UART_GET_CHAR(port);
1804 + ch = (rsr & 0xff);
1806 + *tty->flip.char_buf_ptr = ch;
1807 + *tty->flip.flag_buf_ptr = TTY_NORMAL;
1808 + port->icount.rx++;
1811 + * Note that the error handling code is
1812 + * out of the main execution path.
1813 + * Note also that psionw has the error bits
1814 + * in the data register.
1816 + //rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX;
1817 + //rsr |= UART_DUMMY_RSR_RX;
1818 + if (rsr & PSIONW_UARTRSR_ANY) {
1819 + if (rsr & PSIONW_UARTRSR_PE) {
1820 + port->icount.parity++;
1821 + } else if (rsr & PSIONW_UARTRSR_FE) {
1822 + port->icount.frame++;
1824 + if (rsr & PSIONW_UARTRSR_OE) {
1825 + port->icount.overrun++;
1827 + rsr &= port->read_status_mask;
1828 + if (rsr & PSIONW_UARTRSR_PE)
1829 + *tty->flip.flag_buf_ptr = TTY_PARITY;
1830 + else if (rsr & PSIONW_UARTRSR_FE)
1831 + *tty->flip.flag_buf_ptr = TTY_FRAME;
1834 + if (uart_handle_sysrq_char(port, ch, regs))
1837 + if ((rsr & port->ignore_status_mask) == 0) {
1838 + tty->flip.flag_buf_ptr++;
1839 + tty->flip.char_buf_ptr++;
1840 + tty->flip.count++;
1842 + if ((rsr & PSIONW_UARTRSR_OE) &&
1843 + tty->flip.count < TTY_FLIPBUF_SIZE) {
1845 + * Overrun is special, since it's reported
1846 + * immediately, and doesn't affect the current
1849 + *tty->flip.char_buf_ptr++ = 0;
1850 + *tty->flip.flag_buf_ptr++ = TTY_OVERRUN;
1851 + tty->flip.count++;
1854 + status = UART_GET_FR(port);
1856 + tty_flip_buffer_push(tty);
1860 +static void psionwuart_tx_chars(struct uart_port *port)
1862 + struct circ_buf *xmit = &port->info->xmit;
1865 + if (port->x_char) {
1866 + UART_PUT_CHAR(port, port->x_char);
1867 + port->icount.tx++;
1871 + if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
1872 + psionwuart_stop_tx(port, 0);
1876 + count = port->fifosize >> 1;
1878 + UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
1879 + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1880 + port->icount.tx++;
1881 + if (uart_circ_empty(xmit))
1883 + } while (--count > 0);
1885 + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1886 + uart_write_wakeup(port);
1888 + if (uart_circ_empty(xmit))
1889 + psionwuart_stop_tx(port, 0);
1893 + * Only used for the UART1, the Irda port does not support this.
1895 +static void psionwuart_modem_status(struct uart_port *port)
1897 + struct uart_psionw_port *pp = (struct uart_psionw_port *)port;
1898 + unsigned int status, delta;
1900 + status = UART_GET_FR(&pp->port) & PSIONW_UARTFR_MODEM_ANY;
1901 + psionw_writel(0, UMSEOI);
1903 + delta = status ^ pp->old_status;
1904 + pp->old_status = status;
1909 + if (delta & AMBA_UARTFR_DCD)
1910 + uart_handle_dcd_change(&pp->port, status & AMBA_UARTFR_DCD);
1912 + if (delta & AMBA_UARTFR_DSR)
1913 + pp->port.icount.dsr++;
1915 + if (delta & AMBA_UARTFR_CTS)
1916 + uart_handle_cts_change(&pp->port, status & AMBA_UARTFR_CTS);
1918 + wake_up_interruptible(&pp->port.info->delta_msr_wait);
1922 + * Serial interrupts
1924 +static irqreturn_t psionwuart_int(int irq, void *dev_id, struct pt_regs *regs)
1926 + struct uart_port *port = dev_id;
1927 + unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
1928 + unsigned int psionwuart_int_mask =
1929 + (PSIONW_UART_RXINT | PSIONW_UART_TXINT | PSIONW_UART_MSINT);
1931 + /* Irda port does not support modem status */
1932 + if (port->mapbase == PSIONW_UART0_V_BASE)
1933 + psionwuart_int_mask = (PSIONW_UART_RXINT | PSIONW_UART_TXINT);
1935 + status = UART_GET_INT_STATUS(port);
1937 + if (status & PSIONW_UART_RXINT) {
1938 +#ifdef SUPPORT_SYSRQ
1939 + psionwuart_rx_chars(port, regs);
1941 + psionwuart_rx_chars(port);
1944 + if (status & PSIONW_UART_TXINT) {
1945 + psionwuart_tx_chars(port);
1947 + if ((status & PSIONW_UART_MSINT)
1948 + && (port->mapbase == PSIONW_UART1_V_BASE)) {
1950 + /* Clear modem status interrupt */
1951 + UART_CLEAR_INT(port, 1);
1953 + psionwuart_modem_status(port);
1955 + if (pass_counter-- == 0) {
1958 + status = UART_GET_INT_STATUS(port);
1959 + } while (status & psionwuart_int_mask);
1961 + return IRQ_HANDLED;
1965 +static unsigned int psionwuart_tx_empty(struct uart_port *port)
1967 + return UART_GET_FR(port) & AMBA_UARTFR_BUSY ? 0 : TIOCSER_TEMT;
1970 +static unsigned int psionwuart_get_mctrl(struct uart_port *port)
1972 + unsigned int result = 0;
1973 + unsigned int status;
1975 + status = UART_GET_FR(port);
1976 + if (status & AMBA_UARTFR_DCD)
1977 + result |= TIOCM_CAR;
1978 + if (status & AMBA_UARTFR_DSR)
1979 + result |= TIOCM_DSR;
1980 + if (status & AMBA_UARTFR_CTS)
1981 + result |= TIOCM_CTS;
1986 +static void psionwuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
1988 + unsigned int pcdr = 0;
1990 + /* NOTE: printk's here will corrupt the terminal */
1991 + if (mctrl & TIOCM_RTS) {
1992 + pcdr = psionw_readl(PCDR);
1993 + if (port->mapbase == PSIONW_UART0_V_BASE) {
1994 + pcdr |= PCDR_UART1;
1995 + } else if (port->mapbase == PSIONW_UART1_V_BASE) {
1996 + pcdr |= PCDR_UART2;
1998 + psionw_writel(pcdr, PCDR);
2002 +static void psionwuart_break_ctl(struct uart_port *port, int break_state)
2004 + unsigned long flags;
2005 + unsigned int ubrfcr;
2007 + spin_lock_irqsave(&port->lock, flags);
2008 + ubrfcr = UART_GET_FCR(port);
2009 + if (break_state == -1)
2010 + ubrfcr |= PSIONW_UARTFCR_BREAK;
2012 + ubrfcr &= ~PSIONW_UARTFCR_BREAK;
2013 + UART_PUT_FCR(port, ubrfcr);
2014 + spin_unlock_irqrestore(&port->lock, flags);
2017 +static int psionwuart_startup(struct uart_port *port)
2019 + struct uart_psionw_port *pp = (struct uart_psionw_port *)port;
2022 + unsigned int uartintm;
2025 + * Allocate the IRQs
2027 + retval = request_irq(port->irq, psionwuart_int, 0, "psionwuart", port);
2032 + * initialise the old status of the modem signals
2034 + pp->old_status = UART_GET_FR(port) & PSIONW_UARTFR_MODEM_ANY;
2039 + UART_PUT_CR(port, PSIONW_UARTCR_UARTEN);
2041 + uartintm = UART_GET_INT_MASK(port);
2042 + uartintm |= PSIONW_UART_TXINT | PSIONW_UART_RXINT | PSIONW_UART_MSINT;
2043 + UART_PUT_INT_MASK(port, uartintm);
2045 + // Enable the irda for uart0
2046 + if (port->mapbase == PSIONW_UART0_V_BASE) {
2047 + cfg = UART_GET_CR(port);
2048 + cfg &= ~PSIONW_UARTCR_SIREN;
2049 + cfg |= PSIONW_UARTCR_IRTXM; // power friendly tx encoding
2050 + UART_PUT_CR(port, cfg);
2054 + * Unblock irda rx while tx (full duplex)
2055 + * Won't work with IrTTY because of
2056 + * duplicate packets
2058 + cfg = readl(port->membase + PSIONW_UARTTR3);
2059 + cfg |= PSIONW_UARTTR3_IRUBLOCK;
2060 + writel(cfg, port->membase + PSIONW_UARTTR3);
2068 +static void psionwuart_shutdown(struct uart_port *port)
2070 + unsigned int pcdr;
2071 + unsigned int uartintm;
2074 + * Free the interrupt
2076 + free_irq(port->irq, port); /* UART interrupt */
2077 + uartintm = UART_GET_INT_MASK(port);
2078 + uartintm &= ~(PSIONW_UART_TXINT | PSIONW_UART_RXINT | PSIONW_UART_MSINT);
2079 + UART_PUT_INT_MASK(port, uartintm);
2082 + * disable the port
2084 + UART_PUT_CR(port, 0);
2087 + * disable break condition and fifos
2089 + UART_PUT_FCR(port, UART_GET_FCR(port) &
2090 + ~(PSIONW_UARTFCR_UFIFOEN | PSIONW_UARTFCR_BREAK));
2093 + * Don't forget to disable port in PCDR
2095 + pcdr = psionw_readl(PCDR);
2096 + if (port->mapbase == PSIONW_UART0_V_BASE) {
2097 + pcdr &= ~PCDR_UART1;
2098 + } else if (port->mapbase == PSIONW_UART1_V_BASE) {
2099 + pcdr &= ~PCDR_UART2;
2101 + psionw_writel(pcdr, PCDR);
2105 +static void psionwuart_set_termios(struct uart_port *port, struct termios *termios,
2106 + struct termios *old)
2109 + unsigned long flags;
2110 + unsigned int baud, quot;
2113 + * Ask the core to calculate the divisor for us.
2115 + baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
2116 + quot = uart_get_divisor(port, baud);
2118 + /* byte size and parity */
2119 + switch (termios->c_cflag & CSIZE) {
2121 + fcr = PSIONW_UARTFCR_WLEN_5;
2124 + fcr = PSIONW_UARTFCR_WLEN_6;
2127 + fcr = PSIONW_UARTFCR_WLEN_7;
2130 + fcr = PSIONW_UARTFCR_WLEN_8;
2133 + if (termios->c_cflag & CSTOPB)
2134 + fcr |= PSIONW_UARTFCR_XSTOP;
2135 + if (termios->c_cflag & PARENB) {
2136 + fcr |= PSIONW_UARTFCR_PRTEN;
2137 + if (!(termios->c_cflag & PARODD))
2138 + fcr |= PSIONW_UARTFCR_EVENPRT;
2140 + if (port->fifosize > 1)
2141 + fcr |= PSIONW_UARTFCR_UFIFOEN;
2143 + spin_lock_irqsave(&port->lock, flags);
2146 + * Update the per-port timeout.
2148 + uart_update_timeout(port, termios->c_cflag, baud);
2150 + port->read_status_mask = PSIONW_UARTRSR_OE;
2151 + if (termios->c_iflag & INPCK)
2152 + port->read_status_mask |= PSIONW_UARTRSR_FE | PSIONW_UARTRSR_PE;
2155 + * Characters to ignore
2157 + port->ignore_status_mask = 0;
2158 + if (termios->c_iflag & IGNPAR)
2159 + port->ignore_status_mask |=
2160 + PSIONW_UARTRSR_FE | PSIONW_UARTRSR_PE;
2161 + if (termios->c_iflag & IGNBRK) {
2163 + * If we're ignoring parity and break indicators,
2164 + * ignore overruns too (for real raw support).
2166 + if (termios->c_iflag & IGNPAR)
2167 + port->ignore_status_mask |= PSIONW_UARTRSR_OE;
2171 + * Ignore all characters if CREAD is not set.
2173 +// if ((cflag & CREAD) == 0)
2174 +// port->ignore_status_mask |= UART_DUMMY_RSR_RX;
2176 + /* first, disable everything */
2177 + /* REVISIT: Do we need to something here? */
2179 + /* Set baud rate */
2181 + UART_PUT_LCR(port, quot);
2183 + /* Set the frame control */
2184 + UART_PUT_FCR(port, fcr);
2186 + spin_unlock_irqrestore(&port->lock, flags);
2189 +static const char *psionwuart_type(struct uart_port *port)
2191 + return port->type == PORT_PSIONW ? "PSIONW" : NULL;
2195 + * Release the memory region(s) being used by 'port'
2197 +static void psionwuart_release_port(struct uart_port *port)
2199 + release_mem_region(port->mapbase, UART_PORT_SIZE);
2203 + * Request the memory region(s) being used by 'port'
2205 +static int psionwuart_request_port(struct uart_port *port)
2207 + return request_region(port->mapbase, UART_PORT_SIZE, "serial_psionw")
2208 + != NULL ? 0 : -EBUSY;
2212 + * Configure/autoconfigure the port.
2214 +static void psionwuart_config_port(struct uart_port *port, int flags)
2216 + if (flags & UART_CONFIG_TYPE) {
2217 + port->type = PORT_PSIONW;
2218 + psionwuart_request_port(port);
2223 + * verify the new serial_struct (for TIOCSSERIAL).
2225 +static int psionwuart_verify_port(struct uart_port *port, struct serial_struct *ser)
2228 + if (ser->type != PORT_UNKNOWN && ser->type != PORT_PSIONW)
2230 + if (ser->irq < 0 || ser->irq >= NR_IRQS)
2232 + if (ser->baud_base < 9600)
2237 +static struct uart_ops psionw_pops = {
2238 + .tx_empty = psionwuart_tx_empty,
2239 + .set_mctrl = psionwuart_set_mctrl,
2240 + .get_mctrl = psionwuart_get_mctrl,
2241 + .stop_tx = psionwuart_stop_tx,
2242 + .start_tx = psionwuart_start_tx,
2243 + .stop_rx = psionwuart_stop_rx,
2244 + .enable_ms = psionwuart_enable_ms,
2245 + .break_ctl = psionwuart_break_ctl,
2246 + .startup = psionwuart_startup,
2247 + .shutdown = psionwuart_shutdown,
2248 + .set_termios = psionwuart_set_termios,
2249 + .type = psionwuart_type,
2250 + .release_port = psionwuart_release_port,
2251 + .request_port = psionwuart_request_port,
2252 + .config_port = psionwuart_config_port,
2253 + .verify_port = psionwuart_verify_port,
2257 + * NOTE: Ports are swapped to have the serial port at ttyS0 and
2258 + * the IrDA port at ttyS1
2260 +static struct uart_psionw_port psionw_ports[UART_NR] = {
2263 + .membase = (void *)PSIONW_UART1_V_BASE,
2264 + .mapbase = PSIONW_UART1_V_BASE,
2265 + .iotype = SERIAL_IO_MEM,
2267 + .uartclk = 7372800,
2269 + .ops = &psionw_pops,
2270 + .flags = ASYNC_BOOT_AUTOCONF,
2276 + .membase = (void *)PSIONW_UART0_V_BASE,
2277 + .mapbase = PSIONW_UART0_V_BASE,
2278 + .iotype = SERIAL_IO_MEM,
2280 + .uartclk = 7372800,
2282 + .ops = &psionw_pops,
2283 + .flags = ASYNC_BOOT_AUTOCONF,
2289 +#ifdef CONFIG_SERIAL_PSIONW_CONSOLE
2292 +psionwuart_console_write(struct console *co, const char *s, unsigned int count)
2294 + struct uart_port *port = &psionw_ports[co->index].port;
2295 + unsigned int status, old_cr;
2299 + * Ensure that the port is enabled.
2301 + old_cr = UART_GET_CR(port);
2302 + UART_PUT_CR(port, PSIONW_UARTCR_UARTEN);
2305 + * Now, do each character
2307 + for (i = 0; i < count; i++) {
2309 + status = UART_GET_FR(port);
2310 + } while (status & AMBA_UARTFR_TXFF);
2311 + UART_PUT_CHAR(port, s[i]);
2312 + if (s[i] == '\n') {
2314 + status = UART_GET_FR(port);
2315 + } while (status & AMBA_UARTFR_TXFF);
2316 + UART_PUT_CHAR(port, '\r');
2321 + * Finally, wait for transmitter to become empty
2322 + * and restore the uart state.
2325 + status = UART_GET_FR(port);
2326 + } while (status & AMBA_UARTFR_BUSY);
2328 + UART_PUT_CR(port, old_cr);
2332 +psionwuart_console_get_options(struct uart_port *port, int *baud, int *parity,
2335 + if (UART_GET_CR(port) & PSIONW_UARTCR_UARTEN) {
2336 + unsigned int ubrfcr, quot;
2338 + ubrfcr = UART_GET_FCR(port);
2341 + if (ubrfcr & PSIONW_UARTFCR_PRTEN) {
2342 + if (ubrfcr & PSIONW_UARTFCR_EVENPRT)
2348 + if ((ubrfcr & PSIONW_UARTFCR_WRDLEN_MASK) == PSIONW_UARTFCR_WLEN_7)
2352 + quot = UART_GET_LCR(port) & PSIONW_UART_BAUD_MASK;
2354 + *baud = port->uartclk / (16 * (quot + 1));
2358 +static int __init psionwuart_console_setup(struct console *co, char *options)
2360 + struct uart_port *port;
2361 + int baud = 115200;
2367 + * Check whether an invalid uart number has been specified, and
2368 + * if so, search for the first available port that does have
2369 + * console support.
2371 + if (co->index >= UART_NR)
2373 + port = &psionw_ports[co->index].port;
2376 + uart_parse_options(options, &baud, &parity, &bits, &flow);
2378 + psionwuart_console_get_options(port, &baud, &parity, &bits);
2380 + return uart_set_options(port, co, baud, parity, bits, flow);
2383 +extern struct uart_driver psionw_reg;
2384 +static struct console psionw_console = {
2385 + .name = SERIAL_PSIONW_NAME,
2386 + .write = psionwuart_console_write,
2387 + .device = uart_console_device,
2388 + .setup = psionwuart_console_setup,
2389 + .flags = CON_PRINTBUFFER,
2391 + .data = &psionw_reg,
2394 +static int __init psionwuart_console_init(void)
2396 + register_console(&psionw_console);
2399 +console_initcall(psionwuart_console_init);
2401 +#define PSIONW_CONSOLE &psionw_console
2403 +#define PSIONW_CONSOLE NULL
2406 +static struct uart_driver psionw_reg = {
2407 + .owner = THIS_MODULE,
2408 + .driver_name = SERIAL_PSIONW_NAME,
2409 + .dev_name = SERIAL_PSIONW_NAME,
2410 + .major = SERIAL_PSIONW_MAJOR,
2411 + .minor = SERIAL_PSIONW_MINOR,
2413 + .cons = PSIONW_CONSOLE,
2416 +static int __init psionwuart_init(void)
2420 + printk(KERN_INFO "Serial: Psion Windermere driver version: %s\n",
2421 + SERIAL_PSIONW_VERSION);
2423 + ret = uart_register_driver(&psionw_reg);
2427 + for (i = 0; i < UART_NR; i++)
2428 + uart_add_one_port(&psionw_reg, &psionw_ports[i].port);
2433 +static void __exit psionwuart_exit(void)
2437 + for (i = 0; i < UART_NR; i++)
2438 + uart_remove_one_port(&psionw_reg, &psionw_ports[i].port);
2440 + uart_unregister_driver(&psionw_reg);
2443 +module_init(psionwuart_init);
2444 +module_exit(psionwuart_exit);
2446 +MODULE_AUTHOR("Yuji Shinokawa & Tony Lindgren");
2447 +MODULE_DESCRIPTION("Psion Windermere serial driver");
2448 +MODULE_LICENSE("GPL");
2449 diff -Nur linux-2.6.4-rc2.org/drivers/serial/psionw.h linux-2.6.4-rc2/drivers/serial/psionw.h
2450 --- linux-2.6.4-rc2.org/drivers/serial/psionw.h 1970-01-01 00:00:00.000000000 +0000
2451 +++ linux-2.6.4-rc2/drivers/serial/psionw.h 2004-03-09 13:25:56.000000000 +0000
2454 + * linux/drivers/char/serial_psionw.h
2457 +/* Common with AMBA */
2458 +#define AMBA_ISR_PASS_LIMIT 256
2459 +#define AMBA_UARTIIR 0x1C /* Same as Psion UARTINTR (Read only) */
2460 +#define AMBA_UARTDR 0x00 /* Data read or written from the interface. */
2461 +#define AMBA_UARTRSR 0x04 /* Receive status register (Read only). */
2462 +#define AMBA_UARTFR_TXFF 0x20 /* Same as Psion UTXFF */
2463 +#define AMBA_UARTFR_RXFE 0x10 /* Same as Psion URXFE */
2464 +#define AMBA_UARTFR_BUSY 0x08 /* Same as Psion UBUSY */
2465 +#define AMBA_UARTFR_DCD 0x04 /* Same as Psion DCD */
2466 +#define AMBA_UARTFR_DSR 0x02 /* Same as Psion DSR */
2467 +#define AMBA_UARTFR_CTS 0x01 /* Same as Psion CTS */
2468 +#define AMBA_UARTFR_TMSK (AMBA_UARTFR_TXFF + AMBA_UARTFR_BUSY)
2470 +/* Psion specific port base addresses */
2471 +#define PSIONW_UART0_BASE (0x0600)
2472 +#define PSIONW_UART1_BASE (0x0700)
2473 +#define PSIONW_UART0_V_BASE (PSIONW_BASE + PSIONW_UART0_BASE)
2474 +#define PSIONW_UART1_V_BASE (PSIONW_BASE + PSIONW_UART1_BASE)
2476 +/* Offsets from the base address for each port */
2477 +#define PSIONW_UARTDR (0x00) /* Data register */
2478 +#define PSIONW_UARTFCR (0x04) /* Frame control register */
2479 +#define PSIONW_UARTLCR (0x08) /* Line control register, UBRCR */
2480 +#define PSIONW_UARTCON (0x0c) /* Port control register */
2481 +#define PSIONW_UARTFR (0x10) /* Flag register (Read only) UARTFLG */
2482 +#define PSIONW_UARTINT (0x14) /* Second level interrupt register */
2483 +#define PSIONW_UARTINTM (0x18) /* Interrupt mask register */
2484 +#define PSIONW_UARTINTR (0x1c) /* Interrupt raw status register (Read only) */
2485 +#define PSIONW_UARTTR1 (0x20) /* Test register */
2486 +#define PSIONW_UARTTR2 (0x24) /* Test register */
2487 +#define PSIONW_UARTTR3 (0x28) /* Test register */
2489 +#define PSIONW_UART_RXINT (1 << 0) /* Rx interrupt */
2490 +#define PSIONW_UART_TXINT (1 << 1) /* Tx interrupt */
2491 +#define PSIONW_UART_MSINT (1 << 2) /* Modem status interrupt */
2493 +#define PSIONW_UART_BAUD_MASK ((1 << 16) - 1)
2494 +#define PSIONW_UARTTR3_IRUBLOCK (1 << 1) /* Unblock irda rx */
2496 +#define PSIONW_UARTCR_UARTEN (1 << 0) /* Uart enable */
2497 +#define PSIONW_UARTCR_SIREN (1 << 1) /* SiR disable, clear to enable IrDA */
2498 +#define PSIONW_UARTCR_IRTXM (1 << 2) /* IrDA Tx mode bit, set for power savings */
2500 +#define PSIONW_UARTRSR_FE (1 << 8) /* Frame error */
2501 +#define PSIONW_UARTRSR_PE (1 << 9) /* Parity error */
2502 +#define PSIONW_UARTRSR_OE (1 << 10) /* Overrun error */
2504 +#define PSIONW_UARTFCR_BREAK (1 << 0)
2505 +#define PSIONW_UARTFCR_PRTEN (1 << 1)
2506 +#define PSIONW_UARTFCR_EVENPRT (1 << 2)
2507 +#define PSIONW_UARTFCR_XSTOP (1 << 3)
2508 +#define PSIONW_UARTFCR_UFIFOEN (1 << 4)
2509 +#define PSIONW_UARTFCR_WLEN_5 (0 << 5)
2510 +#define PSIONW_UARTFCR_WLEN_6 (1 << 5)
2511 +#define PSIONW_UARTFCR_WLEN_7 (2 << 5)
2512 +#define PSIONW_UARTFCR_WLEN_8 (3 << 5)
2513 +#define PSIONW_UARTFCR_WRDLEN_MASK (3 << 5)
2515 +#define UART_PORT_SIZE 64
2517 +#define PSIONW_UARTFR_MODEM_ANY (AMBA_UARTFR_DCD|AMBA_UARTFR_DSR|AMBA_UARTFR_CTS)
2519 +/* No modem break in Psion */
2520 +#define PSIONW_UARTRSR_ANY (PSIONW_UARTRSR_OE|PSIONW_UARTRSR_PE|PSIONW_UARTRSR_FE)
2522 +#define UART_GET_INT_MASK(p) readb((p)->membase + PSIONW_UARTINTM)
2523 +#define UART_PUT_INT_MASK(p,c) writeb((c), (p)->membase + PSIONW_UARTINTM)
2524 +#define UART_CLEAR_INT(p,c) writeb((c), (p)->membase + PSIONW_UARTINT)
2525 +#define UART_GET_INT_STATUS(p) readb((p)->membase + PSIONW_UARTINTR)
2527 +#define UART_GET_FR(p) readb((p)->membase + PSIONW_UARTFR)
2529 +#define UART_GET_CR(p) readb((p)->membase + PSIONW_UARTCON)
2530 +#define UART_PUT_CR(p,c) writeb((c), (p)->membase + PSIONW_UARTCON)
2532 +#define UART_PUT_CHAR(p, c) writeb((c), (p)->membase + AMBA_UARTDR)
2534 +/* Must be readl for error bits */
2535 +#define UART_GET_CHAR(p) readl((p)->membase + AMBA_UARTDR)
2536 +#define UART_RX_DATA(s) (((s) & AMBA_UARTFR_RXFE) == 0)
2537 +#define UART_TX_READY(s) (((s) & AMBA_UARTFR_TXFF) == 0)
2538 +#define UART_TX_EMPTY(p) ((UART_GET_FR(p) & AMBA_UARTFR_TMSK) == 0)
2539 +#define UART_GET_RSR(p) readb((p)->membase + AMBA_UARTRSR)
2541 +#define UART_GET_FCR(p) readb((p)->membase + PSIONW_UARTFCR)
2542 +#define UART_PUT_FCR(p,c) writeb((c), (p)->membase + PSIONW_UARTFCR)
2544 +#define UART_GET_LCR(p) readl((p)->membase + PSIONW_UARTLCR)
2545 +#define UART_PUT_LCR(p,c) writel((c), (p)->membase + PSIONW_UARTLCR)
2546 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/dma.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/dma.h
2547 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/dma.h 1970-01-01 00:00:00.000000000 +0000
2548 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/dma.h 2004-03-09 13:25:56.000000000 +0000
2551 + * linux/include/asm-arm/arch-psionw/dma.h
2553 + * Copyright (C) 1997,1998 Russell King
2555 + * This program is free software; you can redistribute it and/or modify
2556 + * it under the terms of the GNU General Public License as published by
2557 + * the Free Software Foundation; either version 2 of the License, or
2558 + * (at your option) any later version.
2560 + * This program is distributed in the hope that it will be useful,
2561 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2562 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2563 + * GNU General Public License for more details.
2565 + * You should have received a copy of the GNU General Public License
2566 + * along with this program; if not, write to the Free Software
2567 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2570 +#ifndef __ASM_ARCH_DMA_H
2571 +#define __ASM_ARCH_DMA_H
2573 +#define MAX_DMA_ADDRESS 0xffffffff
2575 +#define MAX_DMA_CHANNELS 0
2577 +#endif /* _ASM_ARCH_DMA_H */
2578 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/hardware.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/hardware.h
2579 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/hardware.h 1970-01-01 00:00:00.000000000 +0000
2580 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/hardware.h 2004-03-09 13:25:56.000000000 +0000
2583 + * linux/include/asm-arm/arch-psionw/hardware.h
2585 + * Copyright (C) 2000 Deep Blue Solutions Ltd.
2587 + * This program is free software; you can redistribute it and/or modify
2588 + * it under the terms of the GNU General Public License as published by
2589 + * the Free Software Foundation; either version 2 of the License, or
2590 + * (at your option) any later version.
2592 + * This program is distributed in the hope that it will be useful,
2593 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2594 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2595 + * GNU General Public License for more details.
2597 + * You should have received a copy of the GNU General Public License
2598 + * along with this program; if not, write to the Free Software
2599 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2602 +#ifndef __ASM_ARCH_HARDWARE_H
2603 +#define __ASM_ARCH_HARDWARE_H
2605 +#include <linux/config.h>
2607 +#define PSIONW_VIRT_BASE 0xdf000000
2608 +#define PSIONW_BASE PSIONW_VIRT_BASE
2610 +#define IO_BASE PSIONW_VIRT_BASE
2611 +#define PCIO_BASE IO_BASE
2613 +#ifndef __ASSEMBLY__
2614 +extern unsigned int psionw_read_rtc(void);
2615 +extern void psionw_write_rtc(unsigned int xrtc);
2616 +extern unsigned int psionw_read_rtc_alarm(void);
2617 +extern void psionw_write_rtc_alarm(unsigned int xrtc);
2621 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/ide.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/ide.h
2622 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/ide.h 1970-01-01 00:00:00.000000000 +0000
2623 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/ide.h 2004-03-09 13:25:56.000000000 +0000
2626 + * linux/include/asm-arm/arch-psionw/ide.h
2628 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
2630 + * Contains code from the Psion 5 ETNA driver for linux,
2631 + * Copyright (C) 1999 Werner Almesberger.
2633 + * Some code based on the code from sa1100 ide.h
2634 + * Copyright (c) 1998 Hugo Fiennes & Nicolas Pitre
2638 +#include <linux/config.h>
2639 +#include <asm/irq.h>
2640 +#include <asm/hardware.h>
2641 +#include <asm/mach-types.h>
2642 +#include <asm/hardware/psionw.h>
2644 +#include <../drivers/pcmcia/psion_etna.h>
2646 +#if !defined(CONFIG_PSIONW_REVO) && !defined(CONFIG_PSIONW_REVOPLUS)
2648 +//#define DISK_RECOVERY_TIME 500
2649 +#define WAIT_DRQ (50*HZ/100) /* 50msec - spec allows up to 20ms */
2650 +#define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
2651 +#define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
2652 +//#define CONFIG_BLK_DEV_IDEDMA 1
2655 + * We need to override the default insw and outsw, as the ETNA
2656 + * chip does automatic word to half-word translation. For some
2657 + * weird reason the translation only seems to happen for IDE cards.
2658 + * See also etna_insw_direct() and etna_outsw_direct().
2660 +#define insw(p,d,l) etna_insw_ide(p,d,l)
2661 +#define outsw(p,d,l) etna_outsw_ide(p,d,l)
2663 +static __inline__ void
2664 +ide_init_hwif_ports(hw_regs_t * hw, int data_port, int ctrl_port, int *irq)
2671 + * The CF card is not powered up on 5mx Pro when
2672 + * booting without Epoc. Optionally this is not
2673 + * needed for 5mx, as ETNA is already powered.
2674 + * Also the cold init resets the Epoc CF config.
2678 + memset(hw, 0, sizeof (*hw));
2680 + reg = (ide_ioreg_t) data_port;
2682 + for (i = IDE_DATA_OFFSET; i <= IDE_STATUS_OFFSET; i++) {
2683 + hw->io_ports[i] = reg;
2687 + hw->io_ports[IDE_CONTROL_OFFSET] = (ide_ioreg_t) ctrl_port;
2690 +static __inline__ void
2691 +ide_init_default_hwifs(void)
2695 + /* init the interface */
2696 + ide_init_hwif_ports(&hw, 0x1f0, 0x3f6, NULL);
2697 + hw.irq = IRQ_EINT1;
2698 + ide_register_hw(&hw, NULL);
2701 +#endif /* End ifndef CONFIG_PSIONW_REVO */
2702 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/io.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/io.h
2703 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/io.h 1970-01-01 00:00:00.000000000 +0000
2704 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/io.h 2004-03-09 13:25:56.000000000 +0000
2707 + * linux/include/asm-arm/arch-psionw/io.h
2709 + * Copyright (C) 1999 ARM Limited
2711 + * This program is free software; you can redistribute it and/or modify
2712 + * it under the terms of the GNU General Public License as published by
2713 + * the Free Software Foundation; either version 2 of the License, or
2714 + * (at your option) any later version.
2716 + * This program is distributed in the hope that it will be useful,
2717 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
2718 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
2719 + * GNU General Public License for more details.
2721 + * You should have received a copy of the GNU General Public License
2722 + * along with this program; if not, write to the Free Software
2723 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
2726 +#include <asm/hardware/psionw.h>
2727 +#include <asm/delay.h>
2729 +#ifndef __ASM_ARM_ARCH_IO_H
2730 +#define __ASM_ARM_ARCH_IO_H
2732 +#define IO_SPACE_LIMIT 0xffffffff
2738 +#define __io(a) ((a))
2739 +#define __mem_pci(a) ((unsigned long)(a))
2740 +#define __mem_isa(a) ((unsigned long)(a))
2742 +#define etna_readb(p) (*(volatile u8 *)(ETNA_V_BASE + (p)))
2743 +#define etna_writeb(v,p) (*(volatile u8 *)(ETNA_V_BASE + (p)) = (v))
2745 +#define etna_readl(p) (*(volatile unsigned int *)(ETNA_V_BASE + (p)))
2748 + * Epoc boot EEPROM reading. Writing would be dangerous, as there is
2749 + * no known alternate boot method.
2751 +#define psion_br_read(p) (*(volatile u8 *)(PSION_V_BR + (p)))
2754 + * Epoc boot flash reading. Writing would be dangerous, as there is
2755 + * no known alternate boot method.
2757 +#define psion_bf_read(p) (*(volatile u8 *)(PSION_V_BF + (p)))
2759 +#define DEBUG_MEM_BASE() ({ printk(" 0x%02x-0x%02x", \
2760 + (*(volatile u8 *)(CF1_V_BASE + CF_MEM_BASE + 0x2)), \
2761 + (*(volatile u8 *)(CF1_V_BASE + CF_MEM_BASE + 0x7))); })
2763 +#define ETNA_GET_MEMBASE(p) (*(volatile u8 *)(CF1_V_BASE + CF_MEM_BASE + (p)))
2766 + * Reads the CompactFlash ready status. Defined at least for SanDisk cards.
2767 + * 0x1f7 clears the pending interrupt, while 0x3f6 does not.
2769 +#define CF_GET_STAT() (*(volatile u8 *)(CF1_V_BASE + CF_IO8_BASE + 0x1f7))
2770 +#define CF_GET_ALTSTAT() (*(volatile u8 *)(CF1_V_BASE + CF_IO8_BASE + 0x3f6))
2771 +#define CF_CARD_BUSY_BIT (1 << 7)
2773 +#define etna_mem_inb(p) ({ unsigned int __v =__raw_readb(CF1_V_BASE + CF_MEM_BASE + (p)); __v; })
2775 +#define etna_mem_outb(v,p) __raw_writeb(v, CF1_V_BASE + CF_MEM_BASE + (p))
2778 + * Most CF cards need an extra delay before a 16-bit write.
2779 + * Otherwise we may get tons of ide status=0x58 errors and a
2780 + * corrupted disk. The delay time needed depends on the card
2781 + * and needs to be somewhere between 300 and 1500.
2783 + * The problem happens in the following way:
2785 + * 1. Ide driver issues a write command to the 8-bit command bus
2786 + * 2. CompactFlash card sets DRQ etc
2787 + * 3. Ide driver waits for not busy and checks for DRQ etc
2788 + * 4. Ide driver starts to write the data to the 16-bit bus
2789 + * 5. Ide driver checks for a successful write
2790 + * 6. CompactFlash card still expects more data, and gives status 0x58
2791 + * 7. Ide driver produces an error, as it expects 0x50 but gets 0x58
2793 + * So it looks like the Psion 32-bit to 16-bit translation bus is not
2794 + * ready to accept data, and the beginning of the write never makese it
2795 + * to the CompactFlash.
2797 +static __inline__ void
2798 +etna_status_check(void)
2802 + psionw_writeb(psionw_readb(PBDDR) | 0x3, PBDDR);
2803 + psionw_writeb(psionw_readb(PBDR) & ~0x3, PBDR);
2805 + psionw_writeb(psionw_readb(PBDDR) & ~0x3, PBDDR);
2806 + while ((psionw_readb(PBDR) & 0x3) != 0x3) {
2816 +/* Boundary alignment for ETNA CF access, not currently used */
2817 +#define PCMCIA_IO16(a) (CF1_V_BASE + 0x0c000000 + ((a) & ~3) + (((a) & 2) << 24) )
2820 +#define INSW_DEBUG(x...) printk(x)
2822 +#define INSW_DEBUG(x...) do { ; } while(0)
2826 + * Translate a series of N x 16-bit reads into N x 32-bit reads
2828 + * Used for ide flash cards only. The automatic translation does not work for
2829 + * network cards, for example. See also etna_insw_direct.
2831 +static __inline__ void
2832 +etna_insw_ide(unsigned int port, void *to, int len)
2836 + for (i = 0; i < len; i++) {
2837 + ((unsigned short *) to)[i] = (unsigned short) __raw_readl(CF1_V_BASE + CF_IO16_BASE + port);
2838 + //((unsigned short *) to)[i] = (unsigned short) (__raw_readl(PCMCIA_IO16(port)) & 0xffff);
2843 + * Translate a series of N x 16-bit reads into N/2 x 32-bit reads for ETNA.
2845 + * Used for non-ide cards.
2847 +static __inline__ void
2848 +etna_insw_direct(unsigned int port, void *to, int len)
2852 + INSW_DEBUG("\nI <--- Reading %d half words from port 0x%04x\n", len, port);
2853 + for (i = 0; i < len; i++) {
2855 + val = __raw_readl(CF1_V_BASE + CF_IO16_BASE + port);
2856 + INSW_DEBUG(" +<-- 0x%08x\n", val);
2857 + ((unsigned short *) to)[i - 1] = (unsigned short) (val & 0xffff);
2858 + ((unsigned short *) to)[i] = (unsigned short) (val >> 16);
2859 + INSW_DEBUG(" +<-- flush to[%d] = 0x%04x to[%d] = 0x%04x\n", i - 1,
2860 + ((unsigned short *) to)[i - 1], i,
2861 + ((unsigned short *) to)[i]);
2866 + val = __raw_readl(CF1_V_BASE + CF_IO16_BASE + port);
2867 + ((unsigned short *) to)[len - 1] = (unsigned short) (val & 0xffff);
2868 + INSW_DEBUG(" +<-- flush to[%d] = 0x%04x\n", len - 1,
2869 + ((unsigned short *) to)[i - 1]);
2875 +#define OUTSW_DEBUG(x...) printk(x)
2877 +#define OUTSW_DEBUG(x...) do { ; } while(0)
2881 + * Capures selected IO port values for debugging
2883 +static __inline__ void
2884 +psion_debug_regb(char *res, char* desc, unsigned int port, int range)
2891 + len = strlen(res);
2896 + sprintf(res, "%s 0x%08x: ", desc, port);
2897 + res += strlen(desc) + 13;
2899 + for (i = 0; i < range; i++) {
2900 + sprintf(res, "0x%02x ", __raw_readb(port + i));
2903 + //sprintf(res, "\n");
2906 + //sprintf(res, "\0");
2913 + * Translate a series of N x 16-bit writes into N x 32-bit writes
2915 + * Used for ide flash cards only. The automatic translation does not work for
2916 + * network cards, for example. See also etna_outsw_direct.
2918 +static __inline__ void
2919 +etna_outsw_ide(unsigned int port, const void *from, int len)
2923 + etna_status_check();
2925 + for (i = 0; i < len; i++) {
2926 + __raw_writel(((unsigned short *) from)[i], CF1_V_BASE + CF_IO16_BASE + port);
2927 + //__raw_writel(((unsigned short *) from)[i], PCMCIA_IO16(port));
2932 + * Translate a series of N x 16-bit writes into N/2 x 32-bit writes for ETNA.
2934 + * Used for non-ide cards.
2936 +static __inline__ void
2937 +etna_outsw_direct(unsigned int port, const void *from, int len)
2939 + int i, val, prev = 0;
2941 + OUTSW_DEBUG("\nO ---> Writing %d half words to port 0x%04x\n", len, port);
2943 + for (i = 0; i < len; i++) {
2944 + val = (unsigned int) ( ((unsigned short *) from)[i] );
2946 + OUTSW_DEBUG(" +--> 0x%04x\n", val);
2949 + __raw_writel( ((val<<16) | prev), CF1_V_BASE+CF_IO16_BASE+port);
2950 + OUTSW_DEBUG(" +--> flush 0x%08x\n", ((val<<16) | prev));
2955 + __raw_writel( (val), CF1_V_BASE+CF_IO16_BASE+port);
2956 + OUTSW_DEBUG(" +--> flush 0x%08x\n", (val));
2961 +#define outb(v,p) __raw_writeb(v, CF1_V_BASE + CF_IO8_BASE + (p))
2962 +#define outw(v,p) __raw_writel(v, CF1_V_BASE + CF_IO16_BASE + (p))
2963 +#define outl(v,p) printk("Error: Unsupported outl called 0x%x\n", (p))
2965 +#define inb(p) ({ unsigned int __v =__raw_readb(CF1_V_BASE + CF_IO8_BASE + (p)); __v; })
2966 +#define inw(p) ({ unsigned int __v =__raw_readl(CF1_V_BASE + CF_IO16_BASE + (p)) & 0xffff; __v; })
2967 +#define inl(p) printk("Error: Unsupported inl called 0x%x\n", (p))
2969 +#define outsb(p,d,l) __raw_writesb(CF1_V_BASE + CF_IO8_BASE + p,d,l)
2970 +#define outsw(p,d,l) etna_outsw_direct(p,d,l)
2971 +#define outsl(p,d,l) printk("Error: Unsupported outsl called 0x%x\n", (p))
2973 +#define insb(p,d,l) __raw_readsb(CF1_V_BASE + CF_IO8_BASE + p,d,l)
2974 +#define insw(p,d,l) etna_insw_direct(p,d,l)
2975 +#define insl(p,d,l) printk("Error: Unsupported insl called 0x%x\n", (p))
2979 + * ioremap support - validate a PCI memory address, and convert it
2980 + * to a physical address for the page tables.
2982 +#define iomem_valid_addr(iomem,size) (1)
2983 +#define iomem_to_phys(iomem) (iomem)
2986 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/irqs.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/irqs.h
2987 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/irqs.h 1970-01-01 00:00:00.000000000 +0000
2988 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/irqs.h 2004-03-09 13:25:56.000000000 +0000
2991 + * linux/include/asm-arm/arch-psionw/irqs.h
2993 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
2994 + * Copyright (C) 2001 Yuji Shinokawa <ysh@mob.or.jp>
2996 + * This program is free software; you can redistribute it and/or modify
2997 + * it under the terms of the GNU General Public License as published by
2998 + * the Free Software Foundation; either version 2 of the License, or
2999 + * (at your option) any later version.
3001 + * This program is distributed in the hope that it will be useful,
3002 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3003 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3004 + * GNU General Public License for more details.
3006 + * You should have received a copy of the GNU General Public License
3007 + * along with this program; if not, write to the Free Software
3008 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3012 + * Interrupts from INTSR1
3014 +#define IRQ_EXTFIQ 0 /* External fiq (Nextfiq pin) */
3015 +#define IRQ_BLINT 1 /* Battery low */
3016 +#define IRQ_WEINT 2 /* Watch dog expired */
3017 +#define IRQ_MCINT 3 /* Media changed */
3018 +#define IRQ_CSINT 4 /* Sound codec */
3019 +#define IRQ_EINT1 5 /* CF card, external 1 (Neint1 pin) */
3020 +#define IRQ_EINT2 6 /* External 2 (Neint2 pin) */
3021 +#define IRQ_EINT3 7 /* Touch panel, external 3 (Neint3 pin) */
3022 +#define IRQ_TC1OI 8 /* TC1 under flow */
3023 +#define IRQ_TC2OI 9 /* TC2 under flow */
3024 +#define IRQ_RTCMI 10 /* RTC compare match */
3025 +#define IRQ_TINT 11 /* 64Hz tick */
3026 +#define IRQ_UART1 12 /* Uart1 */
3027 +#define IRQ_UART2 13 /* Uart2 */
3028 +#define IRQ_LCDINT 14 /* LCD */
3029 +#define IRQ_SSEOTI 15 /* SSI */
3032 + * Define the irqs in use, and the irqs that need custom handling with
3033 + * mask_ack_irq_int1
3035 +#define INT1_IRQS (0x0000ffff)
3036 +#define INT1_ACK_IRQS (0x00000f50)
3040 +/* First four interrupts are FIQs */
3041 +#define FIQ_START 0
3043 +/* This is needed by rtc.c */
3045 +#define RTC_IRQ IRQ_RTCMI
3046 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/keyboard.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/keyboard.h
3047 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/keyboard.h 1970-01-01 00:00:00.000000000 +0000
3048 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/keyboard.h 2004-03-09 13:25:56.000000000 +0000
3051 + * linux/include/asm-arm/arch-psionw/keyboard.h
3053 + * Copyright (C) 1998 Russell King
3054 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
3056 + * This program is free software; you can redistribute it and/or modify
3057 + * it under the terms of the GNU General Public License as published by
3058 + * the Free Software Foundation; either version 2 of the License, or
3059 + * (at your option) any later version.
3061 + * This program is distributed in the hope that it will be useful,
3062 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3063 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3064 + * GNU General Public License for more details.
3066 + * You should have received a copy of the GNU General Public License
3067 + * along with this program; if not, write to the Free Software
3068 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3071 +#define NR_KEYCODES 64
3072 +#if NR_KEYCODES>0x80
3073 +#error Out of bits for scancode
3076 +#define SYSRQ_KEY 0x100 /* dummy */
3078 +extern int kbdpsion_translate(unsigned char scancode, unsigned char *keycode_p);
3079 +extern void kbdpsion_hw_init(void);
3080 +extern unsigned char kbdpsion_sysrq_xlate[NR_KEYCODES];
3081 +extern void psion_arch_handler(unsigned char value, char up_flag);
3083 +#define kbd_setkeycode(x...) (-EINVAL)
3084 +#define kbd_getkeycode(x...) (-EINVAL)
3085 +#define kbd_translate(sc,kc,rm) kbdpsion_translate(sc,kc)
3086 +#define kbd_unexpected_up(kc) (0x80)
3087 +#define kbd_enable_irq(x...) do { } while (0)
3088 +#define kbd_disable_irq(x...) do { } while (0)
3089 +#define kbd_leds(x...) do { } while (0)
3090 +#define kbd_init_hw() kbdpsion_hw_init()
3091 +#define kbd_sysrq_xlate ((sysrq_pressed = 0), kbdpsion_sysrq_xlate)
3092 +#define kbd_arch_handler psion_arch_handler
3093 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/memory.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/memory.h
3094 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/memory.h 1970-01-01 00:00:00.000000000 +0000
3095 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/memory.h 2004-03-09 13:25:56.000000000 +0000
3098 + * linux/include/asm-arm/arch-psionw/memory.h
3100 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
3102 + * Based on the sa1100 code, some portions of the code
3103 + * Copyright (c) 1999 Nicolas Pitre <nico@cam.org>
3105 + * This program is free software; you can redistribute it and/or modify
3106 + * it under the terms of the GNU General Public License as published by
3107 + * the Free Software Foundation; either version 2 of the License, or
3108 + * (at your option) any later version.
3110 + * This program is distributed in the hope that it will be useful,
3111 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3112 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3113 + * GNU General Public License for more details.
3115 + * You should have received a copy of the GNU General Public License
3116 + * along with this program; if not, write to the Free Software
3117 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3120 +#ifndef __ASM_ARCH_MMU_H
3121 +#define __ASM_ARCH_MMU_H
3126 +#define TASK_SIZE (0xc0000000UL)
3127 +#define TASK_SIZE_26 (0x04000000UL)
3130 + * This decides where the kernel will search for a free chunk of vm
3131 + * space during mmap's.
3133 +#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
3136 + * Page offset: 3GB
3138 +#define PAGE_OFFSET (0xc0000000UL)
3139 +#define PHYS_OFFSET (0xc0000000UL)
3142 + * We take advantage of the fact that physical and virtual address can be the
3143 + * same. The NUMA code is handling the large holes that might exist between
3144 + * all memory banks.
3146 +#define __virt_to_phys__is_a_macro
3147 +#define __phys_to_virt__is_a_macro
3148 +#define __virt_to_phys(x) (x)
3149 +#define __phys_to_virt(x) (x)
3152 + * Virtual view <-> DMA view memory address translations
3153 + * virt_to_bus: Used to translate the virtual address to an
3154 + * address suitable to be passed to set_dma_addr
3155 + * bus_to_virt: Used to convert an address for DMA operations
3156 + * to an address that the kernel can use.
3158 + * On the PSIONW, bus addresses are equivalent to physical addresses.
3159 + * FIXME5MX: This may not be needed
3161 +#define __virt_to_bus__is_a_macro
3162 +#define __bus_to_virt__is_a_macro
3163 +#define __virt_to_bus(x) __virt_to_phys(x)
3164 +#define __bus_to_virt(x) __phys_to_virt(x)
3166 +#ifdef CONFIG_DISCONTIGMEM
3170 + * Currently defined in arch/arm/mm/mm-sa1100.c
3173 +#define NODE_MAX_MEM_SHIFT 27
3174 +#define NODE_MAX_MEM_SIZE (1<<NODE_MAX_MEM_SHIFT)
3177 + * Given a kernel address, find the home node of the underlying memory.
3179 +#define KVADDR_TO_NID(addr) \
3180 + (((unsigned long)(addr) - PAGE_OFFSET) >> NODE_MAX_MEM_SHIFT)
3183 + * Given a page frame number, convert it to a node id.
3185 +#define PFN_TO_NID(pfn) \
3186 + (((pfn) - PHYS_PFN_OFFSET) >> (NODE_MAX_MEM_SHIFT - PAGE_SHIFT))
3189 + * Given a kaddr, ADDR_TO_MAPBASE finds the owning node of the memory
3190 + * and returns the mem_map of that node.
3192 +#define ADDR_TO_MAPBASE(kaddr) \
3193 + NODE_MEM_MAP(KVADDR_TO_NID((unsigned long)(kaddr)))
3195 +#define PFN_TO_MAPBASE(pfn) NODE_MEM_MAP(PFN_TO_NID(pfn))
3198 + * Given a kaddr, LOCAL_MAR_NR finds the owning node of the memory
3199 + * and returns the index corresponding to the appropriate page in the
3202 +#define LOCAL_MAP_NR(addr) \
3203 + (((unsigned long)(addr) & (NODE_MAX_MEM_SIZE - 1)) >> PAGE_SHIFT)
3206 +#error "CONFIG_DISCONTIGMEM is needed for Psion"
3207 +#endif /* CONFIG_DISCONTIGMEM */
3210 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/param.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/param.h
3211 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/param.h 1970-01-01 00:00:00.000000000 +0000
3212 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/param.h 2004-03-09 13:25:56.000000000 +0000
3215 + * linux/include/asm-arm/arch-psionw/param.h
3217 + * Copyright (C) 2000 Deep Blue Solutions Ltd.
3219 + * This program is free software; you can redistribute it and/or modify
3220 + * it under the terms of the GNU General Public License as published by
3221 + * the Free Software Foundation; either version 2 of the License, or
3222 + * (at your option) any later version.
3224 + * This program is distributed in the hope that it will be useful,
3225 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3226 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3227 + * GNU General Public License for more details.
3229 + * You should have received a copy of the GNU General Public License
3230 + * along with this program; if not, write to the Free Software
3231 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3233 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/psionw-power.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/psionw-power.h
3234 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/psionw-power.h 1970-01-01 00:00:00.000000000 +0000
3235 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/psionw-power.h 2004-03-09 13:25:56.000000000 +0000
3238 + * linux/include/asm-arm/arch-psionw/psionw-power.h
3240 +#include <linux/delay.h>
3241 +#include <asm/io.h>
3242 +#include <asm/hardware/psionw.h>
3245 + * Starts the DC to DC converter
3248 +void start_pump(int lock)
3250 + if (psionw_readl(PUMPCON) == PUMP_STOP_VAL) {
3251 + psionw_writel(PUMP_RUN_VAL, PUMPCON);
3254 + if (!(psionw_readb(PDDR) & PDDR_PUMP_PWR1) ||
3255 + !(psionw_readb(PDDR) & PDDR_PUMP_PWR2)) {
3256 + psionw_writeb(psionw_readb(PDDR) | PDDR_PUMP_PWR1, PDDR);
3258 + psionw_writeb(psionw_readb(PDDR) | PDDR_PUMP_PWR2, PDDR);
3261 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/serial.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/serial.h
3262 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/serial.h 1970-01-01 00:00:00.000000000 +0000
3263 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/serial.h 2004-03-09 13:25:56.000000000 +0000
3266 + * include/asm-arm/arch-sa1100/serial.h
3267 + * (C) 1999 Nicolas Pitre <nico@cam.org>
3269 + * All this is intended to be used with a 16550-like UART on the SA1100's
3270 + * PCMCIA bus. It has nothing to do with the SA1100's internal serial ports.
3271 + * This is included by serial.c -- serial_sa1100.c makes no use of it.
3276 + * This assumes you have a 1.8432 MHz clock for your UART.
3278 + * It'd be nice if someone built a serial card with a 24.576 MHz
3279 + * clock, since the 16550A is capable of handling a top speed of 1.5
3280 + * megabits/second; but this requires the faster clock.
3282 +#define BASE_BAUD ( 1843200 / 16 )
3284 +/* Standard COM flags */
3285 +#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
3287 +#define RS_TABLE_SIZE 4
3291 + * Rather empty table...
3292 + * Hardwired serial ports should be defined here.
3293 + * PCMCIA will fill it dynamically.
3295 +#define STD_SERIAL_PORT_DEFNS \
3296 + /* UART CLK PORT IRQ FLAGS */ \
3297 + { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }, \
3298 + { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }, \
3299 + { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }, \
3300 + { 0, BASE_BAUD, 0, 0, STD_COM_FLAGS }
3302 +#define EXTRA_SERIAL_PORT_DEFNS
3304 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/system.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/system.h
3305 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/system.h 1970-01-01 00:00:00.000000000 +0000
3306 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/system.h 2004-03-09 13:25:56.000000000 +0000
3309 + * linux/include/asm-arm/arch-psionw/system.h
3311 + * Copyright (C) 2000 Deep Blue Solutions Ltd
3313 + * This program is free software; you can redistribute it and/or modify
3314 + * it under the terms of the GNU General Public License as published by
3315 + * the Free Software Foundation; either version 2 of the License, or
3316 + * (at your option) any later version.
3318 + * This program is distributed in the hope that it will be useful,
3319 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3320 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3321 + * GNU General Public License for more details.
3323 + * You should have received a copy of the GNU General Public License
3324 + * along with this program; if not, write to the Free Software
3325 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3328 +#ifndef __ASM_ARCH_SYSTEM_H
3329 +#define __ASM_ARCH_SYSTEM_H
3331 +#include <asm/io.h>
3332 +#include <asm/arch/hardware.h>
3333 +#include <asm/hardware/psionw.h>
3338 + psionw_writel(1, HALT);
3339 + __asm__ __volatile__(
3345 +static inline void arch_reset(char mode)
3351 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/time.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/time.h
3352 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/time.h 1970-01-01 00:00:00.000000000 +0000
3353 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/time.h 2004-03-09 13:25:56.000000000 +0000
3356 + * linux/include/asm-arm/arch-psionw/time.h
3358 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
3359 + * Copyright (C) 2001 Yuji Shinokawa <ysh@mob.or.jp>
3361 + * Based on the clps711x code, some portions of the code
3362 + * Copyright (C) 2000 Deep Blue Solutions Ltd.
3364 + * This program is free software; you can redistribute it and/or modify
3365 + * it under the terms of the GNU General Public License as published by
3366 + * the Free Software Foundation; either version 2 of the License, or
3367 + * (at your option) any later version.
3369 + * This program is distributed in the hope that it will be useful,
3370 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3371 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3372 + * GNU General Public License for more details.
3374 + * You should have received a copy of the GNU General Public License
3375 + * along with this program; if not, write to the Free Software
3376 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3378 + * 2001/02/22 Modified for Psion 5MX by Tony Lindgren <tony@atomide.com>
3380 + * 15 Mar 2001 Yuji Shinokawa <ysh@mob.or.jp>
3381 + * Added to call do_set_rtc() in psionw_timer_interrupt() to adjust RTC.
3382 + * Adjust xtime.tv_sec for CONFIG_ARCH_PSIONW.
3385 +#include <asm/system.h>
3386 +#include <asm/leds.h>
3387 +#include <asm/hardware/psionw.h>
3389 +#define RTC_PORT(x) (PSIONW_BASE + x)
3392 + * IRQ handler for the timer
3395 +psionw_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3402 + return IRQ_HANDLED;
3406 + * Set up timer interrupt, and return the current time in seconds.
3408 +extern __inline__ void
3409 +psionw_setup_timer(void)
3411 + unsigned int timer = 0;
3412 + timer = psionw_readl(TC2CTRL);
3413 + timer |= TC_CLKSEL; /* 512kHz mode */
3414 + timer |= TC_MODE; /* Periodic mode */
3415 + timer |= TC_ENABLE;
3416 + psionw_writel(timer, TC2CTRL);
3417 + psionw_writel(5119, TC2LOAD); /* 512kHz / 100Hz - 1 */
3418 + timer_irq.handler = psionw_timer_interrupt;
3422 + * Set up timer interrupt, and return the current time in seconds.
3424 +void __init time_init(void)
3426 + psionw_setup_timer();
3427 + timer_irq.handler = psionw_timer_interrupt;
3428 + setup_irq(IRQ_TC2OI, &timer_irq);
3430 + xtime.tv_sec = (psionw_readl(RTCDRU) << 16);
3431 + xtime.tv_sec |= (psionw_readl(RTCDRL) & 0xffff);
3433 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/timex.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/timex.h
3434 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/timex.h 1970-01-01 00:00:00.000000000 +0000
3435 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/timex.h 2004-03-09 13:25:56.000000000 +0000
3438 + * linux/include/asm-arm/arch-psionw/timex.h
3440 + * Prospector 720T architecture timex specifications
3442 + * Copyright (C) 2000 Deep Blue Solutions Ltd.
3444 + * This program is free software; you can redistribute it and/or modify
3445 + * it under the terms of the GNU General Public License as published by
3446 + * the Free Software Foundation; either version 2 of the License, or
3447 + * (at your option) any later version.
3449 + * This program is distributed in the hope that it will be useful,
3450 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3451 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3452 + * GNU General Public License for more details.
3454 + * You should have received a copy of the GNU General Public License
3455 + * along with this program; if not, write to the Free Software
3456 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3458 +#define CLOCK_TICK_RATE 512000
3459 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/uncompress.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/uncompress.h
3460 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/uncompress.h 1970-01-01 00:00:00.000000000 +0000
3461 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/uncompress.h 2004-03-09 13:25:56.000000000 +0000
3464 + * linux/include/asm-arm/arch-psionw/uncompress.h
3466 + * Copyright (C) 2000 Deep Blue Solutions Ltd
3468 + * This program is free software; you can redistribute it and/or modify
3469 + * it under the terms of the GNU General Public License as published by
3470 + * the Free Software Foundation; either version 2 of the License, or
3471 + * (at your option) any later version.
3473 + * This program is distributed in the hope that it will be useful,
3474 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3475 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3476 + * GNU General Public License for more details.
3478 + * You should have received a copy of the GNU General Public License
3479 + * along with this program; if not, write to the Free Software
3480 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3483 +#include <asm/arch/io.h>
3484 +#include <asm/arch/hardware.h>
3485 +#include <asm/hardware/psionw.h>
3488 +#define PSIONW_BASE PSIONW_PHYS_BASE
3490 +#define __raw_readl(p) (*(unsigned long *)(p))
3491 +#define __raw_writel(v,p) (*(unsigned long *)(p) = (v))
3494 + * This does not append a newline
3497 +puts(const char *s)
3501 + while ((c = *s++) != '\0') {
3504 + serial_printf('\r');
3512 +#define arch_decomp_setup()
3514 +#define arch_decomp_wdog()
3515 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/vmalloc.h linux-2.6.4-rc2/include/asm-arm/arch-psionw/vmalloc.h
3516 --- linux-2.6.4-rc2.org/include/asm-arm/arch-psionw/vmalloc.h 1970-01-01 00:00:00.000000000 +0000
3517 +++ linux-2.6.4-rc2/include/asm-arm/arch-psionw/vmalloc.h 2004-03-09 13:25:56.000000000 +0000
3520 + * linux/include/asm-arm/arch-psionw/vmalloc.h
3522 + * Copyright (C) 2000 Deep Blue Solutions Ltd.
3524 + * This program is free software; you can redistribute it and/or modify
3525 + * it under the terms of the GNU General Public License as published by
3526 + * the Free Software Foundation; either version 2 of the License, or
3527 + * (at your option) any later version.
3529 + * This program is distributed in the hope that it will be useful,
3530 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3531 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3532 + * GNU General Public License for more details.
3534 + * You should have received a copy of the GNU General Public License
3535 + * along with this program; if not, write to the Free Software
3536 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3540 + * Just any arbitrary offset to the start of the vmalloc VM area: the
3541 + * current 8MB value just means that there will be a 8MB "hole" after the
3542 + * physical memory until the kernel virtual memory starts. That means that
3543 + * any out-of-bounds memory accesses will hopefully be caught.
3544 + * The vmalloc() routines leaves a hole of 4kB between each vmalloced
3545 + * area for the same reason. ;)
3547 +#define VMALLOC_OFFSET (8*1024*1024)
3548 +#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & \
3549 + ~(VMALLOC_OFFSET-1))
3550 +#define VMALLOC_VMADDR(x) ((unsigned long)(x))
3551 +#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
3553 +#define MODULE_START (PAGE_OFFSET - 16*1048576)
3554 +#define MODULE_END (PAGE_OFFSET)
3555 diff -Nur linux-2.6.4-rc2.org/include/asm-arm/hardware/psionw.h linux-2.6.4-rc2/include/asm-arm/hardware/psionw.h
3556 --- linux-2.6.4-rc2.org/include/asm-arm/hardware/psionw.h 1970-01-01 00:00:00.000000000 +0000
3557 +++ linux-2.6.4-rc2/include/asm-arm/hardware/psionw.h 2004-03-09 13:25:56.000000000 +0000
3560 + * linux/include/asm-arm/hardware/psionw.h
3562 + * This file contains the hardware definitions of the PSIONW internal
3565 + * Copyright (C) 2001 Tony Lindgren <tony@atomide.com>
3566 + * Copyright (C) 2001 Yuji Shinokawa <ysh@mob.or.jp>
3568 + * This program is free software; you can redistribute it and/or modify
3569 + * it under the terms of the GNU General Public License as published by
3570 + * the Free Software Foundation; either version 2 of the License, or
3571 + * (at your option) any later version.
3573 + * This program is distributed in the hope that it will be useful,
3574 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3575 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
3576 + * GNU General Public License for more details.
3578 + * You should have received a copy of the GNU General Public License
3579 + * along with this program; if not, write to the Free Software
3580 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
3582 + * ************************ NOTE FOR DEVELOPERS ***************************
3584 + * Please see also the "Windermere Software Interface Specification"
3585 + * PDF file. (Series_5mx_specs.pdf)
3587 + * This file is not publicly available, but is available for Linux
3588 + * developers without a NDA. Thank you Psion!
3590 + * Please contact the PsiLinux mailing list at:
3592 + * linux-7110-psion@lists.sourceforge.net
3594 + * to get a copy of this file.
3596 + * ************************************************************************
3599 +#ifndef __ASM_HARDWARE_PSIONW_H
3600 +#define __ASM_HARDWARE_PSIONW_H
3602 +#define PSIONW_PHYS_BASE (0x80000000)
3604 +#ifndef __ASSEMBLY__
3605 +#define psionw_readb(off) __raw_readb(PSIONW_BASE + (off))
3606 +#define psionw_readl(off) __raw_readl(PSIONW_BASE + (off))
3607 +#define psionw_writeb(val,off) __raw_writeb(val, PSIONW_BASE + (off))
3608 +#define psionw_writel(val,off) __raw_writel(val, PSIONW_BASE + (off))
3615 +#define PSION_HSW (0x02 << 10) /* Horiz sync pulse width */
3616 +#define PSION_HFP (0x01 << 16) /* Horiz front porch */
3617 +#define PSION_HBP (0x01 << 24) /* Horiz back porch */
3619 +#define PSION_VSW (0x02 << 10) /* Vert sync pulse width */
3620 +#define PSION_VFP (0x01 << 16) /* Vert front porch */
3621 +#define PSION_VBP (0x01 << 24) /* Vert back porch */
3623 +#if defined(CONFIG_PSIONW_REVO) || defined(CONFIG_PSIONW_REVOPLUS)
3624 +#define PSION_LCD_W 480 /* LCD width */
3625 +#define PSION_LCD_H 160 /* LCD heigth */
3626 +#define PSION_ACB (0xc << 8) /* AC-bias frequency */
3628 +#define PSION_LCD_W 640 /* LCD width */
3629 +#define PSION_LCD_H 240 /* LCD height */
3630 +#define PSION_ACB (0xb << 8) /* AC-bias frequency */
3633 +#define PSION_LCD_OFF 0xd000 /* LCD memory start offset */
3634 +#define LCD_PAL_SIZE (0x20) /* LCD palette size */
3635 +#define LCD_BUF_SIZE (PSION_LCD_W*PSION_LCD_H*4/8) /* LCD buffer size */
3636 +#define LCD_MEM_SIZE (LCD_PAL_SIZE + LCD_BUF_SIZE) /* LCD memory size */
3637 +#define LCD_MEM_START PAGE_OFFSET + PSION_LCD_OFF /* LCD memory start offset */
3638 +#define LCD_PAL_START LCD_MEM_START /* LCD palette start offset */
3639 +#define LCD_BUF_START LCD_PAL_START + LCD_PAL_SIZE /* LCD buffer start offset */
3641 +#define LCDCTL (0x0200)
3642 +#define LCDCTL_EN (1 << 0)
3643 +#define LCDCTL_BW (1 << 1)
3644 +#define LCDCTL_DP (1 << 2)
3645 +#define LCDCTL_DONE (1 << 3)
3646 +#define LCDCTL_NEXT (1 << 4)
3647 +#define LCDCTL_ERR (1 << 5)
3648 +#define LCDCTL_TFT (1 << 7)
3649 +#define LCDCTL_M8B (1 << 8)
3651 +#define LCDST (0x0204)
3652 +#define LCDST_NEXT (1 << 1)
3653 +#define LCDST_BER (1 << 2)
3654 +#define LCDST_ABC (1 << 3)
3655 +#define LCDST_FUF (1 << 5)
3657 +#define LCD_DBAR1 (0x0210)
3659 +#define LCDT0 (0x0220)
3660 +#define LCDT1 (0x0224)
3661 +#define LCDT2 (0x0228)
3662 +#define LCDT2_IVS (1 << 20)
3663 +#define LCDT2_IHS (1 << 21)
3664 +#define LCDT2_IPC (1 << 22)
3665 +#define LCDT2_IEO (1 << 23)
3667 +#define LCD_DEF_CMASK (0x10) /* Default value for the LCD contrast */
3670 + * ETNA PCMCIA Controller
3672 +#if defined(CONFIG_PSIONW_5MXPRO24MB) || defined(CONFIG_PSIONW_5MXPRO32MB)
3673 +#define ETNA_P_BASE 0x50000000 /* ETNA controller physical base */
3675 +#define ETNA_P_BASE 0x20000000 /* ETNA controller physical base */
3678 +#define ETNA_V_BASE 0xde000000 /* ETNA controller virtual base */
3679 +#define ETNA_SIZE 0x00100000 /* ETNA controller size */
3681 +#define ETNA_UNKNOWN_0 0x0 /* Seems to be always 0x0f */
3682 +#define ETNA_UNKNONW_1 0x1 /* Seems to be always 0x00 */
3683 +#define ETNA_UNKNOWN_2 0x2 /* Seems to be always 0x02 */
3684 +#define ETNA_UNKNOWN_3 0x3 /* Seems to be always 0x00 */
3685 +#define ETNA_UNKNOWN_4 0x4 /* Seems to be always 0x00 */
3686 +#define ETNA_UNKNOWN_5 0x5 /* Seems to be always 0x00 */
3687 +#define ETNA_INT_STATUS 0x6 /* ETNA interrupt Status */
3688 +#define ETNA_INT_MASK 0x7 /* ETNA interrupt Mask */
3689 +#define ETNA_INT_CLEAR 0x8 /* ETNA interrupt Clear */
3690 +#define ETNA_SKT_STATUS 0x9 /* Socket status ??? */
3691 +#define ETNA_SKT_CFG 0xa /* Socket config ??? */
3692 +#define ETNA_SKT_CTRL 0xb /* Enable socket ??? */
3693 +#define ETNA_WAKE_1 0xc /* Socket wake up; Usually 0x88, goes to 0x00 after STBY */
3694 +#define ETNA_SKT_ACTIVE 0xd /* Socket active ??? */
3695 +#define ETNA_UNKNOWN_E 0xe /* Seems to be always 0x00 */
3696 +#define ETNA_WAKE_2 0xf /* Socket wake up; Usually 0x10, goes to 0x00 after STBY */
3698 +#define SKT_BUSY (1 << 0) /* ETNA socket busy */
3699 +#define SKT_NOT_READY (1 << 1) /* ETNA socket not ready */
3700 +#define SKT_CARD_OUT (1 << 2) /* ETNA card out */
3702 +#define ETNA_CARD_INT (1 << 0) /* ETNA card interrupt */
3703 +#define ETNA_BUSY_INT (1 << 2) /* ETNA socket interrupt */
3704 +#define ETNA_SOCK_INT1 (1 << 4)
3705 +#define ETNA_SOCK_INT2 (1 << 5)
3707 +#define CARD_INT_MASK 0x05 /* Normal card interrupt = ETNA_CARD_INT | ETNA_BUSY_INT */
3708 +#define ETNA_CLEAR_MASK 0xff /* Clear ETNA interrupt */
3709 +#define ETNA_CF_IRQ 0x01 /* Enable ETNA Interrupt */
3711 +#if defined(CONFIG_PSIONW_5MXPRO24MB) || defined(CONFIG_PSIONW_5MXPRO32MB)
3712 +#define CF1_P_BASE 0x30000000 /* PCMCIA physical base */
3714 +#define CF1_P_BASE 0x40000000 /* PCMCIA physical base */
3717 +#define CF1_V_BASE 0xe0000000 /* PCMCIA virtual base */
3718 +#define CF_SIZE 0x10000000 /* 4 areas of 64MB each */
3719 +#define CF_ATTR_BASE 0x00000000 /* This is needed, or it won't work!!! */
3720 +#define CF_MEM_BASE 0x04000000 /* Address bit 26 set */
3721 +#define CF_IO8_BASE 0x08000000 /* Address bit 27 set */
3722 +#define CF_IO16_BASE 0x0c000000 /* Address bits 26 & 27 set */
3724 +#define CF_CFG_REG 0x003c
3725 +#define CF_CFG_VAL 0x00730069 /* Epoc value from e 0x5801603c in ArLo */
3726 +#define CF_CUR_CFG 0x200
3729 + * Boot EEPROM used by Epoc (Verified on 5mx Pro 32MB only)
3731 +#define PSION_P_BR 0x00000000
3732 +#define PSION_V_BR 0xde200000
3733 +#define PSION_BR_SIZE (1024*128)
3736 + * Boot Flash used by Epoc, not used in 5mx Pro (Not verified on 5mx)
3738 +#define PSION_P_BF 0x10000000
3739 +#define PSION_V_BF 0xde300000
3740 +#define PSION_BF_SIZE (1024*1024*2)
3743 + * GPIO/KBD Registers
3745 +#define PADR (0x0e00)
3746 +#define PBDR (0x0e04)
3747 +#define PCDR (0x0e08)
3748 +#define PDDR (0x0e0c)
3749 +#define PADDR (0x0e10)
3750 +#define PBDDR (0x0e14)
3751 +#define PCDDR (0x0e18)
3752 +#define PDDDR (0x0e1c)
3753 +#define PEDR (0x0e20)
3754 +#define PEDDR (0x0e24)
3755 +#define KSCAN (0x0e28)
3756 +#define LCDMUX (0x0e2c)
3759 + * Port A, Keyboard
3761 +#define PADR_0 (1 << 0)
3762 +#define PADR_1 (1 << 1)
3763 +#define PADR_2 (1 << 2)
3764 +#define PADR_3 (1 << 3)
3765 +#define PADR_4 (1 << 4)
3766 +#define PADR_5 (1 << 5)
3767 +#define PADR_6 (1 << 6)
3768 +#define PADR_7 (1 << 7)
3771 + * Port B, Data copied from Psion 5 code
3773 + * +--7--+--6--+--5--+--4--+--3--+--2--+--1--+--0--+
3774 + * |VPCEN|OPEN |VLDD3|VLDD2|VLDD1|VLDD0|EECLK|EECS |
3775 + * | out |in/ou|in/ou|in/ou|in/ou|in/ou| out | out |
3776 + * +-----+-----+-----+-----+-----+-----+-----+-----+
3778 +#define PBDR_EECS (1 << 0) /* Ext clock?, NOT TESTED */
3779 +#define PBDR_EECLK (1 << 1) /* Ext clock?, NOT TESTED */
3780 +#define PBDR_VLDD0 (1 << 2) /* LCD contrast reg0 */
3781 +#define PBDR_VLDD1 (1 << 3) /* LCD contrast reg1 */
3782 +#define PBDR_VLDD2 (1 << 4) /* LCD contrast reg2 */
3783 +#define PBDR_VLDD3 (1 << 5) /* LCD contrast reg3 */
3784 +#define PBDR_OPEN (1 << 6) /* Case open/closed */
3785 +#define PBDR_VPCEN (1 << 7) /* ETNA CF power disabled */
3787 +#define PBDR_VLD_MASK 0x3c /* LCD contrast mask */
3788 +#define PBDR_VLD_SHIFT 2 /* LCD contrast shift */
3792 + * Port C, Data copied from Psion 5 code
3794 + * +--7--+--6--+--5--+--4--+--3--+--2--+--1--+--0--+
3795 + * |ADICT|BBLD |UART1|LIGHT|UART2|PLED | DTR | RTS |
3796 + * | out | out | out | out | out | out | out | out |
3797 + * +-----+-----+-----+-----+-----+-----+-----+-----+
3799 +#define PCDR_RTS (1 << 0) /* RS-232 RTS, NOT TESTED */
3800 +#define PCDR_DTR (1 << 1) /* RS-232 DTR toggle, NOT TESTED */
3801 +#define PCDR_PLED (1 << 2) /* Disable power LED, NOT TESTED */
3802 +#define PCDR_UART2 (1 << 3) /* Enable UART1 */
3803 +#define PCDR_LIGHT (1 << 4) /* LCD backlight */
3804 +#define PCDR_UART1 (1 << 5) /* Enable UART0 */
3805 +#define PCDR_ADICT (1 << 6) /* Set audio to dictaphone */
3808 + * Port D, Data copied from Psion 5 code
3810 + * +--7--+--6--+--5--+--4--+--3--+--2--+--1--+--0--+
3811 + * | X2 |LCDLR|TRIX2|SLED |DORSW| LCD |AMPEN|CDEN |
3812 + * |in/ou| out | n/a | out | out | out | out | out |
3813 + * +-----+-----+-----+-----+-----+-----+-----+-----+
3815 +#define PDDR_CDE (1 << 0) /* Codec enable, NOT TESTED */
3816 +#define PDDR_AMPEN (1 << 1) /* Audio amp enable, NOT TESTED */
3817 +#define PDDR_LCD_PWR (1 << 2) /* LCD power */
3818 +#define PDDR_ETNA_DOOR (1 << 3) /* ETNA door switch power, NOT TESTED */
3819 +#define PDDR_SLED (1 << 4) /* Front status LED on */
3820 +#define PDDR_PUMP_PWR2 (1 << 5) /* ETNA and LCD need this */
3821 +#define PDDR_PUMP_PWR1 (1 << 6) /* DC to DC converter power */
3822 +#define PDDR_ETNA_ERR (1 << 7) /* ETNA access error */
3825 + * Port E, Data copied from Psion 5 code
3827 + * +--3--+--2--+--1--+--0--+
3828 + * |Y1EN |X1EN |Y2EN |X2EN |
3829 + * | out | out | out | out |
3830 + * +-----+-----+-----+-----+
3832 +#define PEDR_X2EN (1 << 0) /* Digitiser X2 drive, NOT TESTED */
3833 +#define PEDR_Y2EN (1 << 1) /* Digitiser Y2 drive, NOT TESTED */
3834 +#define PEDR_X1EN (1 << 2) /* Digitiser X1 drive, NOT TESTED */
3835 +#define PEDR_Y1EN (1 << 3) /* Digitiser Y1 drive, NOT TESTED */
3837 +#define MEMCFG1 (0x0000) /* Memory configuration */
3838 +#define MEMCFG2 (0x0004) /* Memory configuration */
3839 +#define DRAM_CFG (0x0100) /* DRAM control register */
3842 + * State and Power Controller
3844 +#define PWRSR (0x0400) /* Power control state */
3845 +#define PWRCNT (0x0404) /* Clock/debug control status */
3846 +#define HALT (0x0408) /* Enter idle mode */
3847 +#define STBY (0x040c) /* Enter standby mode */
3849 +#define BLEOI (0x0410) /* Clear battery low interrupt, write only */
3850 +#define MCEOI (0x0414) /* Clear media changed interrupt, write only */
3851 +#define TEOI (0x0418) /* Clear tick interrupt, write only */
3852 +#define STFCLR (0x041c) /* Clear NBFLG, RSTFLG, PFFLG, CLDFLG, write only */
3853 +#define E2EOI (0x0420) /* Clear NEINT2, write only */
3855 +#define TC1EOI (0x0c0c) /* Clear timer 1 interrupt, write only */
3856 +#define TC2EOI (0x0c2c) /* Clear timer 2 interrupt, write only */
3857 +#define RTCEOI (0x0d10) /* Clear RTC interrupt, write only */
3858 +#define UMSEOI (0x0714) /* Clear UART 2 modem status interrupt, write only */
3863 +#define RTCDIV (1 << 0) /* 6 bits, 64Hz ticks since the increment of RTC, 32 counts ahead of RTC */
3864 +#define MCDR (1 << 6) /* Media changed direct read */
3865 +#define DCDET (1 << 7) /* Power from the mains adapter */
3866 +#define WUDR (1 << 8) /* Wake up direct read */
3867 +#define WUON (1 << 9) /* Wake up out of stanby, clear at HALT STDBY or STFCLR */
3868 +#define NBFLG (1 << 10) /* New battery flag, clear at STFCLR */
3869 +#define RSTFLG (1 << 11) /* Reset flag, clear at STFCLR */
3870 +#define PFFLG (1 << 12) /* Power fail flag, clear at STFCLR */
3871 +#define CLDFLG (1 << 13) /* Cold start flag, clear at STFCLR */
3872 +#define VERID (1 << 14) /* Windermere version id, two bits, 0 for first version */
3877 +#define EXCKEN (1 << 0) /* External expansion clock enable, 1=on, 0=on only for bit 7 memcfg */
3878 +#define WAKEDIR (1 << 1) /* Disable waking up from STANDBY mode via the wakeup input */
3879 +#define CLKFLG (1 << 2) /* Clock speed, 1=36MHz, 0=18MHz */
3880 +#define ADCCLK (1 << 3) /* 8 bit to set the clock divider for ADCCLK output clock */
3885 +#define INTSR (0x0500) /* Interrupt status after masking, read-only */
3886 +#define INTRSR (0x0504) /* Interrupt status before masking, read-only */
3887 +#define INTENS (0x0508) /* Interrupt enable, read-write */
3888 +#define INTENC (0x050c) /* Interrupt disable, write-only */
3889 +#define INTTEST1 (0x0514) /* Interrupt test register */
3890 +#define INTTEST2 (0x0518) /* Interrupt test register */
3892 +#define INT_EXTFIQ (1 << 0)
3893 +#define INT_BLINT (1 << 1)
3894 +#define INT_WEINT (1 << 2)
3895 +#define INT_MCINT (1 << 3)
3896 +#define INT_CSINT (1 << 4)
3897 +#define INT_EINT1 (1 << 5) /* PCMCIA/external interrupt 1 */
3898 +#define INT_EINT2 (1 << 6)
3899 +#define INT_EINT3 (1 << 7)
3900 +#define INT_TC1OI (1 << 8)
3901 +#define INT_TC2OI (1 << 9)
3902 +#define INT_RTCMI (1 << 10)
3903 +#define INT_TINT (1 << 11)
3904 +#define INT_UART1 (1 << 12)
3905 +#define INT_UART2 (1 << 13)
3906 +#define INT_LCDINT (1 << 14)
3907 +#define INT_SSEOTI (1 << 15)
3912 +#define RTCTIME ((psionw_readl(RTCDRU) << 16) | (psionw_readl(RTCDRL) & 0xffff))
3914 +#define TC1LOAD (0x0c00)
3915 +#define TC1VAL (0x0c04)
3916 +#define TC1CTRL (0x0c08)
3918 +#define TC2LOAD (0x0c20)
3919 +#define TC2VAL (0x0c24)
3920 +#define TC2CTRL (0x0c28)
3921 +#define TC_BIT2 (1 << 2)
3922 +#define TC_CLKSEL (1 << 3)
3923 +#define TC_BIT4 (1 << 4)
3924 +#define TC_BIT5 (1 << 5)
3925 +#define TC_MODE (1 << 6)
3926 +#define TC_ENABLE (1 << 7)
3927 +#define BZCONT (0x0c40)
3928 +#define BZ_BZTOG (1 << 0)
3929 +#define BZ_BZMOD (1 << 1)
3931 +#define RTCDRL (0x0d00) /* RTC data register low */
3932 +#define RTCDRU (0x0d04) /* RTC data register high */
3933 +#define RTCMRL (0x0d08) /* RTC match register low */
3934 +#define RTCMRU (0x0d0c) /* RTC match register high */
3937 + * SSI - Synchronous Serial Interface
3939 +#define SSCR0 (0x0b00) /* Serial control register 0 */
3940 +#define SSCR1 (0x0b04) /* Serial control register 1 */
3941 +#define SSDR (0x0b0c) /* Data register */
3942 +#define SSSR (0x0b14) /* Status register */
3945 + * DC to DC Converter
3947 +#define PUMPCON (0x0900)
3948 +#define PUMP_RUN_VAL (0xbbb)
3949 +#define PUMP_STOP_VAL (0x0)
3954 +#define CODR (0x0a00) /* Codec data register */
3955 +#define CONFG (0x0a04) /* Codec config register */
3956 +#define COLFG (0x0a08) /* Codec flag register */
3957 +#define COEOI (0x0a0c) /* Codec end of interrupt, write only */
3958 +#define COTEST (0x0a10) /* Codec test register */
3960 +#endif /* __ASM_HARDWARE_PSIONW_H */
3961 diff -Nur linux-2.6.4-rc2.org/include/linux/serial_core.h linux-2.6.4-rc2/include/linux/serial_core.h
3962 --- linux-2.6.4-rc2.org/include/linux/serial_core.h 2004-03-09 13:23:01.000000000 +0000
3963 +++ linux-2.6.4-rc2/include/linux/serial_core.h 2004-03-09 13:25:56.000000000 +0000
3965 #define PORT_SA1100 34
3966 #define PORT_UART00 35
3967 #define PORT_21285 37
3968 +#define PORT_PSIONW 38
3970 /* Sparc type numbers. */
3971 #define PORT_SUNZILOG 38