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Commit | Line | Data |
---|---|---|
5384b728 | 1 | 2002-06-20 Jakub Jelinek <jakub@redhat.com> |
2 | ||
3 | * emit-rtl.c (init_emit_once): Register static_regno_reg_rtx | |
4 | with GC. | |
5 | * alias.c (init_alias_once): Register static_reg_base_value | |
6 | with GC. | |
7 | ||
8 | 2002-06-13 Jeffrey Law <law@redhat.com> | |
9 | ||
10 | * rs6000.c (rs6000_frame_related): Avoid unwanted sharing | |
11 | of hard registers. | |
12 | ||
13 | * emit-rtl.c (static_regno_reg_rtx): Define. | |
14 | (init_emit_once): Initialize static_regno_reg_rtx. | |
15 | (init_emit): Copy static_regno_reg_rtx into regno_reg_rtx instead | |
16 | of building new hard reg objects once per function. | |
17 | (gen_rtx_REG): Try to share hard regs. | |
18 | * regclass.c (init_fake_stack_mems): New function broken out from | |
19 | init_regs. | |
20 | * rtl.h (init_fake_stack_mems): Declare. | |
21 | * toplev.c (lang_independent_init): Call init_regs before | |
22 | init_emit_once. Call init_fake_stack_mems after init_emit_once. | |
23 | ||
24 | * alias.c (argument_registers): Remove. | |
25 | (init_alias_once): Initialize static_reg_base_value here. Remove | |
26 | initialization of argument_registers. | |
27 | (init_alias_once_per_function): Remove. | |
28 | (init_alias_analysis): Copy all the entries from static_reg_base_value | |
29 | into new_reg_base_value all at once. | |
30 | * rtl.h (init_alias_once_per_function): Remove declaration. | |
31 | * function.c (prepare_function_start): Do not call | |
32 | init_alias_once_per_function. | |
33 | ||
34 | * caller-save.c (init_caller_save): Use gen_rtx_INSN instead of | |
35 | starting a sequence and emitting an INSN. | |
36 | ||
37 | 2002-06-11 Jeffrey Law <law@redhat.com> | |
38 | ||
39 | * caller-save.c (init_caller_save): Move creation of SAVEINSN | |
40 | and RESTINSN into into the scope of the sequence. | |
41 | ||
42 | * loop.c (loop_regs_scan): Avoid useless generation of REG objects. | |
43 | ||
44 | 2002-06-10 Jeffrey Law <law@redhat.com> | |
45 | ||
46 | * alias.c (static_reg_base_value): New to hold RTL for | |
47 | items allocated once per function for the aliasing code. | |
48 | (init_alias_once_per_function): Initialize static_reg_base_value. | |
49 | (init_alias_analysis): Avoid throw-away allocations of RTL by | |
50 | using pre-computed values in static_reg_base_value. | |
51 | * function.c (prepare_function_start): Call | |
52 | init_alias_once_per_function appropriately. | |
53 | * rtl.h (init_alias_once_per_function): Declare. | |
54 | * caller-save (init_caller_save): Restructure slightly to | |
55 | avoid lots of silly RTL generation. | |
56 | * expr.c (init_expr_once): Likewise. | |
57 | * reload1.c (reload_cse_regs_1): Allocate throw-away register | |
58 | RTL object here. Pass it into children. | |
59 | (reload_cse_simplify_operands): Use passed-in register RTL | |
60 | object. | |
61 | (reload_cse_simplify): Pass through throw-away register | |
62 | RTL object. | |
63 | ||
64 | 2002-06-07 Jeff Law <law@redhat.com> | |
65 | ||
66 | * emit-rtl.c (init_emit): Add hard registers to regno_reg_rtx. | |
67 | * combine.c (move_deaths): Use regno_reg_rtx for hard regs rather | |
68 | than creating a new register. | |
69 | (distribute_notes): Likewise. | |
70 | * df.c (df_reg_use_gen): Likewise. | |
71 | (df_reg_clobber_gen): Likewise. | |
72 | (df_ref_record): Likewise. | |
73 | * expr.c (use_regs): Likewise. | |
74 | * flow.c (propagate_one_insn): Likewise. | |
75 | (mark_set_1): Likewise. | |
76 | (mark_used_reg): Likewise. | |
77 | * reload.c (emit_reload_insns): Likewise. | |
78 | ||
79 | --- gcc/df.c.jj Tue Apr 2 21:23:50 2002 | |
80 | +++ gcc/df.c Thu Jun 20 14:12:05 2002 | |
81 | @@ -633,8 +633,7 @@ static rtx df_reg_use_gen (regno) | |
82 | rtx reg; | |
83 | rtx use; | |
84 | ||
85 | - reg = regno >= FIRST_PSEUDO_REGISTER | |
86 | - ? regno_reg_rtx[regno] : gen_rtx_REG (reg_raw_mode[regno], regno); | |
87 | + reg = regno_reg_rtx[regno]; | |
88 | ||
89 | use = gen_rtx_USE (GET_MODE (reg), reg); | |
90 | return use; | |
91 | @@ -648,8 +647,7 @@ static rtx df_reg_clobber_gen (regno) | |
92 | rtx reg; | |
93 | rtx use; | |
94 | ||
95 | - reg = regno >= FIRST_PSEUDO_REGISTER | |
96 | - ? regno_reg_rtx[regno] : gen_rtx_REG (reg_raw_mode[regno], regno); | |
97 | + reg = regno_reg_rtx[regno]; | |
98 | ||
99 | use = gen_rtx_CLOBBER (GET_MODE (reg), reg); | |
100 | return use; | |
101 | @@ -905,7 +903,7 @@ df_ref_record (df, reg, loc, insn, ref_t | |
102 | endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (reg)); | |
103 | ||
104 | for (i = regno; i < endregno; i++) | |
105 | - df_ref_record_1 (df, gen_rtx_REG (reg_raw_mode[i], i), | |
106 | + df_ref_record_1 (df, regno_reg_rtx[i], | |
107 | loc, insn, ref_type, ref_flags); | |
108 | } | |
109 | else | |
110 | --- gcc/config/rs6000/rs6000.c.jj Sat May 25 00:01:52 2002 | |
111 | +++ gcc/config/rs6000/rs6000.c Thu Jun 20 18:23:59 2002 | |
112 | @@ -8531,6 +8531,14 @@ rs6000_frame_related (insn, reg, val, re | |
113 | { | |
114 | rtx real, temp; | |
115 | ||
116 | + /* copy_rtx will not make unique copies of registers, so we need to | |
117 | + ensure we don't have unwanted sharing here. */ | |
118 | + if (reg == reg2) | |
119 | + reg = gen_raw_REG (GET_MODE (reg), REGNO (reg)); | |
120 | + | |
121 | + if (reg == rreg) | |
122 | + reg = gen_raw_REG (GET_MODE (reg), REGNO (reg)); | |
123 | + | |
124 | real = copy_rtx (PATTERN (insn)); | |
125 | ||
126 | real = replace_rtx (real, reg, | |
127 | --- gcc/combine.c.jj Tue Jun 4 15:02:15 2002 | |
128 | +++ gcc/combine.c Thu Jun 20 14:12:38 2002 | |
129 | @@ -11908,7 +11908,7 @@ move_deaths (x, maybe_kill_insn, from_cu | |
130 | if (i < regno || i >= ourend) | |
131 | REG_NOTES (where_dead) | |
132 | = gen_rtx_EXPR_LIST (REG_DEAD, | |
133 | - gen_rtx_REG (reg_raw_mode[i], i), | |
134 | + regno_reg_rtx[i], | |
135 | REG_NOTES (where_dead)); | |
136 | } | |
137 | ||
138 | @@ -11935,7 +11935,7 @@ move_deaths (x, maybe_kill_insn, from_cu | |
139 | offset = 1; | |
140 | ||
141 | for (i = regno + offset; i < ourend; i++) | |
142 | - move_deaths (gen_rtx_REG (reg_raw_mode[i], i), | |
143 | + move_deaths (regno_reg_rtx[i], | |
144 | maybe_kill_insn, from_cuid, to_insn, &oldnotes); | |
145 | } | |
146 | ||
147 | @@ -12557,7 +12557,7 @@ distribute_notes (notes, from_insn, i3, | |
148 | for (i = regno; i < endregno; | |
149 | i += HARD_REGNO_NREGS (i, reg_raw_mode[i])) | |
150 | { | |
151 | - rtx piece = gen_rtx_REG (reg_raw_mode[i], i); | |
152 | + rtx piece = regno_reg_rtx[i]; | |
153 | basic_block bb = BASIC_BLOCK (this_basic_block); | |
154 | ||
155 | if (! dead_or_set_p (place, piece) | |
156 | --- gcc/emit-rtl.c.jj Thu May 23 10:28:12 2002 | |
157 | +++ gcc/emit-rtl.c Thu Jun 20 18:38:08 2002 | |
158 | @@ -92,6 +92,12 @@ static int no_line_numbers; | |
159 | ||
160 | rtx global_rtl[GR_MAX]; | |
161 | ||
162 | +/* Commonly used RTL for hard registers. These objects are not necessarily | |
163 | + unique, so we allocate them separately from global_rtl. They are | |
164 | + initialized once per compilation unit, then copied into regno_reg_rtx | |
165 | + at the beginning of each function. */ | |
166 | +static rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER]; | |
167 | + | |
168 | /* We record floating-point CONST_DOUBLEs in each floating-point mode for | |
169 | the values of 0, 1, and 2. For the integer entries and VOIDmode, we | |
170 | record a copy of const[012]_rtx. */ | |
171 | @@ -427,6 +433,15 @@ gen_rtx_REG (mode, regno) | |
172 | return stack_pointer_rtx; | |
173 | } | |
174 | ||
175 | + /* If the per-function register table has been set up, try to re-use | |
176 | + an existing entry in that table to avoid useless generation of RTL. */ | |
177 | + if (0 && cfun | |
178 | + && cfun->emit | |
179 | + && regno_reg_rtx | |
180 | + && regno >= 0 && regno < FIRST_PSEUDO_REGISTER | |
181 | + && reg_raw_mode[regno] == mode) | |
182 | + return regno_reg_rtx[regno]; | |
183 | + | |
184 | return gen_raw_REG (mode, regno); | |
185 | } | |
186 | ||
187 | @@ -4841,6 +4856,11 @@ init_emit () | |
188 | f->emit->regno_decl | |
189 | = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree)); | |
190 | ||
191 | + /* Put copies of all the hard registers into regno_reg_rtx. */ | |
192 | + memcpy (regno_reg_rtx, | |
193 | + static_regno_reg_rtx, | |
194 | + FIRST_PSEUDO_REGISTER * sizeof (rtx)); | |
195 | + | |
196 | /* Put copies of all the virtual register rtx into regno_reg_rtx. */ | |
197 | init_virtual_regs (f->emit); | |
198 | ||
199 | @@ -5015,8 +5035,14 @@ init_emit_once (line_numbers) | |
200 | gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM); | |
201 | virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM); | |
202 | ||
203 | + /* Initialize RTL for commonly used hard registers. These are | |
204 | + copied into regno_reg_rtx as we begin to compile each function. */ | |
205 | + for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
206 | + static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i); | |
207 | + | |
208 | /* These rtx must be roots if GC is enabled. */ | |
209 | ggc_add_rtx_root (global_rtl, GR_MAX); | |
210 | + ggc_add_rtx_root (static_regno_reg_rtx, (int) FIRST_PSEUDO_REGISTER); | |
211 | ||
212 | #ifdef INIT_EXPANDERS | |
213 | /* This is to initialize {init|mark|free}_machine_status before the first | |
214 | --- gcc/expr.c.jj Tue May 7 12:45:49 2002 | |
215 | +++ gcc/expr.c Thu Jun 20 17:04:00 2002 | |
216 | @@ -208,6 +208,7 @@ init_expr_once () | |
217 | enum machine_mode mode; | |
218 | int num_clobbers; | |
219 | rtx mem, mem1; | |
220 | + rtx reg; | |
221 | ||
222 | start_sequence (); | |
223 | ||
224 | @@ -217,6 +218,10 @@ init_expr_once () | |
225 | mem = gen_rtx_MEM (VOIDmode, stack_pointer_rtx); | |
226 | mem1 = gen_rtx_MEM (VOIDmode, frame_pointer_rtx); | |
227 | ||
228 | + /* A scratch register we can modify in-place below to avoid | |
229 | + useless RTL allocations. */ | |
230 | + reg = gen_raw_REG (VOIDmode, -1); | |
231 | + | |
232 | insn = emit_insn (gen_rtx_SET (0, NULL_RTX, NULL_RTX)); | |
233 | pat = PATTERN (insn); | |
234 | ||
235 | @@ -224,11 +229,11 @@ init_expr_once () | |
236 | mode = (enum machine_mode) ((int) mode + 1)) | |
237 | { | |
238 | int regno; | |
239 | - rtx reg; | |
240 | ||
241 | direct_load[(int) mode] = direct_store[(int) mode] = 0; | |
242 | PUT_MODE (mem, mode); | |
243 | PUT_MODE (mem1, mode); | |
244 | + PUT_MODE (reg, mode); | |
245 | ||
246 | /* See if there is some register that can be used in this mode and | |
247 | directly loaded or stored from memory. */ | |
248 | @@ -241,7 +246,7 @@ init_expr_once () | |
249 | if (! HARD_REGNO_MODE_OK (regno, mode)) | |
250 | continue; | |
251 | ||
252 | - reg = gen_rtx_REG (mode, regno); | |
253 | + REGNO (reg) = regno; | |
254 | ||
255 | SET_SRC (pat) = mem; | |
256 | SET_DEST (pat) = reg; | |
257 | @@ -2280,7 +2285,7 @@ use_regs (call_fusage, regno, nregs) | |
258 | abort (); | |
259 | ||
260 | for (i = 0; i < nregs; i++) | |
261 | - use_reg (call_fusage, gen_rtx_REG (reg_raw_mode[regno + i], regno + i)); | |
262 | + use_reg (call_fusage, regno_reg_rtx[regno + i]); | |
263 | } | |
264 | ||
265 | /* Add USE expressions to *CALL_FUSAGE for each REG contained in the | |
266 | --- gcc/flow.c.jj Tue Apr 23 20:26:35 2002 | |
267 | +++ gcc/flow.c Thu Jun 20 14:12:05 2002 | |
268 | @@ -1721,8 +1721,7 @@ propagate_one_insn (pbi, insn) | |
269 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) | |
270 | { | |
271 | /* We do not want REG_UNUSED notes for these registers. */ | |
272 | - mark_set_1 (pbi, CLOBBER, gen_rtx_REG (reg_raw_mode[i], i), | |
273 | - cond, insn, | |
274 | + mark_set_1 (pbi, CLOBBER, regno_reg_rtx[i], cond, insn, | |
275 | pbi->flags & ~(PROP_DEATH_NOTES | PROP_REG_INFO)); | |
276 | } | |
277 | } | |
278 | @@ -1770,8 +1769,7 @@ propagate_one_insn (pbi, insn) | |
279 | so they are made live. */ | |
280 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
281 | if (global_regs[i]) | |
282 | - mark_used_reg (pbi, gen_rtx_REG (reg_raw_mode[i], i), | |
283 | - cond, insn); | |
284 | + mark_used_reg (pbi, regno_reg_rtx[i], cond, insn); | |
285 | } | |
286 | } | |
287 | ||
288 | @@ -2769,7 +2767,7 @@ mark_set_1 (pbi, code, reg, cond, insn, | |
289 | if (! REGNO_REG_SET_P (pbi->reg_live, i)) | |
290 | REG_NOTES (insn) | |
291 | = alloc_EXPR_LIST (REG_UNUSED, | |
292 | - gen_rtx_REG (reg_raw_mode[i], i), | |
293 | + regno_reg_rtx[i], | |
294 | REG_NOTES (insn)); | |
295 | } | |
296 | } | |
297 | @@ -3577,7 +3575,7 @@ mark_used_reg (pbi, reg, cond, insn) | |
298 | && ! dead_or_set_regno_p (insn, i)) | |
299 | REG_NOTES (insn) | |
300 | = alloc_EXPR_LIST (REG_DEAD, | |
301 | - gen_rtx_REG (reg_raw_mode[i], i), | |
302 | + regno_reg_rtx[i], | |
303 | REG_NOTES (insn)); | |
304 | } | |
305 | } | |
306 | --- gcc/reload1.c.jj Wed May 22 14:17:55 2002 | |
307 | +++ gcc/reload1.c Thu Jun 20 17:05:46 2002 | |
308 | @@ -444,7 +444,7 @@ static int constraint_accepts_reg_p PARA | |
309 | static void reload_cse_regs_1 PARAMS ((rtx)); | |
310 | static int reload_cse_noop_set_p PARAMS ((rtx)); | |
311 | static int reload_cse_simplify_set PARAMS ((rtx, rtx)); | |
312 | -static int reload_cse_simplify_operands PARAMS ((rtx)); | |
313 | +static int reload_cse_simplify_operands PARAMS ((rtx, rtx)); | |
314 | static void reload_combine PARAMS ((void)); | |
315 | static void reload_combine_note_use PARAMS ((rtx *, rtx)); | |
316 | static void reload_combine_note_store PARAMS ((rtx, rtx, void *)); | |
317 | @@ -459,7 +459,7 @@ static HOST_WIDE_INT sext_for_mode PARAM | |
318 | static void failed_reload PARAMS ((rtx, int)); | |
319 | static int set_reload_reg PARAMS ((int, int)); | |
320 | static void reload_cse_delete_noop_set PARAMS ((rtx, rtx)); | |
321 | -static void reload_cse_simplify PARAMS ((rtx)); | |
322 | +static void reload_cse_simplify PARAMS ((rtx, rtx)); | |
323 | void fixup_abnormal_edges PARAMS ((void)); | |
324 | extern void dump_needs PARAMS ((struct insn_chain *)); | |
325 | \f | |
326 | @@ -7161,8 +7161,7 @@ emit_reload_insns (chain) | |
327 | for (k = 1; k < nnr; k++) | |
328 | reg_last_reload_reg[nregno + k] | |
329 | = (nr == nnr | |
330 | - ? gen_rtx_REG (reg_raw_mode[REGNO (rld[r].reg_rtx) + k], | |
331 | - REGNO (rld[r].reg_rtx) + k) | |
332 | + ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k] | |
333 | : 0); | |
334 | ||
335 | /* Now do the inverse operation. */ | |
336 | @@ -7211,8 +7210,7 @@ emit_reload_insns (chain) | |
337 | for (k = 1; k < nnr; k++) | |
338 | reg_last_reload_reg[nregno + k] | |
339 | = (nr == nnr | |
340 | - ? gen_rtx_REG (reg_raw_mode[REGNO (rld[r].reg_rtx) + k], | |
341 | - REGNO (rld[r].reg_rtx) + k) | |
342 | + ? regno_reg_rtx[REGNO (rld[r].reg_rtx) + k] | |
343 | : 0); | |
344 | ||
345 | /* Unless we inherited this reload, show we haven't | |
346 | @@ -8061,8 +8059,9 @@ reload_cse_noop_set_p (set) | |
347 | ||
348 | /* Try to simplify INSN. */ | |
349 | static void | |
350 | -reload_cse_simplify (insn) | |
351 | +reload_cse_simplify (insn, testreg) | |
352 | rtx insn; | |
353 | + rtx testreg; | |
354 | { | |
355 | rtx body = PATTERN (insn); | |
356 | ||
357 | @@ -8089,7 +8088,7 @@ reload_cse_simplify (insn) | |
358 | if (count > 0) | |
359 | apply_change_group (); | |
360 | else | |
361 | - reload_cse_simplify_operands (insn); | |
362 | + reload_cse_simplify_operands (insn, testreg); | |
363 | } | |
364 | else if (GET_CODE (body) == PARALLEL) | |
365 | { | |
366 | @@ -8132,7 +8131,7 @@ reload_cse_simplify (insn) | |
367 | if (count > 0) | |
368 | apply_change_group (); | |
369 | else | |
370 | - reload_cse_simplify_operands (insn); | |
371 | + reload_cse_simplify_operands (insn, testreg); | |
372 | } | |
373 | } | |
374 | ||
375 | @@ -8158,6 +8157,7 @@ reload_cse_regs_1 (first) | |
376 | rtx first; | |
377 | { | |
378 | rtx insn; | |
379 | + rtx testreg = gen_raw_REG (VOIDmode, -1); | |
380 | ||
381 | cselib_init (); | |
382 | init_alias_analysis (); | |
383 | @@ -8165,7 +8165,7 @@ reload_cse_regs_1 (first) | |
384 | for (insn = first; insn; insn = NEXT_INSN (insn)) | |
385 | { | |
386 | if (INSN_P (insn)) | |
387 | - reload_cse_simplify (insn); | |
388 | + reload_cse_simplify (insn, testreg); | |
389 | ||
390 | cselib_process_insn (insn); | |
391 | } | |
392 | @@ -8336,8 +8336,9 @@ reload_cse_simplify_set (set, insn) | |
393 | hard registers. */ | |
394 | ||
395 | static int | |
396 | -reload_cse_simplify_operands (insn) | |
397 | +reload_cse_simplify_operands (insn, testreg) | |
398 | rtx insn; | |
399 | + rtx testreg; | |
400 | { | |
401 | int i, j; | |
402 | ||
403 | @@ -8357,7 +8358,6 @@ reload_cse_simplify_operands (insn) | |
404 | int *op_alt_regno[MAX_RECOG_OPERANDS]; | |
405 | /* Array of alternatives, sorted in order of decreasing desirability. */ | |
406 | int *alternative_order; | |
407 | - rtx reg = gen_rtx_REG (VOIDmode, -1); | |
408 | ||
409 | extract_insn (insn); | |
410 | ||
411 | @@ -8441,8 +8441,8 @@ reload_cse_simplify_operands (insn) | |
412 | if (! TEST_HARD_REG_BIT (equiv_regs[i], regno)) | |
413 | continue; | |
414 | ||
415 | - REGNO (reg) = regno; | |
416 | - PUT_MODE (reg, mode); | |
417 | + REGNO (testreg) = regno; | |
418 | + PUT_MODE (testreg, mode); | |
419 | ||
420 | /* We found a register equal to this operand. Now look for all | |
421 | alternatives that can accept this register and have not been | |
422 | @@ -8484,10 +8484,10 @@ reload_cse_simplify_operands (insn) | |
423 | alternative yet and the operand being replaced is not | |
424 | a cheap CONST_INT. */ | |
425 | if (op_alt_regno[i][j] == -1 | |
426 | - && reg_fits_class_p (reg, class, 0, mode) | |
427 | + && reg_fits_class_p (testreg, class, 0, mode) | |
428 | && (GET_CODE (recog_data.operand[i]) != CONST_INT | |
429 | || (rtx_cost (recog_data.operand[i], SET) | |
430 | - > rtx_cost (reg, SET)))) | |
431 | + > rtx_cost (testreg, SET)))) | |
432 | { | |
433 | alternative_nregs[j]++; | |
434 | op_alt_regno[i][j] = regno; | |
435 | --- gcc/alias.c.jj Thu Jun 20 12:43:03 2002 | |
436 | +++ gcc/alias.c Thu Jun 20 18:36:24 2002 | |
437 | @@ -149,6 +149,10 @@ static rtx *reg_base_value; | |
438 | static rtx *new_reg_base_value; | |
439 | static unsigned int reg_base_value_size; /* size of reg_base_value array */ | |
440 | ||
441 | +/* Static hunks of RTL used by the aliasing code; these are initialized | |
442 | + once per function to avoid unnecessary RTL allocations. */ | |
443 | +static rtx static_reg_base_value[FIRST_PSEUDO_REGISTER]; | |
444 | + | |
445 | #define REG_BASE_VALUE(X) \ | |
446 | (REGNO (X) < reg_base_value_size \ | |
447 | ? reg_base_value[REGNO (X)] : 0) | |
448 | @@ -2429,8 +2433,6 @@ mark_constant_function () | |
449 | } | |
450 | ||
451 | ||
452 | -static HARD_REG_SET argument_registers; | |
453 | - | |
454 | void | |
455 | init_alias_once () | |
456 | { | |
457 | @@ -2439,13 +2441,26 @@ init_alias_once () | |
458 | #ifndef OUTGOING_REGNO | |
459 | #define OUTGOING_REGNO(N) N | |
460 | #endif | |
461 | + ggc_add_rtx_root (static_reg_base_value, (int) FIRST_PSEUDO_REGISTER); | |
462 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
463 | /* Check whether this register can hold an incoming pointer | |
464 | argument. FUNCTION_ARG_REGNO_P tests outgoing register | |
465 | numbers, so translate if necessary due to register windows. */ | |
466 | if (FUNCTION_ARG_REGNO_P (OUTGOING_REGNO (i)) | |
467 | && HARD_REGNO_MODE_OK (i, Pmode)) | |
468 | - SET_HARD_REG_BIT (argument_registers, i); | |
469 | + static_reg_base_value[i] | |
470 | + = gen_rtx_ADDRESS (VOIDmode, gen_rtx_REG (Pmode, i)); | |
471 | + | |
472 | + static_reg_base_value[STACK_POINTER_REGNUM] | |
473 | + = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); | |
474 | + static_reg_base_value[ARG_POINTER_REGNUM] | |
475 | + = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); | |
476 | + static_reg_base_value[FRAME_POINTER_REGNUM] | |
477 | + = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); | |
478 | +#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
479 | + static_reg_base_value[HARD_FRAME_POINTER_REGNUM] | |
480 | + = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); | |
481 | +#endif | |
482 | ||
483 | alias_sets = splay_tree_new (splay_tree_compare_ints, 0, 0); | |
484 | } | |
485 | @@ -2535,21 +2550,8 @@ init_alias_analysis () | |
486 | The address expression is VOIDmode for an argument and | |
487 | Pmode for other registers. */ | |
488 | ||
489 | - for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
490 | - if (TEST_HARD_REG_BIT (argument_registers, i)) | |
491 | - new_reg_base_value[i] = gen_rtx_ADDRESS (VOIDmode, | |
492 | - gen_rtx_REG (Pmode, i)); | |
493 | - | |
494 | - new_reg_base_value[STACK_POINTER_REGNUM] | |
495 | - = gen_rtx_ADDRESS (Pmode, stack_pointer_rtx); | |
496 | - new_reg_base_value[ARG_POINTER_REGNUM] | |
497 | - = gen_rtx_ADDRESS (Pmode, arg_pointer_rtx); | |
498 | - new_reg_base_value[FRAME_POINTER_REGNUM] | |
499 | - = gen_rtx_ADDRESS (Pmode, frame_pointer_rtx); | |
500 | -#if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM | |
501 | - new_reg_base_value[HARD_FRAME_POINTER_REGNUM] | |
502 | - = gen_rtx_ADDRESS (Pmode, hard_frame_pointer_rtx); | |
503 | -#endif | |
504 | + memcpy (new_reg_base_value, static_reg_base_value, | |
505 | + FIRST_PSEUDO_REGISTER * sizeof (rtx)); | |
506 | ||
507 | /* Walk the insns adding values to the new_reg_base_value array. */ | |
508 | for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) | |
509 | --- gcc/caller-save.c.jj Wed Jan 2 12:47:35 2002 | |
510 | +++ gcc/caller-save.c Thu Jun 20 17:49:47 2002 | |
511 | @@ -115,6 +115,9 @@ init_caller_save () | |
512 | rtx address; | |
513 | int i, j; | |
514 | enum machine_mode mode; | |
515 | + rtx savepat, restpat; | |
516 | + rtx test_reg, test_mem; | |
517 | + rtx saveinsn, restinsn; | |
518 | ||
519 | /* First find all the registers that we need to deal with and all | |
520 | the modes that they can have. If we can't find a mode to use, | |
521 | @@ -179,22 +182,30 @@ init_caller_save () | |
522 | address = addr_reg; | |
523 | ||
524 | /* Next we try to form an insn to save and restore the register. We | |
525 | - see if such an insn is recognized and meets its constraints. */ | |
526 | + see if such an insn is recognized and meets its constraints. | |
527 | ||
528 | - start_sequence (); | |
529 | + To avoid lots of unnecessary RTL allocation, we construct all the RTL | |
530 | + once, then modify the memory and register operands in-place. */ | |
531 | + | |
532 | + test_reg = gen_rtx_REG (VOIDmode, 0); | |
533 | + test_mem = gen_rtx_MEM (VOIDmode, address); | |
534 | + savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg); | |
535 | + restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem); | |
536 | + saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, savepat, -1, 0, 0); | |
537 | + restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, restpat, -1, 0, 0); | |
538 | ||
539 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
540 | for (mode = 0 ; mode < MAX_MACHINE_MODE; mode++) | |
541 | if (HARD_REGNO_MODE_OK (i, mode)) | |
542 | { | |
543 | - rtx mem = gen_rtx_MEM (mode, address); | |
544 | - rtx reg = gen_rtx_REG (mode, i); | |
545 | - rtx savepat = gen_rtx_SET (VOIDmode, mem, reg); | |
546 | - rtx restpat = gen_rtx_SET (VOIDmode, reg, mem); | |
547 | - rtx saveinsn = emit_insn (savepat); | |
548 | - rtx restinsn = emit_insn (restpat); | |
549 | int ok; | |
550 | ||
551 | + /* Update the register number and modes of the register | |
552 | + and memory operand. */ | |
553 | + REGNO (test_reg) = i; | |
554 | + PUT_MODE (test_reg, mode); | |
555 | + PUT_MODE (test_mem, mode); | |
556 | + | |
557 | reg_save_code[i][mode] = recog_memoized (saveinsn); | |
558 | reg_restore_code[i][mode] = recog_memoized (restinsn); | |
559 | ||
560 | @@ -232,8 +243,6 @@ init_caller_save () | |
561 | SET_HARD_REG_BIT (call_fixed_reg_set, i); | |
562 | } | |
563 | } | |
564 | - | |
565 | - end_sequence (); | |
566 | } | |
567 | \f | |
568 | /* Initialize save areas by showing that we haven't allocated any yet. */ | |
569 | --- gcc/rtl.h.jj Tue May 21 20:19:51 2002 | |
570 | +++ gcc/rtl.h Thu Jun 20 18:01:01 2002 | |
571 | @@ -1964,6 +1964,7 @@ extern int reg_classes_intersect_p PARAM | |
572 | extern int reg_class_subset_p PARAMS ((enum reg_class, enum reg_class)); | |
573 | extern void globalize_reg PARAMS ((int)); | |
574 | extern void init_regs PARAMS ((void)); | |
575 | +extern void init_fake_stack_mems PARAMS ((void)); | |
576 | extern void init_reg_sets PARAMS ((void)); | |
577 | extern void regset_release_memory PARAMS ((void)); | |
578 | extern void regclass_init PARAMS ((void)); | |
579 | --- gcc/regclass.c.jj Wed Jun 19 15:11:11 2002 | |
580 | +++ gcc/regclass.c Thu Jun 20 18:01:01 2002 | |
581 | @@ -605,11 +605,16 @@ init_regs () | |
582 | init_reg_sets_1 (); | |
583 | ||
584 | init_reg_modes (); | |
585 | +} | |
586 | ||
587 | +/* Initialize some fake stack-frame MEM references for use in | |
588 | + memory_move_secondary_cost. */ | |
589 | + | |
590 | +void | |
591 | +init_fake_stack_mems () | |
592 | +{ | |
593 | #ifdef HAVE_SECONDARY_RELOADS | |
594 | { | |
595 | - /* Make some fake stack-frame MEM references for use in | |
596 | - memory_move_secondary_cost. */ | |
597 | int i; | |
598 | ||
599 | for (i = 0; i < MAX_MACHINE_MODE; i++) | |
600 | --- gcc/toplev.c.jj Thu May 30 11:08:44 2002 | |
601 | +++ gcc/toplev.c Thu Jun 20 18:01:01 2002 | |
602 | @@ -5058,6 +5058,9 @@ lang_independent_init () | |
603 | init_stringpool (); | |
604 | init_obstacks (); | |
605 | ||
606 | + /* init_emit_once uses reg_raw_mode and therefore must be called | |
607 | + after init_regs which initialized reg_raw_mode. */ | |
608 | + init_regs (); | |
609 | init_emit_once (debug_info_level == DINFO_LEVEL_NORMAL | |
610 | || debug_info_level == DINFO_LEVEL_VERBOSE | |
611 | #ifdef VMS_DEBUGGING_INFO | |
612 | @@ -5066,7 +5069,7 @@ lang_independent_init () | |
613 | #endif | |
614 | || flag_test_coverage | |
615 | || warn_notreached); | |
616 | - init_regs (); | |
617 | + init_fake_stack_mems (); | |
618 | init_alias_once (); | |
619 | init_stmt (); | |
620 | init_loop (); | |
621 | --- gcc/loop.c.jj Wed Jun 19 15:10:51 2002 | |
622 | +++ gcc/loop.c Thu Jun 20 18:22:01 2002 | |
623 | @@ -9541,7 +9541,7 @@ loop_regs_scan (loop, extra_size) | |
624 | if (LOOP_INFO (loop)->has_call) | |
625 | for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) | |
626 | if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i) | |
627 | - && rtx_varies_p (gen_rtx_REG (Pmode, i), /*for_alias=*/1)) | |
628 | + && rtx_varies_p (regno_reg_rtx[i], 1)) | |
629 | { | |
630 | regs->array[i].may_not_optimize = 1; | |
631 | regs->array[i].set_in_loop = 1; |