]> git.pld-linux.org Git - packages/gcc.git/blame - gcc-mmx-ice.patch
- resurrected info patch and non-english-man-pages
[packages/gcc.git] / gcc-mmx-ice.patch
CommitLineData
85ccbd88
MM
1 * config/i386/i386.c (ix86_register_move_cost): Increase cost
2 for secondary_memory_needed pairs.
3
4Index: i386.c
5===================================================================
6RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
7retrieving revision 1.463
8diff -c -p -d -r1.463 i386.c
9*** gcc/gcc/config/i386/i386.c 2 Oct 2002 15:02:50 -0000 1.463
10--- gcc/gcc/config/i386/i386.c 2 Oct 2002 18:22:47 -0000
11*************** ix86_register_move_cost (mode, class1, c
12*** 13580,13596 ****
13 enum reg_class class1, class2;
14 {
15 /* In case we require secondary memory, compute cost of the store followed
16! by load. In case of copying from general_purpose_register we may emit
17! multiple stores followed by single load causing memory size mismatch
18! stall. Count this as arbitarily high cost of 20. */
19 if (ix86_secondary_memory_needed (class1, class2, mode, 0))
20 {
21! int add_cost = 0;
22 if (CLASS_MAX_NREGS (class1, mode) > CLASS_MAX_NREGS (class2, mode))
23! add_cost = 20;
24! return (MEMORY_MOVE_COST (mode, class1, 0)
25! + MEMORY_MOVE_COST (mode, class2, 1) + add_cost);
26 }
27 /* Moves between SSE/MMX and integer unit are expensive. */
28 if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2)
29 || SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
30--- 13580,13612 ----
31 enum reg_class class1, class2;
32 {
33 /* In case we require secondary memory, compute cost of the store followed
34! by load. In order to avoid bad register allocation choices, we need
35! for this to be *at least* as high as the symmetric MEMORY_MOVE_COST. */
36!
37 if (ix86_secondary_memory_needed (class1, class2, mode, 0))
38 {
39! int cost = 1;
40!
41! cost += MAX (MEMORY_MOVE_COST (mode, class1, 0),
42! MEMORY_MOVE_COST (mode, class1, 1));
43! cost += MAX (MEMORY_MOVE_COST (mode, class2, 0),
44! MEMORY_MOVE_COST (mode, class2, 1));
45!
46! /* In case of copying from general_purpose_register we may emit multiple
47! stores followed by single load causing memory size mismatch stall.
48! Count this as arbitarily high cost of 20. */
49 if (CLASS_MAX_NREGS (class1, mode) > CLASS_MAX_NREGS (class2, mode))
50! cost += 20;
51!
52! /* In the case of FP/MMX moves, the registers actually overlap, and we
53! have to switch modes in order to treat them differently. */
54! if ((MMX_CLASS_P (class1) && MAYBE_FLOAT_CLASS_P (class2))
55! || (MMX_CLASS_P (class2) && MAYBE_FLOAT_CLASS_P (class1)))
56! cost += 20;
57!
58! return cost;
59 }
60+
61 /* Moves between SSE/MMX and integer unit are expensive. */
62 if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2)
63 || SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
64
65
This page took 0.054051 seconds and 4 git commands to generate.