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22 Subject: Re: [mips patch RFC] removal of gas embedded-pic support code
23 From: David Ung <davidu at mips dot com>
24 To: cgd at broadcom dot com, ica2_ts at csv dot ica dot uni-stuttgart dot de, binutils at sources dot redhat dot com
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26 Organization: MIPS Technologies UK
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29 Date: Wed, 05 May 2004 18:44:40 +0100
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35 >At Thu, 29 Apr 2004 02:46:46 +0000 (UTC), "Thiemo Seufer" wrote:
38 >Thanks for looking it over.
40 >I've checked it in. I *really* hope it really doesn't break
48 woops. your recent patch seem to have broke building of the compiler on
49 linux. The problem occurs when building for libgcc/./_divdi3.o
52 Error: operation combines symbols in different segments
54 as it is trying to assemble this piece of .s code generated from gcc.
56 .section .eh_frame,"aw",@progbits
58 .4byte $LECIE1-$LSCIE1
74 .4byte $LEFDE1-$LASFDE1
76 .4byte $LASFDE1-$Lframe1
81 ** $LFB42 is from the text section of divdi3.
83 I've reverted back the necessary changes to your patch, so that it now
91 ===================================================================
92 RCS file: /cvsroot/gcc/src-cvs/src/gas/ChangeLog,v
93 retrieving revision 1.2114
94 diff -u -r1.2114 ChangeLog
95 --- gas/ChangeLog 29 Apr 2004 05:14:20 -0000 1.2114
96 +++ gas/ChangeLog 5 May 2004 17:38:51 -0000
98 +2004-05-05 David Ung <davidu@mips.com>
100 + * config/tc-mips.c (md_apply_fix3): Revert last change.
101 + (tc_gen_reloc): Put back pc rel handling.
102 + * config/tc-mips.h: Defines DIFF_EXPR_OK.
104 Index: gas/config/tc-mips.c
105 ===================================================================
106 RCS file: /cvsroot/gcc/src-cvs/src/gas/config/tc-mips.c,v
107 retrieving revision 1.263
108 diff -u -r1.263 tc-mips.c
109 --- gas/config/tc-mips.c 29 Apr 2004 05:14:21 -0000 1.263
110 +++ gas/config/tc-mips.c 5 May 2004 17:38:51 -0000
111 @@ -10861,8 +10861,7 @@
112 buf = (bfd_byte *) (fixP->fx_frag->fr_literal + fixP->fx_where);
114 /* We are not done if this is a composite relocation to set up gp. */
115 - assert (! fixP->fx_pcrel);
116 - if (fixP->fx_addsy == NULL
117 + if (fixP->fx_addsy == NULL && ! fixP->fx_pcrel
118 && !(fixP->fx_r_type == BFD_RELOC_MIPS_SUB
119 || (fixP->fx_r_type == BFD_RELOC_64
120 && (previous_fx_r_type == BFD_RELOC_GPREL32
121 @@ -12723,8 +12722,27 @@
122 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
123 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
125 - assert (! fixp->fx_pcrel);
126 - reloc->addend = fixp->fx_addnumber;
127 + if (fixp->fx_pcrel)
129 + bfd_vma pcrel_address;
131 + pcrel_address = reloc->address;
133 + if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
135 + /* At this point, fx_addnumber is "symbol offset - pcrel_address".
136 + Relocations want only the symbol offset. */
137 + reloc->addend = fixp->fx_addnumber + pcrel_address;
141 + /* A gruesome hack which is a result of the gruesome gas reloc
143 + reloc->addend = pcrel_address;
147 + reloc->addend = fixp->fx_addnumber;
149 /* Since the old MIPS ELF ABI uses Rel instead of Rela, encode the vtable
150 entry to be used in the relocation's section offset. */
151 @@ -12735,6 +12753,34 @@
154 code = fixp->fx_r_type;
155 + if (fixp->fx_pcrel)
160 + code = BFD_RELOC_8_PCREL;
163 + code = BFD_RELOC_16_PCREL;
166 + code = BFD_RELOC_32_PCREL;
169 + code = BFD_RELOC_64_PCREL;
171 + case BFD_RELOC_8_PCREL:
172 + case BFD_RELOC_16_PCREL:
173 + case BFD_RELOC_32_PCREL:
174 + case BFD_RELOC_64_PCREL:
175 + case BFD_RELOC_16_PCREL_S2:
178 + as_bad_where (fixp->fx_file, fixp->fx_line,
179 + _("Cannot make %s relocation PC relative"),
180 + bfd_get_reloc_code_name (code));
184 /* To support a PC relative reloc, we used a Cygnus extension.
185 We check for that here to make sure that we don't let such a
186 Index: gas/config/tc-mips.h
187 ===================================================================
188 RCS file: /cvsroot/gcc/src-cvs/src/gas/config/tc-mips.h,v
189 retrieving revision 1.35
190 diff -u -r1.35 tc-mips.h
191 --- gas/config/tc-mips.h 29 Apr 2004 05:14:22 -0000 1.35
192 +++ gas/config/tc-mips.h 5 May 2004 17:38:51 -0000
195 #define MAX_MEM_FOR_RS_ALIGN_CODE (1 + 2)
197 +/* We permit PC relative difference expressions when generating
198 + embedded PIC code. */
199 +#define DIFF_EXPR_OK
201 /* Tell assembler that we have an itbl_mips.h header file to include. */
202 #define HAVE_ITBL_CPU