2 Author: Bernardo Innocenti <bernie@develer.com>
4 This patch fixes -fomit-frame-pointer on the ColdFire:
6 - move ARG_POINTER_REGNUM to a distinct regno, to avoid
7 confusion with FRAME_POINTER_REGNUM in register elimination.
9 - Correct computation of frame + saved regs size at function
10 prologue and epilogue output.
13 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/3b1.h gcc-3.3.1-20030720/gcc/config/m68k/3b1.h
14 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/3b1.h 2002-08-29 23:40:12.000000000 +0200
15 +++ gcc-3.3.1-20030720/gcc/config/m68k/3b1.h 2003-07-25 01:02:48.000000000 +0200
16 @@ -76,7 +76,7 @@ output_file_directive ((FILE), main_inpu
17 #define REGISTER_NAMES \
18 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
19 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
20 - "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7"}
21 + "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7", "argptr" }
23 /* Specify how to pad function arguments.
24 Value should be `upward', `downward' or `none'.
25 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/coff.h gcc-3.3.1-20030720/gcc/config/m68k/coff.h
26 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/coff.h 2003-07-25 00:28:46.000000000 +0200
27 +++ gcc-3.3.1-20030720/gcc/config/m68k/coff.h 2003-07-25 01:02:48.000000000 +0200
28 @@ -75,7 +75,7 @@ Boston, MA 02111-1307, USA. */
29 #define REGISTER_NAMES \
30 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
31 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \
32 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
33 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr" }
34 #else /* SUPPORTED_SUN_FPA */
35 #define REGISTER_NAMES \
36 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
37 @@ -84,7 +84,7 @@ Boston, MA 02111-1307, USA. */
38 "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6", "%fpa7", \
39 "%fpa8", "%fpa9", "%fpa10", "%fpa11", "%fpa12", "%fpa13", "%fpa14", "%fpa15", \
40 "%fpa16", "%fpa17", "%fpa18", "%fpa19", "%fpa20", "%fpa21", "%fpa22", "%fpa23", \
41 - "%fpa24", "%fpa25", "%fpa26", "%fpa27", "%fpa28", "%fpa29", "%fpa30", "%fpa31" }
42 + "%fpa24", "%fpa25", "%fpa26", "%fpa27", "%fpa28", "%fpa29", "%fpa30", "%fpa31", "argptr" }
43 #endif /* defined SUPPORT_SUN_FPA */
46 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/hp320.h gcc-3.3.1-20030720/gcc/config/m68k/hp320.h
47 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/hp320.h 2002-10-16 02:40:33.000000000 +0200
48 +++ gcc-3.3.1-20030720/gcc/config/m68k/hp320.h 2003-07-25 01:02:48.000000000 +0200
49 @@ -183,7 +183,7 @@ Boston, MA 02111-1307, USA. */
50 #define REGISTER_NAMES \
51 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
52 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
53 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7"}
54 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr"}
56 #define IMMEDIATE_PREFIX "&"
57 #define REGISTER_PREFIX "%"
58 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/linux.h gcc-3.3.1-20030720/gcc/config/m68k/linux.h
59 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/linux.h 2003-07-25 00:28:46.000000000 +0200
60 +++ gcc-3.3.1-20030720/gcc/config/m68k/linux.h 2003-07-25 01:02:48.000000000 +0200
61 @@ -85,7 +85,7 @@ Boston, MA 02111-1307, USA. */
62 #define REGISTER_NAMES \
63 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
64 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \
65 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
66 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr" }
68 #else /* SUPPORTED_SUN_FPA */
70 @@ -96,7 +96,7 @@ Boston, MA 02111-1307, USA. */
71 "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6", "%fpa7", \
72 "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \
73 "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \
74 - "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" }
75 + "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31", "argptr" }
77 #endif /* defined SUPPORT_SUN_FPA */
79 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.c gcc-3.3.1-20030720/gcc/config/m68k/m68k.c
80 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.c 2003-07-25 01:05:08.000000000 +0200
81 +++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.c 2003-07-25 01:02:48.000000000 +0200
82 @@ -43,6 +43,18 @@ Boston, MA 02111-1307, USA. */
83 /* Needed for use_return_insn. */
86 +const enum reg_class regno_reg_class[] =
88 + DATA_REGS, DATA_REGS, DATA_REGS, DATA_REGS,
89 + DATA_REGS, DATA_REGS, DATA_REGS, DATA_REGS,
90 + ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
91 + ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
92 + FP_REGS, FP_REGS, FP_REGS, FP_REGS,
93 + FP_REGS, FP_REGS, FP_REGS, FP_REGS,
98 /* Return nonzero if FUNC is an interrupt function as specified by the
99 "interrupt_handler" attribute. */
101 @@ -503,6 +515,7 @@ m68k_output_function_prologue (stream, s
102 register int mask = 0;
103 int num_saved_regs = 0;
104 HOST_WIDE_INT fsize = (size + 3) & -4;
105 + HOST_WIDE_INT fsize_with_regs;
106 HOST_WIDE_INT cfa_offset = INCOMING_FRAME_SP_OFFSET;
107 HOST_WIDE_INT cfa_store_offset = cfa_offset;
108 int interrupt_handler = m68k_interrupt_function_p (current_function_decl);
109 @@ -521,6 +534,21 @@ m68k_output_function_prologue (stream, s
113 + if (TARGET_COLDFIRE)
115 + /* on Coldfire add register save into initial stack frame setup, if possible */
116 + for (regno = 0; regno < 16; regno++)
117 + if (m68k_save_reg (regno, interrupt_handler))
120 + if (num_saved_regs <= 2)
121 + num_saved_regs = 0;
124 + num_saved_regs = 0;
126 + fsize_with_regs = fsize + num_saved_regs * 4;
128 if (frame_pointer_needed)
130 if (fsize == 0 && TARGET_68040)
131 @@ -538,56 +566,35 @@ m68k_output_function_prologue (stream, s
132 reg_names[FRAME_POINTER_REGNUM]);
135 - else if (fsize < 0x8000)
136 + else if (fsize_with_regs < 0x8000)
138 - if (TARGET_COLDFIRE)
140 - /* on Coldfire add register save into initial stack frame setup, if possible */
141 - for (regno = 0; regno < 16; regno++)
142 - if (m68k_save_reg (regno, interrupt_handler))
145 - if ( ( fsize + num_saved_regs * 4 >= 0x8000 ) || ( num_saved_regs <= 2 ) )
146 - num_saved_regs = 0;
148 - asm_fprintf (stream, "\tlink.w %s,%0I%d\n",
149 - reg_names[FRAME_POINTER_REGNUM], -fsize - num_saved_regs * 4);
150 + asm_fprintf (stream, "\tlink.w %s,%0I%d\n",
151 + reg_names[FRAME_POINTER_REGNUM], -fsize_with_regs);
153 - asm_fprintf (stream, "\tlink %s,%0I%d\n",
154 - reg_names[FRAME_POINTER_REGNUM], -fsize - num_saved_regs * 4 );
155 + asm_fprintf (stream, "\tlink %s,%0I%d\n",
156 + reg_names[FRAME_POINTER_REGNUM], -fsize_with_regs);
158 - num_saved_regs = 0;
163 - asm_fprintf (stream, "\tlink.w %s,%0I%d\n",
164 - reg_names[FRAME_POINTER_REGNUM], -fsize);
166 - asm_fprintf (stream, "\tlink %s,%0I%d\n",
167 - reg_names[FRAME_POINTER_REGNUM], -fsize);
171 else if (TARGET_68020)
174 asm_fprintf (stream, "\tlink.l %s,%0I%d\n",
175 - reg_names[FRAME_POINTER_REGNUM], -fsize);
176 + reg_names[FRAME_POINTER_REGNUM], -fsize_with_regs);
178 asm_fprintf (stream, "\tlink %s,%0I%d\n",
179 - reg_names[FRAME_POINTER_REGNUM], -fsize);
180 + reg_names[FRAME_POINTER_REGNUM], -fsize_with_regs);
185 - /* Adding negative number is faster on the 68040. */
186 + /* Adding negative number is faster on the 68040. */
188 asm_fprintf (stream, "\tlink.w %s,%0I0\n\tadd.l %0I%d,%Rsp\n",
189 - reg_names[FRAME_POINTER_REGNUM], -fsize);
190 + reg_names[FRAME_POINTER_REGNUM], -fsize_with_regs);
192 asm_fprintf (stream, "\tlink %s,%0I0\n\taddl %0I%d,%Rsp\n",
193 - reg_names[FRAME_POINTER_REGNUM], -fsize);
194 + reg_names[FRAME_POINTER_REGNUM], -fsize_with_regs);
197 if (dwarf2out_do_frame ())
198 @@ -601,43 +608,43 @@ m68k_output_function_prologue (stream, s
199 cfa_store_offset += fsize;
203 + else if (fsize_with_regs) /* !frame_pointer_needed */
205 - if (fsize + 4 < 0x8000)
206 + if (fsize_with_regs < 0x8000)
209 - if (fsize + 4 <= 8)
210 + if (fsize_with_regs <= 8)
212 if (!TARGET_COLDFIRE)
214 /* asm_fprintf() cannot handle %. */
216 - asm_fprintf (stream, "\tsubq.w %0I%d,%Rsp\n", fsize + 4);
217 + asm_fprintf (stream, "\tsubq.w %0I%d,%Rsp\n", fsize_with_regs);
219 - asm_fprintf (stream, "\tsubqw %0I%d,%Rsp\n", fsize + 4);
220 + asm_fprintf (stream, "\tsubqw %0I%d,%Rsp\n", fsize_with_regs);
225 /* asm_fprintf() cannot handle %. */
227 - asm_fprintf (stream, "\tsubq.l %0I%d,%Rsp\n", fsize + 4);
228 + asm_fprintf (stream, "\tsubq.l %0I%d,%Rsp\n", fsize_with_regs);
230 - asm_fprintf (stream, "\tsubql %0I%d,%Rsp\n", fsize + 4);
231 + asm_fprintf (stream, "\tsubql %0I%d,%Rsp\n", fsize_with_regs);
235 - else if (fsize + 4 <= 16 && TARGET_CPU32)
236 + else if (fsize_with_regs <= 16 && TARGET_CPU32)
238 /* On the CPU32 it is faster to use two subqw instructions to
239 subtract a small integer (8 < N <= 16) to a register. */
240 /* asm_fprintf() cannot handle %. */
242 asm_fprintf (stream, "\tsubq.w %0I8,%Rsp\n\tsubq.w %0I%d,%Rsp\n",
244 + fsize_with_regs - 8);
246 asm_fprintf (stream, "\tsubqw %0I8,%Rsp\n\tsubqw %0I%d,%Rsp\n",
248 + fsize_with_regs - 8);
252 @@ -647,27 +654,26 @@ m68k_output_function_prologue (stream, s
253 /* Adding negative number is faster on the 68040. */
254 /* asm_fprintf() cannot handle %. */
256 - asm_fprintf (stream, "\tadd.w %0I%d,%Rsp\n", - (fsize + 4));
257 + asm_fprintf (stream, "\tadd.w %0I%d,%Rsp\n", -fsize_with_regs);
259 - asm_fprintf (stream, "\taddw %0I%d,%Rsp\n", - (fsize + 4));
260 + asm_fprintf (stream, "\taddw %0I%d,%Rsp\n", -fsize_with_regs);
266 - asm_fprintf (stream, "\tlea (%d,%Rsp),%Rsp\n", - (fsize + 4));
267 + asm_fprintf (stream, "\tlea (%d,%Rsp),%Rsp\n", -fsize_with_regs);
269 - asm_fprintf (stream, "\tlea %Rsp@(%d),%Rsp\n", - (fsize + 4));
270 + asm_fprintf (stream, "\tlea %Rsp@(%d),%Rsp\n", -fsize_with_regs);
275 + else /* fsize_with_regs >= 0x8000 */
277 - /* asm_fprintf() cannot handle %. */
279 - asm_fprintf (stream, "\tadd.l %0I%d,%Rsp\n", - (fsize + 4));
280 + asm_fprintf (stream, "\tadd.l %0I%d,%Rsp\n", -fsize_with_regs);
282 - asm_fprintf (stream, "\taddl %0I%d,%Rsp\n", - (fsize + 4));
283 + asm_fprintf (stream, "\taddl %0I%d,%Rsp\n", -fsize_with_regs);
286 if (dwarf2out_do_frame ())
287 @@ -676,7 +682,11 @@ m68k_output_function_prologue (stream, s
288 cfa_offset = cfa_store_offset;
289 dwarf2out_def_cfa ("", STACK_POINTER_REGNUM, cfa_offset);
293 + } /* !frame_pointer_needed */
295 + num_saved_regs = 0;
297 #ifdef SUPPORT_SUN_FPA
298 for (regno = 24; regno < 56; regno++)
299 if (m68k_save_reg (regno, interrupt_handler))
300 @@ -813,9 +823,8 @@ m68k_output_function_prologue (stream, s
301 then use the plain address register indirect mode. We also
302 have to invert the register save mask to use the new mode.
304 - The required register save space was combined earlier with
305 - the fsize amount if possible. Check for this and don't add
307 + The required register save space was combined earlier with
308 + the fsize amount. Don't add it again. */
312 @@ -824,14 +833,6 @@ m68k_output_function_prologue (stream, s
314 newmask |= (1 << (15-i));
316 - if ( fsize + num_saved_regs * 4 >= 0x8000 )
319 - asm_fprintf (stream, "\tlea (%d,%Rsp),%Rsp\n", -num_saved_regs*4);
321 - asm_fprintf (stream, "\tlea %Rsp@(%d),%Rsp\n", -num_saved_regs*4);
325 asm_fprintf (stream, "\tmovm.l %0I0x%x,(%Rsp)\n", newmask);
327 @@ -1053,6 +1054,7 @@ m68k_output_function_epilogue (stream, s
329 HOST_WIDE_INT offset, foffset, fpoffset;
330 HOST_WIDE_INT fsize = (size + 3) & -4;
331 + HOST_WIDE_INT fsize_with_regs;
333 rtx insn = get_last_insn ();
334 int restore_from_sp = 0;
335 @@ -1103,18 +1105,45 @@ m68k_output_function_epilogue (stream, s
336 stack adjustment needed at that point. */
337 restore_from_sp = ! frame_pointer_needed
338 || (! current_function_calls_alloca && leaf_function_p ());
340 + /* fsize_with_regs is the size we need to adjust the sp when
341 + popping the frame */
342 + fsize_with_regs = fsize;
344 + /* Because the ColdFire doesn't support moveml with
345 + complex address modes, we must adjust the stack manually
346 + after restoring registers. When the frame pointer isn't used,
347 + we can merge movem adjustment into frame unlinking
348 + made immediately after it. */
349 + if (TARGET_COLDFIRE && restore_from_sp && (nregs > 2))
350 + fsize_with_regs += nregs * 4;
352 if (offset + fsize >= 0x8000
354 && (mask || fmask || fpoffset))
356 + /* Because the ColdFire doesn't support moveml with
357 + complex address modes we make an extra correction here */
358 + if (TARGET_COLDFIRE)
361 + asm_fprintf (stream, "\t%Omove.l %0I%d,%Ra1\n", -fsize - offset);
363 + asm_fprintf (stream, "\tmovel %0I%d,%Ra1\n", -fsize - offset);
369 - asm_fprintf (stream, "\t%Omove.l %0I%d,%Ra1\n", -fsize);
370 + asm_fprintf (stream, "\t%Omove.l %0I%d,%Ra1\n", -fsize);
372 - asm_fprintf (stream, "\tmovel %0I%d,%Ra1\n", -fsize);
373 + asm_fprintf (stream, "\tmovel %0I%d,%Ra1\n", -fsize);
379 - if (TARGET_COLDFIRE || nregs <= 2)
382 /* Restore each separately in the same order moveml does.
383 Using two movel instructions instead of a single moveml
384 @@ -1186,12 +1215,9 @@ m68k_output_function_epilogue (stream, s
387 asm_fprintf (stream, "\tmovm.l (%Rsp),%0I0x%x\n", mask);
388 - asm_fprintf (stream, "\tlea (%d,%Rsp),%Rsp\n", nregs*4);
390 asm_fprintf (stream, "\tmoveml %Rsp@,%0I0x%x\n", mask);
391 - asm_fprintf (stream, "\tlea %Rsp@(%d),%Rsp\n", nregs*4);
397 @@ -1206,9 +1232,8 @@ m68k_output_function_epilogue (stream, s
398 offset + fsize, mask);
404 + else /* !TARGET_COLDFIRE */
408 @@ -1328,60 +1353,60 @@ m68k_output_function_epilogue (stream, s
409 if (frame_pointer_needed)
410 fprintf (stream, "\tunlk %s\n",
411 reg_names[FRAME_POINTER_REGNUM]);
413 + else if (fsize_with_regs)
416 - if (fsize + 4 <= 8)
417 + if (fsize_with_regs <= 8)
419 if (!TARGET_COLDFIRE)
422 - asm_fprintf (stream, "\taddq.w %0I%d,%Rsp\n", fsize + 4);
423 + asm_fprintf (stream, "\taddq.w %0I%d,%Rsp\n", fsize_with_regs);
425 - asm_fprintf (stream, "\taddqw %0I%d,%Rsp\n", fsize + 4);
426 + asm_fprintf (stream, "\taddqw %0I%d,%Rsp\n", fsize_with_regs);
430 + else /* TARGET_COLDFIRE */
433 - asm_fprintf (stream, "\taddq.l %0I%d,%Rsp\n", fsize + 4);
434 + asm_fprintf (stream, "\taddq.l %0I%d,%Rsp\n", fsize_with_regs);
436 - asm_fprintf (stream, "\taddql %0I%d,%Rsp\n", fsize + 4);
437 + asm_fprintf (stream, "\taddql %0I%d,%Rsp\n", fsize_with_regs);
441 - else if (fsize + 4 <= 16 && TARGET_CPU32)
442 + else if (fsize_with_regs <= 16 && TARGET_CPU32)
444 /* On the CPU32 it is faster to use two addqw instructions to
445 add a small integer (8 < N <= 16) to a register. */
446 /* asm_fprintf() cannot handle %. */
448 asm_fprintf (stream, "\taddq.w %0I8,%Rsp\n\taddq.w %0I%d,%Rsp\n",
450 + fsize_with_regs - 8);
452 asm_fprintf (stream, "\taddqw %0I8,%Rsp\n\taddqw %0I%d,%Rsp\n",
454 + fsize_with_regs - 8);
458 #endif /* not NO_ADDSUB_Q */
459 - if (fsize + 4 < 0x8000)
460 + if (fsize_with_regs < 0x8000)
464 /* asm_fprintf() cannot handle %. */
466 - asm_fprintf (stream, "\tadd.w %0I%d,%Rsp\n", fsize + 4);
467 + asm_fprintf (stream, "\tadd.w %0I%d,%Rsp\n", fsize_with_regs);
469 - asm_fprintf (stream, "\taddw %0I%d,%Rsp\n", fsize + 4);
470 + asm_fprintf (stream, "\taddw %0I%d,%Rsp\n", fsize_with_regs);
476 - asm_fprintf (stream, "\tlea (%d,%Rsp),%Rsp\n", fsize + 4);
477 + asm_fprintf (stream, "\tlea (%d,%Rsp),%Rsp\n", fsize_with_regs);
479 - asm_fprintf (stream, "\tlea %Rsp@(%d),%Rsp\n", fsize + 4);
480 + asm_fprintf (stream, "\tlea %Rsp@(%d),%Rsp\n", fsize_with_regs);
484 @@ -1389,9 +1414,9 @@ m68k_output_function_epilogue (stream, s
486 /* asm_fprintf() cannot handle %. */
488 - asm_fprintf (stream, "\tadd.l %0I%d,%Rsp\n", fsize + 4);
489 + asm_fprintf (stream, "\tadd.l %0I%d,%Rsp\n", fsize_with_regs);
491 - asm_fprintf (stream, "\taddl %0I%d,%Rsp\n", fsize + 4);
492 + asm_fprintf (stream, "\taddl %0I%d,%Rsp\n", fsize_with_regs);
496 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.h gcc-3.3.1-20030720/gcc/config/m68k/m68k.h
497 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.h 2003-07-25 00:35:34.000000000 +0200
498 +++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.h 2003-07-25 01:02:48.000000000 +0200
499 @@ -441,9 +441,9 @@ extern int target_flags;
500 the address registers numbers 010-017,
501 and the 68881 floating point registers numbers 020-027. */
502 #ifndef SUPPORT_SUN_FPA
503 -#define FIRST_PSEUDO_REGISTER 24
504 +#define FIRST_PSEUDO_REGISTER 25
506 -#define FIRST_PSEUDO_REGISTER 56
507 +#define FIRST_PSEUDO_REGISTER 57
510 /* This defines the register which is used to hold the offset table for PIC. */
511 @@ -464,7 +464,10 @@ extern int target_flags;
513 /* Floating point registers \
515 - 0, 0, 0, 0, 0, 0, 0, 0 }
516 + 0, 0, 0, 0, 0, 0, 0, 0, \
518 + /* Arg pointer. */ \
521 /* 1 for registers not available across function calls.
522 These must include the FIXED_REGISTERS and also any
523 @@ -475,7 +478,7 @@ extern int target_flags;
524 #define CALL_USED_REGISTERS \
525 {1, 1, 0, 0, 0, 0, 0, 0, \
526 1, 1, 0, 0, 0, 0, 0, 1, \
527 - 1, 1, 0, 0, 0, 0, 0, 0 }
528 + 1, 1, 0, 0, 0, 0, 0, 0, 1 }
530 #else /* SUPPORT_SUN_FPA */
532 @@ -497,6 +500,9 @@ extern int target_flags;
534 0, 0, 0, 0, 0, 0, 0, 0, \
536 + /* Arg pointer. */ \
539 /* Sun3 FPA registers. */ \
540 1, 0, 0, 0, 0, 0, 0, 0, \
541 0, 0, 0, 0, 0, 0, 0, 0, \
542 @@ -512,7 +518,7 @@ extern int target_flags;
543 #define CALL_USED_REGISTERS \
544 {1, 1, 0, 0, 0, 0, 0, 0, \
545 1, 1, 0, 0, 0, 0, 0, 1, \
546 - 1, 1, 0, 0, 0, 0, 0, 0, \
547 + 1, 1, 0, 0, 0, 0, 0, 0, 1, \
548 /* FPA registers. */ \
549 1, 1, 1, 1, 0, 0, 0, 0, \
550 0, 0, 0, 0, 0, 0, 0, 0, \
551 @@ -658,8 +664,11 @@ extern int target_flags;
552 This is computed in `reload', in reload1.c. */
553 #define FRAME_POINTER_REQUIRED 0
555 -/* Base register for access to arguments of the function. */
556 -#define ARG_POINTER_REGNUM 14
557 +/* Base register for access to arguments of the function.
558 + * This isn't a hardware register. It will be eliminated to the
559 + * stack pointer or frame pointer.
561 +#define ARG_POINTER_REGNUM 24
563 /* Register in which static-chain is passed to a function. */
564 #define STATIC_CHAIN_REGNUM 8
565 @@ -721,12 +727,12 @@ enum reg_class {
567 {0x00000000}, /* NO_REGS */ \
568 {0x000000ff}, /* DATA_REGS */ \
569 - {0x0000ff00}, /* ADDR_REGS */ \
570 + {0x0100ff00}, /* ADDR_REGS */ \
571 {0x00ff0000}, /* FP_REGS */ \
572 - {0x0000ffff}, /* GENERAL_REGS */ \
573 + {0x0100ffff}, /* GENERAL_REGS */ \
574 {0x00ff00ff}, /* DATA_OR_FP_REGS */ \
575 - {0x00ffff00}, /* ADDR_OR_FP_REGS */ \
576 - {0x00ffffff}, /* ALL_REGS */ \
577 + {0x01ffff00}, /* ADDR_OR_FP_REGS */ \
578 + {0x01ffffff}, /* ALL_REGS */ \
581 /* The same information, inverted:
582 @@ -734,7 +740,8 @@ enum reg_class {
583 reg number REGNO. This could be a conditional expression
584 or could index an array. */
586 -#define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
587 +extern const enum reg_class regno_reg_class[];
588 +#define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)])
590 #else /* defined SUPPORT_SUN_FPA */
592 @@ -1792,7 +1802,7 @@ __transfer_from_trampoline () \
593 #define REGISTER_NAMES \
594 {"d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", \
595 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "sp", \
596 - "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7" }
597 + "fp0", "fp1", "fp2", "fp3", "fp4", "fp5", "fp6", "fp7", "argptr" }
599 #else /* SUPPORTED_SUN_FPA */
601 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/m68kelf.h gcc-3.3.1-20030720/gcc/config/m68k/m68kelf.h
602 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68kelf.h 2003-07-25 00:28:46.000000000 +0200
603 +++ gcc-3.3.1-20030720/gcc/config/m68k/m68kelf.h 2003-07-25 01:02:48.000000000 +0200
604 @@ -96,7 +96,7 @@ Boston, MA 02111-1307, USA. */
605 #define REGISTER_NAMES \
606 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
607 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \
608 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
609 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr" }
611 /* This is how to output an assembler line that says to advance the
612 location counter to a multiple of 2**LOG bytes. */
613 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/mot3300.h gcc-3.3.1-20030720/gcc/config/m68k/mot3300.h
614 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/mot3300.h 2003-07-25 00:28:46.000000000 +0200
615 +++ gcc-3.3.1-20030720/gcc/config/m68k/mot3300.h 2003-07-25 01:02:48.000000000 +0200
616 @@ -141,7 +141,7 @@ Boston, MA 02111-1307, USA. */
617 #define REGISTER_NAMES \
618 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
619 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
620 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7"}
621 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr"}
623 #undef FUNCTION_EXTRA_EPILOGUE
624 #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
625 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/pbb.h gcc-3.3.1-20030720/gcc/config/m68k/pbb.h
626 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/pbb.h 2003-07-25 00:28:46.000000000 +0200
627 +++ gcc-3.3.1-20030720/gcc/config/m68k/pbb.h 2003-07-25 01:02:48.000000000 +0200
628 @@ -101,7 +101,7 @@ Boston, MA 02111-1307, USA. */
629 #define REGISTER_NAMES \
630 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
631 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \
632 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7"}
633 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr" }
635 #undef FUNCTION_EXTRA_EPILOGUE
636 #define FUNCTION_EXTRA_EPILOGUE(FILE, SIZE) \
637 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/sgs.h gcc-3.3.1-20030720/gcc/config/m68k/sgs.h
638 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/sgs.h 2001-12-20 18:36:36.000000000 +0100
639 +++ gcc-3.3.1-20030720/gcc/config/m68k/sgs.h 2003-07-25 01:02:48.000000000 +0200
640 @@ -84,7 +84,7 @@ Boston, MA 02111-1307, USA. */
641 #define REGISTER_NAMES \
642 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
643 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", \
644 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7" }
645 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr" }
647 #else /* SUPPORTED_SUN_FPA */
649 @@ -95,7 +95,7 @@ Boston, MA 02111-1307, USA. */
650 "%fpa0", "%fpa1", "%fpa2", "%fpa3", "%fpa4", "%fpa5", "%fpa6","%fpa7", \
651 "%fpa8", "%fpa9", "%fpa10","%fpa11","%fpa12","%fpa13","%fpa14","%fpa15", \
652 "%fpa16","%fpa17","%fpa18","%fpa19","%fpa20","%fpa21","%fpa22","%fpa23", \
653 - "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31" }
654 + "%fpa24","%fpa25","%fpa26","%fpa27","%fpa28","%fpa29","%fpa30","%fpa31", "argptr" }
656 #endif /* defined SUPPORT_SUN_FPA */
658 diff -Nrup gcc-3.3.1-20030720.orig/gcc/config/m68k/tower.h gcc-3.3.1-20030720/gcc/config/m68k/tower.h
659 --- gcc-3.3.1-20030720.orig/gcc/config/m68k/tower.h 2001-11-19 19:30:03.000000000 +0100
660 +++ gcc-3.3.1-20030720/gcc/config/m68k/tower.h 2003-07-25 01:02:48.000000000 +0200
661 @@ -88,7 +88,7 @@ Boston, MA 02111-1307, USA. */
662 #define REGISTER_NAMES \
663 {"%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", \
664 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%sp", \
665 - "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7"}
666 + "%fp0", "%fp1", "%fp2", "%fp3", "%fp4", "%fp5", "%fp6", "%fp7", "argptr" }
668 #undef REGISTER_PREFIX
669 #define REGISTER_PREFIX "%"