406-avr-libc-ata5831.patch

   1 diff -Naurp configure.ac configure.ac
   2 --- configure.ac        2013-03-15 12:01:34.000000000 +0530
   3 +++ configure.ac        2013-03-15 12:01:52.000000000 +0530
   4 @@ -993,6 +993,14 @@ CHECK_AVR_DEVICE(atmega2564rfr2)
   5  AM_CONDITIONAL(HAS_atmega2564rfr2, test "x$HAS_atmega2564rfr2" = "xyes")
   6
   7
   8 +# avr7
   9 +CHECK_AVR_DEVICE(avr7)
  10 +AM_CONDITIONAL(HAS_avr7, test "x$HAS_avr7" = "xyes")
  11 +
  12 +CHECK_AVR_DEVICE(ata5831)
  13 +AM_CONDITIONAL(HAS_ata5831, test "x$HAS_ata5831" = "xyes")
  14 +
  15 +
  16  # avrxmega2
  17  CHECK_AVR_DEVICE(avrxmega2)
  18  AM_CONDITIONAL(HAS_avrxmega2, test "x$HAS_avrxmega2" = "xyes")
  19 @@ -1458,6 +1466,12 @@ AC_CONFIG_FILES([
  20         avr/lib/avr6/atmega2564rfr2/Makefile
  21  ])
  22
  23 +#avr7
  24 +AC_CONFIG_FILES([
  25 +       avr/lib/avr7/Makefile
  26 +       avr/lib/avr7/ata5831/Makefile
  27 +])
  28 +
  29  # avrxmega2
  30  AC_CONFIG_FILES([
  31         avr/lib/avrxmega2/Makefile
  32 diff -Naurp devtools/gen-avr-lib-tree.sh devtools/gen-avr-lib-tree.sh
  33 --- devtools/gen-avr-lib-tree.sh        2013-03-15 12:01:34.000000000 +0530
  34 +++ devtools/gen-avr-lib-tree.sh        2013-03-15 12:01:52.000000000 +0530
  35 @@ -289,6 +289,10 @@ atmega256rfr2:crtm256rfr2.o:${DEV_DEFS}:
  36  atmega2564rfr2:crtm2564rfr2.o:${DEV_DEFS}:${CFLAGS_SPACE}:${DEV_ASFLAGS}\
  37  "
  38
  39 +AVR7_DEV_INFO="\
  40 +ata5831:crta5831.o:${DEV_DEFS}:${CFLAGS_SPACE}:${DEV_ASFLAGS}\
  41 +"
  42 +
  43  AVRXMEGA2_DEV_INFO="\
  44  atxmega16a4:crtx16a4.o:${DEV_DEFS}:${CFLAGS_SPACE}:${DEV_ASFLAGS};\
  45  atxmega16a4u:crtx16a4u.o:${DEV_DEFS}:${CFLAGS_SPACE}:${DEV_ASFLAGS};\
  46 @@ -369,6 +373,7 @@ avr4:AVR4_DEV_INFO:${LIB_DEFS}:${CFLAGS_
  47  avr5:AVR5_DEV_INFO:${LIB_DEFS}:${CFLAGS_SPACE}:${DEV_ASFLAGS};\
  48  avr51:AVR51_DEV_INFO:${LIB_DEFS}:${CFLAGS_BIG_MEMORY}:${DEV_ASFLAGS};\
  49  avr6:AVR6_DEV_INFO:${LIB_DEFS}:${CFLAGS_BIG_MEMORY}:${DEV_ASFLAGS};\
  50 +avr7:AVR7_DEV_INFO:${LIB_DEFS}:${CFLAGS_SPACE}:${DEV_ASFLAGS};\
  51  avrxmega2:AVRXMEGA2_DEV_INFO:${LIB_DEFS}:${CFLAGS_SPACE}:${DEV_ASFLAGS};\
  52  avrxmega4:AVRXMEGA4_DEV_INFO:${LIB_DEFS}:${CFLAGS_BIG_MEMORY}:${DEV_ASFLAGS};\
  53  avrxmega5:AVRXMEGA5_DEV_INFO:${LIB_DEFS}:${CFLAGS_BIG_MEMORY}:${DEV_ASFLAGS};\
  54 diff -Naurp doc/api/main_page.dox doc/api/main_page.dox
  55 --- doc/api/main_page.dox       2013-03-15 12:01:34.000000000 +0530
  56 +++ doc/api/main_page.dox       2013-03-15 12:01:52.000000000 +0530
  57 @@ -212,6 +212,7 @@ compile-time.
  58  - ata5790
  59  - ata5790n
  60  - ata5795
  61 +- ata5831
  62
  63  \par CAN AVR Devices:
  64
  65 diff -Naurp doc/api/using-tools.dox doc/api/using-tools.dox
  66 --- doc/api/using-tools.dox     2013-03-15 12:01:34.000000000 +0530
  67 +++ doc/api/using-tools.dox     2013-03-15 12:03:29.000000000 +0530
  68 @@ -180,6 +180,20 @@ AVR will be defined as well when using t
  69      </td>
  70      <td>"Enhanced" CPU core, 256 KB of ROM</td>
  71    </tr>
  72 +  <tr>
  73 +    <td>avr7&nbsp;[2]</td>
  74 +    <td>
  75 +    __AVR_ARCH__=7<BR>
  76 +    __AVR_MEGA__&nbsp;[5]<BR>
  77 +    __AVR_ENHANCED__&nbsp;[5]<BR>
  78 +    __AVR_HAVE_JMP_CALL__&nbsp;[4]<BR>
  79 +    __AVR_HAVE_MOVW__&nbsp;[1]<BR>
  80 +    __AVR_HAVE_LPMX__&nbsp;[1]<BR>
  81 +    __AVR_HAVE_MUL__&nbsp;[1]<BR>
  82 +    __AVR_2_BYTE_PC__&nbsp;[2]
  83 +    </td>
  84 +    <td>"Enhanced" CPU core, 20K of Flash that starts at 0x8000</td>
  85 +  </tr>
  86    </table>
  87    <p>
  88    [1] New in GCC 4.2<BR>
  89 @@ -409,6 +423,8 @@ AVR will be defined as well when using t
  90    <tr><td>avr6</td><td>atmega256rfr2</td><td>__AVR_ATmega256RFR2__</td></tr>
  91    <tr><td>avr6</td><td>atmega2564rfr2</td><td>__AVR_ATmega2564RFR2__</td></tr>
  92
  93 +  <tr><td>avr7</td><td>ata5831</td><td>__AVR_ATA5831__</td></tr>
  94 +
  95    <tr><td>avrxmega2</td><td>atxmega16a4</td><td>__AVR_ATxmega16A4__</td></tr>
  96    <tr><td>avrxmega2</td><td>atxmega16a4u</td><td>__AVR_ATxmega16A4U__</td></tr>
  97    <tr><td>avrxmega2</td><td>atxmega16c4</td><td>__AVR_ATxmega16C4__</td></tr>
  98 diff -Naurp include/avr/eeprom.h include/avr/eeprom.h
  99 --- include/avr/eeprom.h        2013-03-15 12:01:34.000000000 +0530
 100 +++ include/avr/eeprom.h        2013-03-15 12:01:52.000000000 +0530
 101 @@ -495,6 +495,8 @@
 102  # define _EEPROM_SUFFIX _a5790n
 103  #elif defined (__AVR_ATA5795__)
 104  # define _EEPROM_SUFFIX _a5795
 105 +#elif defined (__AVR_ATA5831__)
 106 +# define _EEPROM_SUFFIX _a5831
 107  /* avr1: the following only supported for assembler programs */
 108  #elif defined (__AVR_ATtiny28__)
 109  # define _EEPROM_SUFFIX _tn28
 110 diff -Naurp include/avr/io.h include/avr/io.h
 111 --- include/avr/io.h    2013-03-15 12:01:34.000000000 +0530
 112 +++ include/avr/io.h    2013-03-15 12:01:52.000000000 +0530
 113 @@ -514,6 +514,8 @@
 114  #  include <avr/ioa5505.h>
 115  #elif defined (__AVR_ATA5795__)
 116  #  include <avr/ioa5795.h>
 117 +#elif defined (__AVR_ATA5831__)
 118 +#  include <avr/ioa5831.h>
 119  #elif defined (__AVR_ATA6285__)
 120  #  include <avr/ioa6285.h>
 121  #elif defined (__AVR_ATA6286__)
 122 diff -Naurp include/avr/Makefile.am include/avr/Makefile.am
 123 --- include/avr/Makefile.am     2013-03-15 12:01:34.000000000 +0530
 124 +++ include/avr/Makefile.am     2013-03-15 12:01:52.000000000 +0530
 125 @@ -69,6 +69,7 @@ avr_HEADERS = \
 126      ioa5790.h \
 127      ioa5790n.h \
 128      ioa5795.h \
 129 +    ioa5831.h \
 130      ioa6285.h \
 131      ioa6286.h \
 132      ioa6289.h \
 133 diff -Naurp include/avr/power.h include/avr/power.h
 134 --- include/avr/power.h 2013-03-15 12:01:34.000000000 +0530
 135 +++ include/avr/power.h 2013-03-15 12:01:52.000000000 +0530
 136 @@ -346,6 +346,163 @@ find out which macros are applicable to
 137      <td>Disable all modules.</td>
 138      <td>ATxmega6A4, ATxmega32A4, ATxmega64A1, ATxmega64A1U, ATxmega64A3, ATxmegaA1, ATxmegaA1U, ATxmega128A3, ATxmega192A3, ATxmega256A3, ATxmegaA3B, ATxmega16D4, ATxmega32D4, ATxmega64D3, ATxmega128D3,ATxmega192D3, ATmega640, ATmega1280, ATmega1281, ATmega128RFA1, ATmega2560, ATmega2561, AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90PWM1, AT90PWM2, AT90PWM2B, AT90PWM3, AT90PWM3B, AT90PWM216, AT90PWM316, ATmega165, ATmega165P, ATmega325, ATmega325A, ATmega325PA, ATmega3250, ATmega3250A, ATmega3250PA, ATmega645, ATmega6450, ATmega169, ATmega169P, ATmega329, ATmega329A, ATmega3290, ATmega3290A, ATmega3290PA, ATmega649, ATmega6490, ATmega164P, ATmega324P, ATmega644, ATmega406, ATmega48, ATmega88, ATmega168, ATtiny24, ATtiny44, ATtiny84, ATtiny84A, ATtiny25, ATtiny45, ATtiny85, ATtiny261, ATtiny461, ATtiny861, ATxmega64B1, ATxmega128B1, ATxmega64B3, ATxmega128B3, ATxmega16A4U, ATxmega32A4U, ATxmega64A3U, ATxmega128A3U, ATxmega192A3U, ATxmega256A3U</td>
 139    </tr>
 140 +
 141 +  <tr>
 142 +    <td>power_clock_output_enable()</td>
 143 +    <td>Enable clock output module</td>
 144 +    <td>ATA5831</td>
 145 +  </tr>
 146 +
 147 +  <tr>
 148 +    <td>power_clock_output_disable()</td>
 149 +    <td>Enable clock output module</td>
 150 +    <td>ATA5831</td>
 151 +  </tr>
 152 +
 153 +  <tr>
 154 +    <td>power_voltage_monitor_enable()</td>
 155 +    <td>Enable voltage monitor module</td>
 156 +    <td>ATA5831</td>
 157 +  </tr>
 158 +
 159 +  <tr>
 160 +    <td>power_voltage_monitor_disable()</td>
 161 +    <td>Disable voltage monitor module</td>
 162 +    <td>ATA5831</td>
 163 +  </tr>
 164 +
 165 +  <tr>
 166 +    <td>power_crc_enable()</td>
 167 +    <td>Enable CRC module</td>
 168 +    <td>ATA5831</td>
 169 +  </tr>
 170 +
 171 +  <tr>
 172 +    <td>power_crc_disable()</td>
 173 +    <td>Disable CRC module</td>
 174 +    <td>ATA5831</td>
 175 +  </tr>
 176 +
 177 +  <tr>
 178 +    <td>power_transmit_dsp_control_enable()</td>
 179 +    <td>Enable Transmit DSP control module</td>
 180 +    <td>ATA5831</td>
 181 +  </tr>
 182 +
 183 +  <tr>
 184 +    <td>power_transmit_dsp_control_disable()</td>
 185 +    <td>Disable Transmit DSP control module</td>
 186 +    <td>ATA5831</td>
 187 +  </tr>
 188 +
 189 +  <tr>
 190 +    <td>power_receive_dsp_control_enable()</td>
 191 +    <td>Enable Receive DSP control module</td>
 192 +    <td>ATA5831</td>
 193 +  </tr>
 194 +
 195 +  <tr>
 196 +    <td>power_receive_dsp_control_disable()</td>
 197 +    <td>Disable Receive DSP control module</td>
 198 +    <td>ATA5831</td>
 199 +  </tr>
 200 +
 201 +  <tr>
 202 +    <td>power_sequencer_state_machine_enable()</td>
 203 +    <td>Enable power sequencer state machine</td>
 204 +    <td>ATA5831</td>
 205 +  </tr>
 206 +
 207 +  <tr>
 208 +    <td>power_sequencer_state_machine_disable()</td>
 209 +    <td>Disable power sequencer state machine</td>
 210 +    <td>ATA5831</td>
 211 +  </tr>
 212 +
 213 +  <tr>
 214 +    <td>power_tx_modulator_enable()</td>
 215 +    <td>Enable Tx modulator</td>
 216 +    <td>ATA5831</td>
 217 +  </tr>
 218 +
 219 +  <tr>
 220 +    <td>power_tx_modulator_disable()</td>
 221 +    <td>Disable Tx modulator</td>
 222 +    <td>ATA5831</td>
 223 +  </tr>
 224 +
 225 +  <tr>
 226 +    <td>power_rssi_buffer_enable()</td>
 227 +    <td>Enable RSSI buffer</td>
 228 +    <td>ATA5831</td>
 229 +  </tr>
 230 +
 231 +  <tr>
 232 +    <td>power_rssi_buffer_disable()</td>
 233 +    <td>Disable RSSI buffer</td>
 234 +    <td>ATA5831</td>
 235 +  </tr>
 236 +
 237 +  <tr>
 238 +    <td>power_id_scan_enable()</td>
 239 +    <td>Enable ID Scan</td>
 240 +    <td>ATA5831</td>
 241 +  </tr>
 242 +
 243 +  <tr>
 244 +    <td>power_id_scan_disable()</td>
 245 +    <td>Disable ID Scan</td>
 246 +    <td>ATA5831</td>
 247 +  </tr>
 248 +
 249 +  <tr>
 250 +    <td>power_data_fifo_enable()</td>
 251 +    <td>Enable data FIFO</td>
 252 +    <td>ATA5831</td>
 253 +  </tr>
 254 +
 255 +  <tr>
 256 +    <td>power_data_fifo_disable()</td>
 257 +    <td>Disable data FIFO</td>
 258 +    <td>ATA5831</td>
 259 +  </tr>
 260 +
 261 +  <tr>
 262 +    <td>power_preamble_rssi_fifo_enable()</td>
 263 +    <td>Enable preamble/RSSI FIFO</td>
 264 +    <td>ATA5831</td>
 265 +  </tr>
 266 +
 267 +  <tr>
 268 +    <td>power_preamble_rssi_fifo_disable()</td>
 269 +    <td>Disable preamble/RSSI FIFO</td>
 270 +    <td>ATA5831</td>
 271 +  </tr>
 272 +
 273 +  <tr>
 274 +    <td>power_rx_buffer_A_enable()</td>
 275 +    <td>Enable receive buffer for data path A</td>
 276 +    <td>ATA5831</td>
 277 +  </tr>
 278 +
 279 +  <tr>
 280 +    <td>power_rx_buffer_A_disable()</td>
 281 +    <td>Disable receive buffer for data path A</td>
 282 +    <td>ATA5831</td>
 283 +  </tr>
 284 +
 285 +  <tr>
 286 +    <td>power_rx_buffer_B_enable()</td>
 287 +    <td>Enable receive buffer for data path B</td>
 288 +    <td>ATA5831</td>
 289 +  </tr>
 290 +
 291 +  <tr>
 292 +    <td>power_rx_buffer_B_disable()</td>
 293 +    <td>Disable receive buffer for data path B</td>
 294 +    <td>ATA5831</td>
 295 +  </tr>
 296 +
 297  </table>
 298  </center>
 299  </small>
 300 @@ -1731,6 +1888,79 @@ do{ \
 301  #define power_all_enable()      (PRR0 &= (uint8_t)~((1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)))
 302  #define power_all_disable()     (PRR0 |= (uint8_t)((1<<PRLIN)|(1<<PRSPI)|(1<<PRTIM0)|(1<<PRTIM1)))
 303
 304 +#elif defined(__AVR_ATA5831__)
 305 +
 306 +#define power_clock_output_enable()     (PRR0 &= (uint8_t)~(1 << PRCO))
 307 +#define power_clock_output_disable()    (PRR0 |= (uint8_t)(1 << PRCO))
 308 +
 309 +#define power_voltage_monitor_enable()  (PRR0 &= (uint8_t)~(1 << PRVM))
 310 +#define power_voltage_monitor_disable() (PRR0 |= (uint8_t)(1 << PRVM))
 311 +
 312 +#define power_crc_enable()              (PRR0 &= (uint8_t)~(1 << PRCRC))
 313 +#define power_crc_disable()             (PRR0 |= (uint8_t)(1 << PRCRC))
 314 +
 315 +#define power_transmit_dsp_control_enable()     (PRR0 &= (uint8_t)~(1 << PRTXDC))
 316 +#define power_transmit_dsp_control_disable()    (PRR0 |= (uint8_t)(1 << PRTXDC))
 317 +
 318 +#define power_receive_dsp_control_enable()      (PRR0 &= (uint8_t)~(1 << PRRXDC))
 319 +#define power_receive_dsp_control_disable()     (PRR0 |= (uint8_t)(1 << PRRXDC))
 320 +
 321 +#define power_spi_enable()              (PRR0 &= (uint8_t)~(1 << PRSPI))
 322 +#define power_spi_disable()             (PRR0 |= (uint8_t)(1 << PRSPI))
 323 +
 324 +#define power_timer1_enable()           (PRR1 &= (uint8_t)~(1 << PRT1))
 325 +#define power_timer1_disable()          (PRR1 |= (uint8_t)(1 << PRT1))
 326 +
 327 +#define power_timer2_enable()           (PRR1 &= (uint8_t)~(1 << PRT2))
 328 +#define power_timer2_disable()          (PRR1 |= (uint8_t)(1 << PRT2))
 329 +
 330 +#define power_timer3_enable()           (PRR1 &= (uint8_t)~(1 << PRT3))
 331 +#define power_timer3_disable()          (PRR1 |= (uint8_t)(1 << PRT3))
 332 +
 333 +#define power_timer4_enable()           (PRR1 &= (uint8_t)~(1 << PRT4))
 334 +#define power_timer4_disable()          (PRR1 |= (uint8_t)(1 << PRT4))
 335 +
 336 +#define power_timer5_enable()           (PRR1 &= (uint8_t)~(1 << PRT5))
 337 +#define power_timer5_disable()          (PRR1 |= (uint8_t)(1 << PRT5))
 338 +
 339 +#define power_sequencer_state_machine_enable()  (PRR2 &= (uint8_t)~(1 << PRSSM))
 340 +#define power_sequencer_state_machine_disable() (PRR2 |= (uint8_t)(1 << PRSSM))
 341 +
 342 +#define power_tx_modulator_enable()     (PRR2 &= (uint8_t)~(1 << PRTM))
 343 +#define power_tx_modulator_disable()    (PRR2 |= (uint8_t)(1 << PRTM))
 344 +
 345 +#define power_rssi_buffer_enable()      (PRR2 &= (uint8_t)~(1 << PRRS))
 346 +#define power_rssi_buffer_disable()     (PRR2 |= (uint8_t)(1 << PRRS))
 347 +
 348 +#define power_id_scan_enable()          (PRR2 &= (uint8_t)~(1 << PRIDS))
 349 +#define power_id_scan_disable()         (PRR2 |= (uint8_t)(1 << PRIDS))
 350 +
 351 +#define power_data_fifo_enable()        (PRR2 &= (uint8_t)~(1 << PRDF))
 352 +#define power_data_fifo_disable()       (PRR2 |= (uint8_t)(1 << PRDF))
 353 +
 354 +#define power_preamble_rssi_fifo_enable()       (PRR2 &= (uint8_t)~(1 << PRSF))
 355 +#define power_preamble_rssi_fifo_disable()      (PRR2 |= (uint8_t)(1 << PRSF))
 356 +
 357 +#define power_rx_buffer_A_enable()      (PRR2 &= (uint8_t)~(1 << PRXA))
 358 +#define power_rx_buffer_A_disable()     (PRR2 |= (uint8_t)(1 << PRXA))
 359 +
 360 +#define power_rx_buffer_B_enable()      (PRR2 &= (uint8_t)~(1 << PRXB))
 361 +#define power_rx_buffer_B_disable()     (PRR2 |= (uint8_t)(1 << PRXB))
 362 +
 363 +#define power_all_enable() \
 364 +do{ \
 365 +    PRR0 &= (uint8_t)~((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
 366 +    PRR1 &= (uint8_t)~((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
 367 +    PRR2 &= (uint8_t)~((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
 368 +}while(0)
 369 +
 370 +#define power_all_disable() \
 371 +do{ \
 372 +    PRR0 |= (uint8_t)((1 << PRCO) | (1 << PRVM) | (1 << PRCRC) | (1 << PRTXDC) | (1 << PRRXDC) | (1 << PRSPI)); \
 373 +    PRR1 |= (uint8_t)((1 << PRT1) | (1 << PRT2) | (1 << PRT3) | (1 << PRT4) | (1 << PRT5)); \
 374 +    PRR2 |= (uint8_t)((1 << PRSSM) | (1 << PRTM) | (1 << PRRS) | (1 << PRIDS) | (1 << PRDF) | (1 << PRSF) | (1 << PRXA) | (1 << PRXB)); \
 375 +}while(0)
 376 +
 377  #elif defined(__AVR_ATmega16M1__) \
 378  || defined(__AVR_ATmega32C1__) \
 379  || defined(__AVR_ATmega32M1__) \
 380 @@ -2241,7 +2471,8 @@ void timer_clock_prescale_set(timer_cloc
 381  #define timer_clock_prescale_get()  (timer_clock_div_t)(CLKPR & (uint8_t)((1<<CLTPS0)|(1<<CLTPS1)|(1<<CLTPS2)))
 382
 383  #elif defined(__AVR_ATA6285__) \
 384 -|| defined(__AVR_ATA6286__)
 385 +|| defined(__AVR_ATA6286__) \
 386 +|| defined(__AVR_ATA5831__)
 387
 388  typedef enum
 389  {
 390 @@ -2272,7 +2503,12 @@ void system_clock_prescale_set(clock_div
 391          "out __SREG__,__tmp_reg__" "\n\t"
 392          : /* no outputs */
 393          : [temp] "r" (__t),
 394 +#if defined(__AVR_ATA6286__) \
 395 +|| defined(__AVR_ATA6285__)
 396            [clpr] "I" (_SFR_IO_ADDR(CLKPR)),
 397 +#elif defined(__AVR_ATA5831__)
 398 +         [clpr] "I" (_SFR_IO_ADDR(CLPR)),
 399 +#endif
 400            [enable] "r" _BV(CLPCE),
 401            [not_CLKPS] "M" (0xFF & (~ ((1 << CLKPS2) | (1 << CLKPS1) | (1 << CLKPS0)))),
 402            [set_value] "r" (__x & 7)
 403 @@ -2310,7 +2546,12 @@ void timer_clock_prescale_set(timer_cloc
 404          "out __SREG__,__tmp_reg__" "\n\t"
 405          : /* no outputs */
 406          : [temp] "r" (__t),
 407 +#if defined(__AVR_ATA6286__) \
 408 +|| defined(__AVR_ATA6285__)
 409            [clpr] "I" (_SFR_IO_ADDR(CLKPR)),
 410 +#elif defined(__AVR_ATA5831__)
 411 +         [clpr] "I" (_SFR_IO_ADDR(CLPR)),
 412 +#endif
 413            [enable] "r" (_BV(CLPCE)),
 414            [not_CLTPS] "M" (0xFF & (~ ((1 << CLTPS2) | (1 << CLTPS1) | (1 << CLTPS0)))),
 415            [set_value] "r" ((__x & 7) << 3)
 416 diff -Naurp include/avr/sleep.h include/avr/sleep.h
 417 --- include/avr/sleep.h 2013-03-15 12:01:34.000000000 +0530
 418 +++ include/avr/sleep.h 2013-03-15 12:01:52.000000000 +0530
 419 @@ -569,7 +569,8 @@
 420
 421  #elif defined (__AVR_ATA5790__) \
 422  || defined (__AVR_ATA5790N__) \
 423 -|| defined (__AVR_ATA5795__)
 424 +|| defined (__AVR_ATA5795__) \
 425 +|| defined (__AVR_ATA5831__)
 426
 427      #define SLEEP_MODE_IDLE           (0)
 428      #define SLEEP_MODE_EXT_PWR_SAVE   (_BV(SM0))
 429 diff -Naurp include/avr/wdt.h include/avr/wdt.h
 430 --- include/avr/wdt.h   2013-03-15 12:01:34.000000000 +0530
 431 +++ include/avr/wdt.h   2013-03-15 12:01:52.000000000 +0530
 432 @@ -324,7 +324,8 @@ __asm__ __volatile__ ( \
 433  || defined(__AVR_ATA5505__) \
 434  || defined(__AVR_ATA5790__) \
 435  || defined(__AVR_ATA5790N__) \
 436 -|| defined(__AVR_ATA5795__)
 437 +|| defined(__AVR_ATA5795__) \
 438 +|| defined(__AVR_ATA5831__)
 439
 440  /* Use STS instruction. */
 441