]> git.pld-linux.org Git - packages/crossavr-gcc.git/blame - 412-gcc-atmega164pa_168pa_32a_64a.patch
- rebuild with ppl 1.0
[packages/crossavr-gcc.git] / 412-gcc-atmega164pa_168pa_32a_64a.patch
CommitLineData
6ef8d480
PZ
1diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
2--- gcc/config/avr/avr-devices.c 2011-10-28 12:06:09.000000000 +0530
3+++ gcc/config/avr/avr-devices.c 2011-10-28 12:15:49.000000000 +0530
08a89ff7 4@@ -147,6 +147,7 @@ const struct mcu_type_s avr_mcu_types[]
dbe7ab63 5 { "atmega163", ARCH_AVR5, "__AVR_ATmega163__", 0, 0x0060, "m163" },
6ef8d480 6 { "atmega164a", ARCH_AVR5, "__AVR_ATmega164A__", 0, 0x0100, "m164a" },
dbe7ab63 7 { "atmega164p", ARCH_AVR5, "__AVR_ATmega164P__", 0, 0x0100, "m164p" },
8+ { "atmega164pa", ARCH_AVR5, "__AVR_ATmega164PA__", 0, 0x0100, "m164pa" },
9 { "atmega165", ARCH_AVR5, "__AVR_ATmega165__", 0, 0x0100, "m165" },
10 { "atmega165a", ARCH_AVR5, "__AVR_ATmega165A__", 0, 0x0100, "m165a" },
11 { "atmega165p", ARCH_AVR5, "__AVR_ATmega165P__", 0, 0x0100, "m165p" },
08a89ff7 12@@ -154,6 +155,7 @@ const struct mcu_type_s avr_mcu_types[]
dbe7ab63 13 { "atmega168", ARCH_AVR5, "__AVR_ATmega168__", 0, 0x0100, "m168" },
14 { "atmega168a", ARCH_AVR5, "__AVR_ATmega168A__", 0, 0x0100, "m168a" },
15 { "atmega168p", ARCH_AVR5, "__AVR_ATmega168P__", 0, 0x0100, "m168p" },
16+ { "atmega168pa", ARCH_AVR5, "__AVR_ATmega168PA__", 0, 0x0100, "m168pa" },
17 { "atmega169", ARCH_AVR5, "__AVR_ATmega169__", 0, 0x0100, "m169" },
18 { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
19 { "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
08a89ff7 20@@ -164,6 +166,7 @@ const struct mcu_type_s avr_mcu_types[]
dbe7ab63 21 { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
22 { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
23 { "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
24+ { "atmega32a", ARCH_AVR5, "__AVR_ATmega32A__", 0, 0x0060, "m32a" },
25 { "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
6ef8d480 26 { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0100, "m324a" },
dbe7ab63 27 { "atmega324p", ARCH_AVR5, "__AVR_ATmega324P__", 0, 0x0100, "m324p" },
08a89ff7 28@@ -192,6 +195,7 @@ const struct mcu_type_s avr_mcu_types[]
dbe7ab63 29 { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0x0100, "m32u6" },
30 { "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
31 { "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
32+ { "atmega64a", ARCH_AVR5, "__AVR_ATmega64A__", 0, 0x0100, "m64a" },
33 { "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
34 { "atmega644", ARCH_AVR5, "__AVR_ATmega644__", 0, 0x0100, "m644" },
35 { "atmega644a", ARCH_AVR5, "__AVR_ATmega644A__", 0, 0x0100, "m644a" },
6ef8d480
PZ
36diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
37--- gcc/config/avr/t-avr 2011-10-28 12:04:00.000000000 +0530
38+++ gcc/config/avr/t-avr 2011-10-28 12:15:49.000000000 +0530
08a89ff7 39@@ -178,6 +178,7 @@ MULTILIB_MATCHES = \
dbe7ab63 40 mmcu?avr5=mmcu?atmega163 \
41 mmcu?avr5=mmcu?atmega164a \
42 mmcu?avr5=mmcu?atmega164p \
43+ mmcu?avr5=mmcu?atmega164pa \
44 mmcu?avr5=mmcu?atmega165 \
45 mmcu?avr5=mmcu?atmega165a \
46 mmcu?avr5=mmcu?atmega165p \
08a89ff7 47@@ -185,11 +186,13 @@ MULTILIB_MATCHES = \
dbe7ab63 48 mmcu?avr5=mmcu?atmega168 \
49 mmcu?avr5=mmcu?atmega168a \
50 mmcu?avr5=mmcu?atmega168p \
51+ mmcu?avr5=mmcu?atmega168pa \
52 mmcu?avr5=mmcu?atmega169 \
53 mmcu?avr5=mmcu?atmega169a \
54 mmcu?avr5=mmcu?atmega169p \
55 mmcu?avr5=mmcu?atmega169pa \
56 mmcu?avr5=mmcu?atmega32 \
57+ mmcu?avr5=mmcu?atmega32a \
58 mmcu?avr5=mmcu?atmega323 \
59 mmcu?avr5=mmcu?atmega324a \
60 mmcu?avr5=mmcu?atmega324p \
08a89ff7 61@@ -216,6 +219,7 @@ MULTILIB_MATCHES = \
dbe7ab63 62 mmcu?avr5=mmcu?atmega64rfa2 \
63 mmcu?avr5=mmcu?atmega64rfr2 \
64 mmcu?avr5=mmcu?atmega64 \
65+ mmcu?avr5=mmcu?atmega64a \
66 mmcu?avr5=mmcu?atmega640 \
67 mmcu?avr5=mmcu?atmega644 \
68 mmcu?avr5=mmcu?atmega644a \
This page took 0.048038 seconds and 4 git commands to generate.