]> git.pld-linux.org Git - packages/crossavr-gcc.git/blame - 400-gcc-new-devices.patch
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[packages/crossavr-gcc.git] / 400-gcc-new-devices.patch
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1diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
2--- gcc/config/avr/avr-devices.c 2011-06-24 10:30:09.000000000 +0530
3+++ gcc/config/avr/avr-devices.c 2011-06-24 10:29:33.000000000 +0530
4@@ -134,6 +134,8 @@ const struct mcu_type_s avr_mcu_types[]
5 { "at90pwm81", ARCH_AVR4, "__AVR_AT90PWM81__", 0, 0x0100, "90pwm81" },
6 /* Enhanced, > 8K, <= 64K. */
7 { "avr5", ARCH_AVR5, NULL, 0, 0x0060, "m16" },
8+ { "at90pwm161", ARCH_AVR5, "__AVR_AT90PWM161__", 1, 0x0100, "90pwm161" },
9+
10 { "atmega16", ARCH_AVR5, "__AVR_ATmega16__", 0, 0x0060, "m16" },
11 { "atmega16a", ARCH_AVR5, "__AVR_ATmega16A__", 0, 0x0060, "m16a" },
12 { "atmega161", ARCH_AVR5, "__AVR_ATmega161__", 0, 0x0060, "m161" },
13@@ -151,6 +153,11 @@ const struct mcu_type_s avr_mcu_types[]
14 { "atmega169a", ARCH_AVR5, "__AVR_ATmega169A__", 0, 0x0100, "m169a" },
15 { "atmega169p", ARCH_AVR5, "__AVR_ATmega169P__", 0, 0x0100, "m169p" },
16 { "atmega169pa", ARCH_AVR5, "__AVR_ATmega169PA__", 0, 0x0100, "m169pa" },
17+ { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
18+ { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
19+ { "atmega16hvbrevb", ARCH_AVR5, "__AVR_ATmega16HVBREVB__", 1, 0x0100, "m16hvbrevb" },
20+ { "atmega16m1", ARCH_AVR5, "__AVR_ATmega16M1__", 0, 0x0100, "m16m1" },
21+ { "atmega16u4", ARCH_AVR5, "__AVR_ATmega16U4__", 0, 0x0100, "m16u4" },
22 { "atmega32", ARCH_AVR5, "__AVR_ATmega32__", 0, 0x0060, "m32" },
23 { "atmega323", ARCH_AVR5, "__AVR_ATmega323__", 0, 0x0060, "m323" },
24 { "atmega324a", ARCH_AVR5, "__AVR_ATmega324A__", 0, 0x0100, "m324a" },
25@@ -171,6 +178,10 @@ const struct mcu_type_s avr_mcu_types[]
26 { "atmega3290", ARCH_AVR5, "__AVR_ATmega3290__", 0, 0x0100, "m3290" },
27 { "atmega3290a", ARCH_AVR5, "__AVR_ATmega3290A__", 0, 0x0100, "m3290a" },
28 { "atmega3290p", ARCH_AVR5, "__AVR_ATmega3290P__", 0, 0x0100, "m3290p" },
29+ { "atmega32c1", ARCH_AVR5, "__AVR_ATmega32C1__", 0, 0x0100, "m32c1" },
30+ { "atmega32m1", ARCH_AVR5, "__AVR_ATmega32M1__", 0, 0x0100, "m32m1" },
31+ { "atmega32u4", ARCH_AVR5, "__AVR_ATmega32U4__", 0, 0x0100, "m32u4" },
32+ { "atmega32u6", ARCH_AVR5, "__AVR_ATmega32U6__", 0, 0x0100, "m32u6" },
33 { "atmega406", ARCH_AVR5, "__AVR_ATmega406__", 0, 0x0100, "m406" },
34 { "atmega64", ARCH_AVR5, "__AVR_ATmega64__", 0, 0x0100, "m64" },
35 { "atmega640", ARCH_AVR5, "__AVR_ATmega640__", 0, 0x0200, "m640" },
36@@ -188,11 +199,14 @@ const struct mcu_type_s avr_mcu_types[]
37 { "atmega649a", ARCH_AVR5, "__AVR_ATmega649A__", 0, 0x0100, "m649a" },
38 { "atmega649p", ARCH_AVR5, "__AVR_ATmega649P__", 0, 0x0100, "m649p" },
39 { "atmega6490", ARCH_AVR5, "__AVR_ATmega6490__", 0, 0x0100, "m6490" },
40- { "atmega16hva", ARCH_AVR5, "__AVR_ATmega16HVA__", 0, 0x0100, "m16hva" },
41- { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
42- { "atmega16hvb", ARCH_AVR5, "__AVR_ATmega16HVB__", 0, 0x0100, "m16hvb" },
43- { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
44+ { "atmega6490a", ARCH_AVR5, "__AVR_ATmega6490A__", 0, 0x0100, "m6490a" },
45+ { "atmega6490p", ARCH_AVR5, "__AVR_ATmega6490P__", 0, 0x0100, "m6490p" },
46+ { "atmega64c1", ARCH_AVR5, "__AVR_ATmega64C1__", 0, 0x0100, "m64c1" },
47+ { "atmega64m1", ARCH_AVR5, "__AVR_ATmega64M1__", 0, 0x0100, "m64m1" },
48 { "atmega64hve", ARCH_AVR5, "__AVR_ATmega64HVE__", 0, 0x0100, "m64hve" },
49+ { "atmega32hvb", ARCH_AVR5, "__AVR_ATmega32HVB__", 0, 0x0100, "m32hvb" },
50+ { "atmega32hvbrevb", ARCH_AVR5, "__AVR_ATmega32HVBREVB__", 1, 0x0100, "m32hvbrevb" },
51+ { "atmega16hva2", ARCH_AVR5, "__AVR_ATmega16HVA2__", 0, 0x0100, "m16hva2" },
52 { "at90can32", ARCH_AVR5, "__AVR_AT90CAN32__", 0, 0x0100, "can32" },
53 { "at90can64", ARCH_AVR5, "__AVR_AT90CAN64__", 0, 0x0100, "can64" },
54 { "at90pwm216", ARCH_AVR5, "__AVR_AT90PWM216__", 0, 0x0100, "90pwm216" },
55@@ -246,11 +260,13 @@ const struct mcu_type_s avr_mcu_types[]
56 /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */
57 { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" },
58 { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" },
59+ { "atxmega128b1", ARCH_AVRXMEGA6, "__AVR_ATxmega128B1__", 0, 0x2000, "x128b1" },
60 { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" },
61 { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" },
62 { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" },
63 { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" },
64 { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" },
65+ { "atxmega256a3bu", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3BU__", 0, 0x2000, "x256a3bu" },
66 { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" },
67 /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */
68 { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" },
69diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
70--- gcc/config/avr/t-avr 2011-06-24 10:30:09.000000000 +0530
71+++ gcc/config/avr/t-avr 2011-06-24 10:29:06.000000000 +0530
72@@ -129,6 +129,7 @@ MULTILIB_MATCHES = \
73 mmcu?avr25=mmcu?attiny85 \
74 mmcu?avr25=mmcu?attiny261 \
75 mmcu?avr25=mmcu?attiny261a \
76+ mmcu?avr25=mmcu?attiny4313 \
77 mmcu?avr25=mmcu?attiny461 \
78 mmcu?avr25=mmcu?attiny461a \
79 mmcu?avr25=mmcu?attiny861 \
80@@ -148,6 +149,7 @@ MULTILIB_MATCHES = \
81 mmcu?avr35=mmcu?atmega16u2 \
82 mmcu?avr35=mmcu?atmega32u2 \
83 mmcu?avr35=mmcu?attiny167 \
84+ mmcu?avr35=mmcu?attiny327 \
85 mmcu?avr4=mmcu?atmega48 \
86 mmcu?avr4=mmcu?atmega48a \
87 mmcu?avr4=mmcu?atmega48p \
88@@ -165,6 +167,7 @@ MULTILIB_MATCHES = \
89 mmcu?avr4=mmcu?at90pwm3 \
90 mmcu?avr4=mmcu?at90pwm3b \
91 mmcu?avr4=mmcu?at90pwm81 \
92+ mmcu?avr5=mmcu?at90pwm161 \
93 mmcu?avr5=mmcu?atmega16 \
94 mmcu?avr5=mmcu?atmega16a \
95 mmcu?avr5=mmcu?atmega161 \
96@@ -224,7 +227,9 @@ MULTILIB_MATCHES = \
97 mmcu?avr5=mmcu?atmega16hva \
98 mmcu?avr5=mmcu?atmega16hva2 \
99 mmcu?avr5=mmcu?atmega16hvb \
100+ mmcu?avr5=mmcu?atmega16hvbrevb \
101 mmcu?avr5=mmcu?atmega32hvb \
102+ mmcu?avr5=mmcu?atmega32hvbrevb \
103 mmcu?avr5=mmcu?atmega64hve \
104 mmcu?avr5=mmcu?at90can32 \
105 mmcu?avr5=mmcu?at90can64 \
106@@ -238,6 +243,7 @@ MULTILIB_MATCHES = \
107 mmcu?avr5=mmcu?atmega16u4 \
108 mmcu?avr5=mmcu?atmega32u4 \
109 mmcu?avr5=mmcu?atmega32u6 \
110+ mmcu?avr5=mmcu?atmega64hve \
111 mmcu?avr5=mmcu?at90scr100 \
112 mmcu?avr5=mmcu?at90usb646 \
113 mmcu?avr5=mmcu?at90usb647 \
114@@ -263,11 +269,13 @@ MULTILIB_MATCHES = \
115 mmcu?avrxmega5=mmcu?atxmega64a1 \
116 mmcu?avrxmega5=mmcu?atxmega64a1u \
117 mmcu?avrxmega6=mmcu?atxmega128a3 \
118+ mmcu?avrxmega6=mmcu?atxmega128b1 \
119 mmcu?avrxmega6=mmcu?atxmega128d3 \
120 mmcu?avrxmega6=mmcu?atxmega192a3 \
121 mmcu?avrxmega6=mmcu?atxmega192d3 \
122 mmcu?avrxmega6=mmcu?atxmega256a3 \
123 mmcu?avrxmega6=mmcu?atxmega256a3b \
124+ mmcu?avrxmega6=mmcu?atxmega256a3bu \
125 mmcu?avrxmega6=mmcu?atxmega256d3 \
126 mmcu?avrxmega7=mmcu?atxmega128a1 \
127 mmcu?avrxmega7=mmcu?atxmega128a1u \
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