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Commit | Line | Data |
---|---|---|
dbe7ab63 | 1 | diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c |
6ef8d480 PZ |
2 | --- gcc/config/avr/avr.c 2011-10-27 16:55:55.000000000 +0530 |
3 | +++ gcc/config/avr/avr.c 2011-10-27 17:00:24.000000000 +0530 | |
4 | @@ -52,6 +52,7 @@ static void avr_option_override (void); | |
dbe7ab63 | 5 | static int avr_naked_function_p (tree); |
6 | static int interrupt_function_p (tree); | |
7 | static int signal_function_p (tree); | |
8 | +static int nmi_function_p (tree); | |
9 | static int avr_OS_task_function_p (tree); | |
10 | static int avr_OS_main_function_p (tree); | |
11 | static int avr_regs_to_save (HARD_REG_SET *); | |
6ef8d480 | 12 | @@ -131,6 +132,7 @@ static const struct attribute_spec avr_a |
dbe7ab63 | 13 | { "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute }, |
14 | { "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute }, | |
15 | { "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute }, | |
16 | + { "nmi", 0, 0, true, false, false, avr_handle_fndecl_attribute }, | |
17 | { "naked", 0, 0, false, true, true, avr_handle_fntype_attribute }, | |
18 | { "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute }, | |
19 | { "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute }, | |
6ef8d480 | 20 | @@ -391,6 +393,21 @@ signal_function_p (tree func) |
dbe7ab63 | 21 | return a != NULL_TREE; |
22 | } | |
23 | ||
24 | +/* Return nonzero if FUNC is a nmi function as specified | |
25 | + by the "nmi" attribute. */ | |
26 | + | |
27 | +static int | |
28 | +nmi_function_p (tree func) | |
29 | +{ | |
30 | + tree a; | |
31 | + | |
32 | + if (TREE_CODE (func) != FUNCTION_DECL) | |
33 | + return 0; | |
34 | + | |
35 | + a = lookup_attribute ("nmi", DECL_ATTRIBUTES (func)); | |
36 | + return a != NULL_TREE; | |
37 | +} | |
38 | + | |
39 | /* Return nonzero if FUNC is a OS_task function. */ | |
40 | ||
41 | static int | |
6ef8d480 | 42 | @@ -655,6 +672,7 @@ expand_prologue (void) |
dbe7ab63 | 43 | cfun->machine->is_naked = avr_naked_function_p (current_function_decl); |
44 | cfun->machine->is_interrupt = interrupt_function_p (current_function_decl); | |
45 | cfun->machine->is_signal = signal_function_p (current_function_decl); | |
46 | + cfun->machine->is_nmi = nmi_function_p (current_function_decl); | |
47 | cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl); | |
48 | cfun->machine->is_OS_main = avr_OS_main_function_p (current_function_decl); | |
49 | cfun->machine->stack_usage = 0; | |
6ef8d480 | 50 | @@ -688,9 +706,40 @@ expand_prologue (void) |
dbe7ab63 | 51 | |
52 | /* Push SREG. */ | |
6ef8d480 PZ |
53 | /* ??? There's no dwarf2 column reserved for SREG. */ |
54 | - emit_move_insn (tmp_reg_rtx, gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR))); | |
55 | + emit_move_insn (tmp_reg_rtx, gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR))); | |
56 | emit_push_byte (TMP_REGNO, false); | |
dbe7ab63 | 57 | |
58 | + /* Push RAMPD, RAMPX, RAMPY. */ | |
6ef8d480 PZ |
59 | + /* |
60 | + Clear RAMP? registers if used for data access in the interrupt/signal | |
61 | + context. Do this after the zero register has been explictly cleared. | |
62 | + */ | |
63 | + if (AVR_HAVE_RAMPX_Y_D) | |
64 | + { | |
65 | + /* Push RAMPD. */ | |
66 | + emit_move_insn (tmp_reg_rtx, | |
67 | + gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR))); | |
68 | + emit_push_byte (TMP_REGNO, false); | |
dbe7ab63 | 69 | + |
70 | + /* Push RAMPX. */ | |
71 | + if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1)) | |
72 | + { | |
6ef8d480 PZ |
73 | + emit_move_insn (tmp_reg_rtx, |
74 | + gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR))); | |
75 | + emit_push_byte (TMP_REGNO, false); | |
dbe7ab63 | 76 | + } |
77 | + | |
78 | + /* Push RAMPY. */ | |
79 | + if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1)) | |
80 | + { | |
6ef8d480 PZ |
81 | + emit_move_insn (tmp_reg_rtx, |
82 | + gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR))); | |
83 | + emit_push_byte (TMP_REGNO, false); | |
dbe7ab63 | 84 | + } |
6ef8d480 PZ |
85 | + |
86 | + } | |
87 | + | |
dbe7ab63 | 88 | + |
89 | /* Push RAMPZ. */ | |
6ef8d480 PZ |
90 | /* ??? There's no dwarf2 column reserved for RAMPZ. */ |
91 | if (AVR_HAVE_RAMPZ | |
92 | @@ -698,7 +747,7 @@ expand_prologue (void) | |
93 | && TEST_HARD_REG_BIT (set, REG_Z + 1)) | |
dbe7ab63 | 94 | { |
6ef8d480 PZ |
95 | emit_move_insn (tmp_reg_rtx, |
96 | - gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR))); | |
97 | + gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR))); | |
98 | emit_push_byte (TMP_REGNO, false); | |
99 | } | |
100 | ||
101 | @@ -707,6 +756,8 @@ expand_prologue (void) | |
dbe7ab63 | 102 | |
103 | /* Prevent any attempt to delete the setting of ZERO_REG! */ | |
104 | emit_use (zero_reg_rtx); | |
105 | + | |
dbe7ab63 | 106 | + |
107 | } | |
108 | if (minimize && (frame_pointer_needed | |
109 | || (AVR_2_BYTE_PC && live_seq > 6) | |
6ef8d480 PZ |
110 | @@ -829,14 +880,14 @@ expand_prologue (void) |
111 | { | |
112 | emit_move_insn (stack_pointer_rtx, frame_pointer_rtx); | |
dbe7ab63 | 113 | } |
114 | - else if (TARGET_NO_INTERRUPTS | |
6ef8d480 PZ |
115 | + else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS ) |
116 | || cfun->machine->is_signal | |
117 | || cfun->machine->is_OS_main) | |
dbe7ab63 | 118 | { |
6ef8d480 PZ |
119 | emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx, |
120 | frame_pointer_rtx)); | |
dbe7ab63 | 121 | } |
122 | - else if (cfun->machine->is_interrupt) | |
123 | + else if (!AVR_XMEGA && cfun->machine->is_interrupt) | |
124 | { | |
6ef8d480 PZ |
125 | emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx, |
126 | frame_pointer_rtx)); | |
127 | @@ -1018,13 +1069,13 @@ expand_epilogue (void) | |
dbe7ab63 | 128 | { |
129 | emit_move_insn (stack_pointer_rtx, frame_pointer_rtx); | |
130 | } | |
131 | - else if (TARGET_NO_INTERRUPTS | |
132 | - || cfun->machine->is_signal) | |
133 | + else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS) | |
134 | + || (!AVR_XMEGA && cfun->machine->is_signal)) | |
135 | { | |
136 | emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx, | |
137 | frame_pointer_rtx)); | |
138 | } | |
139 | - else if (cfun->machine->is_interrupt) | |
140 | + else if (!AVR_XMEGA && cfun->machine->is_interrupt) | |
141 | { | |
142 | emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx, | |
143 | frame_pointer_rtx)); | |
6ef8d480 PZ |
144 | @@ -1082,14 +1133,38 @@ expand_epilogue (void) |
145 | && TEST_HARD_REG_BIT (set, REG_Z + 1)) | |
dbe7ab63 | 146 | { |
6ef8d480 PZ |
147 | emit_pop_byte (TMP_REGNO); |
148 | - emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)), | |
149 | + emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)), | |
dbe7ab63 | 150 | tmp_reg_rtx); |
151 | } | |
6ef8d480 PZ |
152 | + /* Restore RAMPY, RAMPX, RAMPD using tmp reg as scratch. */ |
153 | + if (AVR_HAVE_RAMPX_Y_D) | |
154 | + { | |
155 | + /* Pop RAMPY. */ | |
156 | + if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1)) | |
157 | + { | |
158 | + emit_insn (gen_popqi (tmp_reg_rtx)); | |
159 | + emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)), | |
160 | + tmp_reg_rtx); | |
161 | + } | |
162 | + | |
163 | + /* Pop RAMPX. */ | |
164 | + if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1)) | |
165 | + { | |
166 | + emit_insn (gen_popqi (tmp_reg_rtx)); | |
167 | + emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)), | |
168 | + tmp_reg_rtx); | |
169 | + } | |
170 | + /* Pop RAMPD. */ | |
171 | + emit_insn (gen_popqi (tmp_reg_rtx)); | |
172 | + emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)), | |
173 | + tmp_reg_rtx); | |
174 | + | |
175 | + } | |
dbe7ab63 | 176 | |
177 | /* Restore SREG using tmp reg as scratch. */ | |
6ef8d480 | 178 | emit_pop_byte (TMP_REGNO); |
dbe7ab63 | 179 | |
6ef8d480 PZ |
180 | - emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)), |
181 | + emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)), | |
dbe7ab63 | 182 | tmp_reg_rtx); |
183 | ||
184 | /* Restore tmp REG. */ | |
6ef8d480 | 185 | @@ -1880,9 +1955,17 @@ output_movhi (rtx insn, rtx operands[], |
dbe7ab63 | 186 | return *l = 1, AS2 (out,__SP_L__,%A1); |
187 | /* Use simple load of stack pointer if no interrupts are | |
188 | used. */ | |
189 | - else if (TARGET_NO_INTERRUPTS) | |
190 | + else if (!AVR_XMEGA && TARGET_NO_INTERRUPTS) | |
191 | return *l = 2, (AS2 (out,__SP_H__,%B1) CR_TAB | |
192 | AS2 (out,__SP_L__,%A1)); | |
193 | + if(AVR_XMEGA) | |
194 | + { | |
195 | + *l = 2; | |
196 | + return (AS2 (out,__SP_L__,%A1) CR_TAB | |
197 | + AS2 (out,__SP_H__,%B1)); | |
198 | + } | |
199 | + else | |
200 | + { | |
201 | *l = 5; | |
202 | return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB | |
203 | "cli" CR_TAB | |
6ef8d480 | 204 | @@ -1890,6 +1973,7 @@ output_movhi (rtx insn, rtx operands[], |
dbe7ab63 | 205 | AS2 (out,__SREG__,__tmp_reg__) CR_TAB |
206 | AS2 (out,__SP_L__,%A1)); | |
207 | } | |
208 | + } | |
209 | else if (test_hard_reg_class (STACK_REG, src)) | |
210 | { | |
211 | *l = 2; | |
6ef8d480 | 212 | @@ -2023,7 +2107,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int |
dbe7ab63 | 213 | |
214 | if (CONSTANT_ADDRESS_P (x)) | |
215 | { | |
216 | - if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR) | |
217 | + if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR) | |
218 | { | |
219 | *l = 1; | |
220 | return AS2 (in,%0,__SREG__); | |
6ef8d480 | 221 | @@ -2031,7 +2115,8 @@ out_movqi_r_mr (rtx insn, rtx op[], int |
dbe7ab63 | 222 | if (optimize > 0 && io_address_operand (x, QImode)) |
223 | { | |
224 | *l = 1; | |
225 | - return AS2 (in,%0,%m1-0x20); | |
226 | + op[2] = GEN_INT(AVR_IO_OFFSET); | |
227 | + return AS2 (in,%0,%m1-%2); | |
228 | } | |
229 | *l = 2; | |
230 | return AS2 (lds,%0,%m1); | |
6ef8d480 | 231 | @@ -2219,8 +2304,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int |
dbe7ab63 | 232 | if (optimize > 0 && io_address_operand (base, HImode)) |
233 | { | |
234 | *l = 2; | |
235 | - return (AS2 (in,%A0,%m1-0x20) CR_TAB | |
236 | - AS2 (in,%B0,%m1+1-0x20)); | |
237 | + op[2] = GEN_INT(AVR_IO_OFFSET); | |
238 | + return (AS2 (in,%A0,%m1-%2) CR_TAB | |
239 | + AS2 (in,%B0,%m1+1-%2)); | |
240 | } | |
241 | *l = 4; | |
242 | return (AS2 (lds,%A0,%m1) CR_TAB | |
6ef8d480 | 243 | @@ -2719,7 +2805,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 244 | |
245 | if (CONSTANT_ADDRESS_P (x)) | |
246 | { | |
247 | - if (CONST_INT_P (x) && INTVAL (x) == SREG_ADDR) | |
248 | + if (CONST_INT_P (x) && INTVAL (x) == AVR_SREG_ADDR) | |
249 | { | |
250 | *l = 1; | |
251 | return AS2 (out,__SREG__,%1); | |
6ef8d480 | 252 | @@ -2727,7 +2813,8 @@ out_movqi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 253 | if (optimize > 0 && io_address_operand (x, QImode)) |
254 | { | |
255 | *l = 1; | |
256 | - return AS2 (out,%m0-0x20,%1); | |
257 | + op[2] = GEN_INT(AVR_IO_OFFSET); | |
258 | + return AS2 (out,%m0-%2,%1); | |
259 | } | |
260 | *l = 2; | |
261 | return AS2 (sts,%m0,%1); | |
6ef8d480 | 262 | @@ -2806,9 +2893,18 @@ out_movhi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 263 | if (optimize > 0 && io_address_operand (base, HImode)) |
264 | { | |
265 | *l = 2; | |
266 | - return (AS2 (out,%m0+1-0x20,%B1) CR_TAB | |
267 | - AS2 (out,%m0-0x20,%A1)); | |
268 | + op[2] = GEN_INT(AVR_IO_OFFSET); | |
269 | + if (AVR_XMEGA) | |
270 | + return (AS2 (out,%A0-%2,%A1) CR_TAB | |
271 | + AS2 (out,%B0-%2,%B1)); | |
272 | + else | |
273 | + return (AS2 (out,%m0+1-%2,%B1) CR_TAB | |
274 | + AS2 (out,%m0-%2,%A1)); | |
275 | } | |
276 | + if (AVR_XMEGA) | |
277 | + return *l = 4, (AS2 (sts,%A0,%A1) CR_TAB | |
278 | + AS2 (sts,%B0,%B1)); | |
279 | + else | |
280 | return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB | |
281 | AS2 (sts,%m0,%A1)); | |
282 | } | |
6ef8d480 | 283 | @@ -2825,11 +2921,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 284 | AS2 (adiw,r26,1) CR_TAB |
285 | AS2 (st,X,__tmp_reg__)); | |
286 | else | |
287 | + { | |
288 | + if (!AVR_XMEGA) | |
289 | return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB | |
290 | AS2 (adiw,r26,1) CR_TAB | |
291 | AS2 (st,X,__tmp_reg__) CR_TAB | |
292 | AS2 (sbiw,r26,1) CR_TAB | |
293 | AS2 (st,X,r26)); | |
294 | + else | |
295 | + return *l=5, (AS2 (mov,__tmp_reg__,r27) CR_TAB | |
296 | + AS2 (st,X,r26) CR_TAB | |
297 | + AS2 (adiw,r26,1) CR_TAB | |
298 | + AS2 (st,X,__tmp_reg__) CR_TAB | |
299 | + AS2 (sbiw,r26,1)); | |
300 | + } | |
301 | } | |
302 | else | |
303 | { | |
6ef8d480 | 304 | @@ -2837,14 +2942,27 @@ out_movhi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 305 | return *l=2, (AS2 (st,X+,%A1) CR_TAB |
306 | AS2 (st,X,%B1)); | |
307 | else | |
308 | + { | |
309 | + if (!AVR_XMEGA) | |
310 | return *l=3, (AS2 (adiw,r26,1) CR_TAB | |
311 | AS2 (st,X,%B1) CR_TAB | |
312 | AS2 (st,-X,%A1)); | |
313 | + else | |
314 | + return *l=3, (AS2 (st,X+,%A1) CR_TAB | |
315 | + AS2 (st,X,%B1) CR_TAB | |
316 | + AS2 (sbiw,r26,1)); | |
317 | + } | |
318 | } | |
319 | } | |
320 | else | |
321 | + { | |
322 | + if (!AVR_XMEGA) | |
323 | return *l=2, (AS2 (std,%0+1,%B1) CR_TAB | |
324 | AS2 (st,%0,%A1)); | |
325 | + else | |
326 | + return *l=2, (AS2 (st,%0,%A1) CR_TAB | |
327 | + AS2 (std,%0+1,%B1)); | |
328 | + } | |
329 | } | |
330 | else if (GET_CODE (base) == PLUS) | |
331 | { | |
6ef8d480 | 332 | @@ -2855,6 +2973,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 333 | if (reg_base != REG_Y) |
334 | fatal_insn ("incorrect insn:",insn); | |
335 | ||
336 | + if (!AVR_XMEGA) | |
337 | + { | |
338 | if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest))) | |
339 | return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB | |
340 | AS2 (std,Y+63,%B1) CR_TAB | |
6ef8d480 | 341 | @@ -2868,11 +2988,29 @@ out_movhi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 342 | AS2 (subi,r28,lo8(%o0)) CR_TAB |
343 | AS2 (sbci,r29,hi8(%o0))); | |
344 | } | |
345 | + else | |
346 | + { | |
347 | + if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest))) | |
348 | + return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB | |
349 | + AS2 (std,Y+62,%A1) CR_TAB | |
350 | + AS2 (std,Y+63,%B1) CR_TAB | |
351 | + AS2 (sbiw,r28,%o0-62)); | |
352 | + | |
353 | + return *l = 6, (AS2 (subi,r28,lo8(-%o0)) CR_TAB | |
354 | + AS2 (sbci,r29,hi8(-%o0)) CR_TAB | |
355 | + AS2 (st,Y,%A1) CR_TAB | |
356 | + AS2 (std,Y+1,%B1) CR_TAB | |
357 | + AS2 (subi,r28,lo8(%o0)) CR_TAB | |
358 | + AS2 (sbci,r29,hi8(%o0))); | |
359 | + } | |
360 | + } | |
361 | if (reg_base == REG_X) | |
362 | { | |
363 | /* (X + d) = R */ | |
364 | if (reg_src == REG_X) | |
365 | { | |
366 | + if (!AVR_XMEGA) | |
367 | + { | |
368 | *l = 7; | |
369 | return (AS2 (mov,__tmp_reg__,r26) CR_TAB | |
370 | AS2 (mov,__zero_reg__,r27) CR_TAB | |
6ef8d480 | 371 | @@ -2882,21 +3020,57 @@ out_movhi_mr_r (rtx insn, rtx op[], int |
dbe7ab63 | 372 | AS1 (clr,__zero_reg__) CR_TAB |
373 | AS2 (sbiw,r26,%o0)); | |
374 | } | |
375 | + else | |
376 | + { | |
377 | + *l = 7; | |
378 | + return (AS2 (mov,__tmp_reg__,r26) CR_TAB | |
379 | + AS2 (mov,__zero_reg__,r27) CR_TAB | |
380 | + AS2 (adiw,r26,%o0) CR_TAB | |
381 | + AS2 (st,X+,__tmp_reg__) CR_TAB | |
382 | + AS2 (st,X,__zero_reg__) CR_TAB | |
383 | + AS1 (clr,__zero_reg__) CR_TAB | |
384 | + AS2 (sbiw,r26,%o0+1)); | |
385 | + } | |
386 | + } | |
387 | + if (!AVR_XMEGA) | |
388 | + { | |
389 | *l = 4; | |
390 | return (AS2 (adiw,r26,%o0+1) CR_TAB | |
391 | AS2 (st,X,%B1) CR_TAB | |
392 | AS2 (st,-X,%A1) CR_TAB | |
393 | AS2 (sbiw,r26,%o0)); | |
394 | } | |
395 | + else | |
396 | + { | |
397 | + *l = 4; | |
398 | + return (AS2 (adiw,r26,%o0) CR_TAB | |
399 | + AS2 (st,X+,%A1) CR_TAB | |
400 | + AS2 (st,X,%B1) CR_TAB | |
401 | + AS2 (sbiw,r26,%o0+1)); | |
402 | + } | |
403 | + } | |
404 | + | |
405 | + if (!AVR_XMEGA) | |
406 | return *l=2, (AS2 (std,%B0,%B1) CR_TAB | |
407 | AS2 (std,%A0,%A1)); | |
408 | + else | |
409 | + return *l=2, (AS2 (std,%A0,%A1) CR_TAB | |
410 | + AS2 (std,%B0,%B1)); | |
411 | } | |
412 | else if (GET_CODE (base) == PRE_DEC) /* (--R) */ | |
413 | + { | |
414 | + if (mem_volatile_p && AVR_XMEGA) | |
415 | + return *l = 4, (AS2 (sbiw,%r0,2) CR_TAB | |
416 | + AS2 (st,%p0+,%A1) CR_TAB | |
417 | + AS2 (st,%p0,%B1) CR_TAB | |
418 | + AS2 (sbiw,%r0,1)); | |
419 | + else | |
420 | return *l=2, (AS2 (st,%0,%B1) CR_TAB | |
421 | AS2 (st,%0,%A1)); | |
422 | + } | |
423 | else if (GET_CODE (base) == POST_INC) /* (R++) */ | |
424 | { | |
425 | - if (mem_volatile_p) | |
426 | + if (mem_volatile_p && !AVR_XMEGA) | |
427 | { | |
428 | if (REGNO (XEXP (base, 0)) == REG_X) | |
429 | { | |
6ef8d480 | 430 | @@ -5047,6 +5221,16 @@ avr_asm_declare_function_name (FILE *fil |
dbe7ab63 | 431 | } |
432 | } | |
433 | ||
434 | + else if (cfun->machine->is_nmi) | |
435 | + { | |
436 | + if (strncmp (name, "__vector", strlen ("__vector")) != 0) | |
437 | + { | |
438 | + warning_at (DECL_SOURCE_LOCATION (decl), 0, | |
439 | + "%qs appears to be a misspelled nmi handler", | |
440 | + name); | |
441 | + } | |
442 | + } | |
443 | + | |
444 | ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); | |
445 | ASM_OUTPUT_LABEL (file, name); | |
446 | } | |
6ef8d480 | 447 | @@ -5387,7 +5571,8 @@ avr_file_start (void) |
dbe7ab63 | 448 | /* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/ |
449 | fputs ("__SREG__ = 0x3f\n" | |
450 | "__SP_H__ = 0x3e\n" | |
451 | - "__SP_L__ = 0x3d\n", asm_out_file); | |
452 | + "__SP_L__ = 0x3d\n" | |
453 | + "__CCP__ = 0x34\n", asm_out_file); | |
454 | ||
455 | fputs ("__tmp_reg__ = 0\n" | |
456 | "__zero_reg__ = 1\n", asm_out_file); | |
6ef8d480 | 457 | @@ -6527,16 +6712,17 @@ avr_out_sbxx_branch (rtx insn, rtx opera |
dbe7ab63 | 458 | |
459 | if (GET_CODE (operands[1]) == CONST_INT) | |
460 | { | |
461 | - if (INTVAL (operands[1]) < 0x40) | |
462 | + operands[4] = GEN_INT(AVR_IO_OFFSET); /* operands[3] is for the jump */ | |
463 | + if (low_io_address_operand (operands[1], VOIDmode)) | |
464 | { | |
465 | if (comp == EQ) | |
466 | - output_asm_insn (AS2 (sbis,%m1-0x20,%2), operands); | |
467 | + output_asm_insn (AS2 (sbis,%1-%4,%2), operands); | |
468 | else | |
469 | - output_asm_insn (AS2 (sbic,%m1-0x20,%2), operands); | |
470 | + output_asm_insn (AS2 (sbic,%1-%4,%2), operands); | |
471 | } | |
472 | else | |
473 | { | |
474 | - output_asm_insn (AS2 (in,__tmp_reg__,%m1-0x20), operands); | |
475 | + output_asm_insn (AS2 (in,__tmp_reg__,%1-%4), operands); | |
476 | if (comp == EQ) | |
477 | output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands); | |
478 | else | |
479 | diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c | |
6ef8d480 PZ |
480 | --- gcc/config/avr/avr-c.c 2011-10-27 16:55:06.000000000 +0530 |
481 | +++ gcc/config/avr/avr-c.c 2011-10-27 17:00:24.000000000 +0530 | |
dbe7ab63 | 482 | @@ -81,5 +81,18 @@ avr_cpu_cpp_builtins (struct cpp_reader |
483 | ||
484 | if (TARGET_NO_INTERRUPTS) | |
485 | cpp_define (pfile, "__NO_INTERRUPTS__"); | |
486 | + | |
487 | + if (avr_current_arch->xmega) | |
488 | + { | |
489 | + cpp_define (pfile, "__AVR_XMEGA__"); | |
490 | + cpp_define (pfile, "__AVR_HAVE_SPMX__"); | |
491 | + } | |
492 | + if (avr_current_arch->have_rampx_y_d) | |
493 | + { | |
494 | + cpp_define (pfile, "__AVR_HAVE_RAMPX__"); | |
495 | + cpp_define (pfile, "__AVR_HAVE_RAMPY__"); | |
496 | + cpp_define (pfile, "__AVR_HAVE_RAMPD__"); | |
497 | + } | |
498 | + | |
499 | } | |
500 | ||
501 | diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c | |
6ef8d480 PZ |
502 | --- gcc/config/avr/avr-devices.c 2011-10-27 16:55:06.000000000 +0530 |
503 | +++ gcc/config/avr/avr-devices.c 2011-10-27 17:00:24.000000000 +0530 | |
dbe7ab63 | 504 | @@ -36,7 +36,14 @@ const struct base_arch_s avr_arch_types[ |
505 | { 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" }, | |
506 | { 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" }, | |
507 | { 0, 1, 1, 1, 1, 1, 0, 0, 0, 0x0060, "__AVR_ARCH__=51", "avr51" }, | |
508 | - { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" } | |
509 | + { 0, 1, 1, 1, 1, 1, 1, 0, 0, 0x0060, "__AVR_ARCH__=6", "avr6" }, | |
510 | + { 0, 1, 0, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=101", "avrxmega1" }, | |
511 | + { 0, 1, 1, 1, 0, 0, 0, 1, 0, 0x2000, "__AVR_ARCH__=102", "avrxmega2" }, | |
512 | + { 0, 1, 1, 1, 0, 0, 0, 1, 1, 0x2000, "__AVR_ARCH__=103", "avrxmega3" }, | |
513 | + { 0, 1, 1, 1, 1, 1, 0, 1, 0, 0x2000, "__AVR_ARCH__=104", "avrxmega4" }, | |
514 | + { 0, 1, 1, 1, 1, 1, 0, 1, 1, 0x2000, "__AVR_ARCH__=105", "avrxmega5" }, | |
515 | + { 0, 1, 1, 1, 1, 1, 1, 1, 0, 0x2000, "__AVR_ARCH__=106", "avrxmega6" }, | |
516 | + { 0, 1, 1, 1, 1, 1, 1, 1, 1, 0x2000, "__AVR_ARCH__=107", "avrxmega7" } | |
517 | }; | |
518 | ||
519 | /* List of all known AVR MCU types - if updated, it has to be kept | |
6ef8d480 | 520 | @@ -216,6 +223,38 @@ const struct mcu_type_s avr_mcu_types[] |
dbe7ab63 | 521 | { "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" }, |
6ef8d480 | 522 | { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" }, |
dbe7ab63 | 523 | { "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" }, |
524 | + /* Enhanced, == 256K. */ | |
525 | + /* Xmega, <= 8K FLASH. */ | |
526 | + /* Xmega, > 8K, <= 64K FLASH, <= 64K RAM. */ | |
527 | + { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" }, | |
528 | + { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" }, | |
529 | + { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" }, | |
dbe7ab63 | 530 | + { "atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0x2000, "x32a4" }, |
531 | + { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" }, | |
6ef8d480 | 532 | + { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" }, |
dbe7ab63 | 533 | + /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */ |
534 | + /* { "avrxmega3", ARCH_AVRXMEGA3, NULL }, */ | |
535 | + /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */ | |
536 | + { "avrxmega4", ARCH_AVRXMEGA4, NULL, 0, 0x2000, "x64d3" }, | |
537 | + { "atxmega64a3", ARCH_AVRXMEGA4, "__AVR_ATxmega64A3__", 0, 0x2000, "x64a3" }, | |
538 | + { "atxmega64d3", ARCH_AVRXMEGA4, "__AVR_ATxmega64D3__", 0, 0x2000, "x64d3" }, | |
539 | + /* Xmega, > 64K, <= 128K FLASH, > 64K RAM. */ | |
540 | + { "avrxmega5", ARCH_AVRXMEGA5, NULL, 0, 0x2000, "x64a1" }, | |
541 | + { "atxmega64a1", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1__", 0, 0x2000, "x64a1" }, | |
542 | + { "atxmega64a1u", ARCH_AVRXMEGA5, "__AVR_ATxmega64A1U__", 0, 0x2000, "x64a1u" }, | |
543 | + /* Xmega, > 128K, <= 256K FLASH, <= 64K RAM. */ | |
544 | + { "avrxmega6", ARCH_AVRXMEGA6, NULL, 0, 0x2000, "x128a3" }, | |
545 | + { "atxmega128a3", ARCH_AVRXMEGA6, "__AVR_ATxmega128A3__", 0, 0x2000, "x128a3" }, | |
546 | + { "atxmega128d3", ARCH_AVRXMEGA6, "__AVR_ATxmega128D3__", 0, 0x2000, "x128d3" }, | |
547 | + { "atxmega192a3", ARCH_AVRXMEGA6, "__AVR_ATxmega192A3__", 0, 0x2000, "x192a3" }, | |
548 | + { "atxmega192d3", ARCH_AVRXMEGA6, "__AVR_ATxmega192D3__", 0, 0x2000, "x192d3" }, | |
549 | + { "atxmega256a3", ARCH_AVRXMEGA6, "__AVR_ATxmega256A3__", 0, 0x2000, "x256a3" }, | |
550 | + { "atxmega256a3b",ARCH_AVRXMEGA6, "__AVR_ATxmega256A3B__", 0, 0x2000, "x256a3b" }, | |
551 | + { "atxmega256d3", ARCH_AVRXMEGA6, "__AVR_ATxmega256D3__", 0, 0x2000, "x256d3" }, | |
552 | + /* Xmega, > 128K, <= 256K FLASH, > 64K RAM. */ | |
553 | + { "avrxmega7", ARCH_AVRXMEGA7, NULL, 0, 0x2000, "x128a1" }, | |
554 | + { "atxmega128a1", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1__", 0, 0x2000, "x128a1" }, | |
555 | + { "atxmega128a1u", ARCH_AVRXMEGA7, "__AVR_ATxmega128A1U__", 0, 0x2000, "x128a1u" }, | |
556 | /* Assembler only. */ | |
557 | { "avr1", ARCH_AVR1, NULL, 0, 0x0060, "s1200" }, | |
558 | { "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0x0060, "s1200" }, | |
559 | diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h | |
6ef8d480 PZ |
560 | --- gcc/config/avr/avr.h 2011-10-27 16:55:06.000000000 +0530 |
561 | +++ gcc/config/avr/avr.h 2011-10-27 17:00:24.000000000 +0530 | |
dbe7ab63 | 562 | @@ -45,11 +45,11 @@ struct base_arch_s { |
563 | /* Core have 'EICALL' and 'EIJMP' instructions. */ | |
564 | int have_eijmp_eicall; | |
565 | ||
566 | - /* Reserved for xmega architecture. */ | |
567 | - int reserved; | |
568 | + /* Core is in Xmega family. */ | |
569 | + int xmega; | |
570 | ||
571 | - /* Reserved for xmega architecture. */ | |
572 | - int reserved2; | |
573 | + /* Core have RAMPX, RAMPY and RAMPD registers. */ | |
574 | + int have_rampx_y_d; | |
575 | ||
576 | /* Default start of data section address for architecture. */ | |
577 | int default_data_section_start; | |
578 | @@ -75,7 +75,14 @@ enum avr_arch | |
579 | ARCH_AVR4, | |
580 | ARCH_AVR5, | |
581 | ARCH_AVR51, | |
582 | - ARCH_AVR6 | |
583 | + ARCH_AVR6, | |
584 | + ARCH_AVRXMEGA1, | |
585 | + ARCH_AVRXMEGA2, | |
586 | + ARCH_AVRXMEGA3, | |
587 | + ARCH_AVRXMEGA4, | |
588 | + ARCH_AVRXMEGA5, | |
589 | + ARCH_AVRXMEGA6, | |
590 | + ARCH_AVRXMEGA7 | |
591 | }; | |
592 | ||
593 | struct mcu_type_s { | |
594 | @@ -118,10 +125,18 @@ extern GTY(()) section *progmem_section; | |
595 | #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm) | |
596 | #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall) | |
597 | #define AVR_HAVE_8BIT_SP (avr_current_device->short_sp || TARGET_TINY_STACK) | |
598 | +#define AVR_XMEGA (avr_current_arch->xmega) | |
599 | +#define AVR_HAVE_RAMPX_Y_D (avr_current_arch->have_rampx_y_d) | |
600 | ||
601 | #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) | |
602 | #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) | |
603 | ||
604 | +#define AVR_IO_OFFSET (AVR_XMEGA ? 0 : 0x20) | |
605 | +#define AVR_RAMPD_ADDR (AVR_XMEGA ? 0x38 : 0) | |
606 | +#define AVR_RAMPX_ADDR (AVR_XMEGA ? 0x39 : 0) | |
607 | +#define AVR_RAMPY_ADDR (AVR_XMEGA ? 0x3A : 0) | |
608 | +#define AVR_RAMPZ_ADDR (AVR_XMEGA ? 0x3B : 0x5B) | |
609 | +#define AVR_SREG_ADDR (AVR_XMEGA ? 0x3F: 0x5F) | |
610 | #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)"); | |
611 | ||
6ef8d480 PZ |
612 | #define BITS_BIG_ENDIAN 0 |
613 | @@ -822,6 +837,10 @@ struct GTY(()) machine_function | |
dbe7ab63 | 614 | as specified by the "signal" attribute. */ |
615 | int is_signal; | |
616 | ||
617 | + /* 'true' - if current function is a signal function | |
618 | + as specified by the "nmi" attribute. */ | |
619 | + int is_nmi; | |
620 | + | |
621 | /* 'true' - if current function is a 'task' function | |
622 | as specified by the "OS_task" attribute. */ | |
623 | int is_OS_task; | |
624 | diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md | |
6ef8d480 PZ |
625 | --- gcc/config/avr/avr.md 2011-10-27 16:55:55.000000000 +0530 |
626 | +++ gcc/config/avr/avr.md 2011-10-27 17:00:24.000000000 +0530 | |
627 | @@ -48,9 +48,6 @@ | |
dbe7ab63 | 628 | (TMP_REGNO 0) ; temporary register r0 |
629 | (ZERO_REGNO 1) ; zero register r1 | |
630 | ||
631 | - (SREG_ADDR 0x5F) | |
632 | - (RAMPZ_ADDR 0x5B) | |
633 | - | |
634 | (UNSPEC_STRLEN 0) | |
635 | (UNSPEC_INDEX_JMP 1) | |
636 | (UNSPEC_SEI 2) | |
6ef8d480 | 637 | @@ -2969,7 +2966,8 @@ |
dbe7ab63 | 638 | "(optimize > 0)" |
639 | { | |
640 | operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff)); | |
641 | - return AS2 (cbi,%m0-0x20,%2); | |
642 | + operands[3] = GEN_INT(AVR_IO_OFFSET); | |
643 | + return AS2 (cbi,%0-%3,%2); | |
644 | } | |
645 | [(set_attr "length" "1") | |
646 | (set_attr "cc" "none")]) | |
6ef8d480 | 647 | @@ -2981,7 +2979,8 @@ |
dbe7ab63 | 648 | "(optimize > 0)" |
649 | { | |
650 | operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff)); | |
651 | - return AS2 (sbi,%m0-0x20,%2); | |
652 | + operands[3] = GEN_INT(AVR_IO_OFFSET); | |
653 | + return AS2 (sbi,%0-%3,%2); | |
654 | } | |
655 | [(set_attr "length" "1") | |
656 | (set_attr "cc" "none")]) | |
657 | diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S | |
6ef8d480 PZ |
658 | --- gcc/config/avr/libgcc.S 2011-10-27 16:55:55.000000000 +0530 |
659 | +++ gcc/config/avr/libgcc.S 2011-10-27 17:00:24.000000000 +0530 | |
660 | @@ -638,11 +638,19 @@ __prologue_saves__: | |
dbe7ab63 | 661 | in r29,__SP_H__ |
662 | sub r28,r26 | |
663 | sbc r29,r27 | |
664 | + | |
665 | +/* Restore stack pointer. */ | |
666 | +#if defined (__AVR_XMEGA__) | |
667 | + out __SP_L__,r28 | |
668 | + out __SP_H__,r29 | |
669 | +#else | |
670 | in __tmp_reg__,__SREG__ | |
671 | cli | |
672 | out __SP_H__,r29 | |
673 | out __SREG__,__tmp_reg__ | |
674 | out __SP_L__,r28 | |
675 | +#endif | |
676 | + | |
677 | #if defined (__AVR_HAVE_EIJMP_EICALL__) | |
678 | eijmp | |
679 | #else | |
6ef8d480 | 680 | @@ -680,11 +688,18 @@ __epilogue_restores__: |
dbe7ab63 | 681 | ldd r27,Y+1 |
682 | add r28,r30 | |
683 | adc r29,__zero_reg__ | |
684 | + | |
685 | +/* Restore stack pointer. */ | |
686 | +#if defined(__AVR_XMEGA__) | |
687 | + out __SP_L__,r28 | |
688 | + out __SP_H__,r29 | |
689 | +#else | |
690 | in __tmp_reg__,__SREG__ | |
691 | cli | |
692 | out __SP_H__,r29 | |
693 | out __SREG__,__tmp_reg__ | |
694 | out __SP_L__,r28 | |
695 | +#endif | |
696 | mov_l r28, r26 | |
697 | mov_h r29, r27 | |
698 | ret | |
699 | diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md | |
6ef8d480 PZ |
700 | --- gcc/config/avr/predicates.md 2011-10-27 16:55:06.000000000 +0530 |
701 | +++ gcc/config/avr/predicates.md 2011-10-27 17:00:24.000000000 +0530 | |
dbe7ab63 | 702 | @@ -45,17 +45,23 @@ |
703 | ;; Return true if OP is a valid address for lower half of I/O space. | |
704 | (define_predicate "low_io_address_operand" | |
705 | (and (match_code "const_int") | |
706 | - (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)"))) | |
707 | + (if_then_else (match_test "AVR_XMEGA") | |
708 | + (match_test "IN_RANGE((INTVAL (op)), 0x00, 0x1F)") | |
709 | + (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")))) | |
710 | ||
711 | ;; Return true if OP is a valid address for high half of I/O space. | |
712 | (define_predicate "high_io_address_operand" | |
713 | (and (match_code "const_int") | |
714 | - (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)"))) | |
715 | + (if_then_else (match_test "AVR_XMEGA") | |
716 | + (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)") | |
717 | + (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)")))) | |
718 | ||
719 | ;; Return true if OP is a valid address of I/O space. | |
720 | (define_predicate "io_address_operand" | |
721 | (and (match_code "const_int") | |
722 | - (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))"))) | |
723 | + (if_then_else (match_test "AVR_XMEGA") | |
724 | + (match_test "IN_RANGE((INTVAL (op)), 0x0, (0x40 - GET_MODE_SIZE(mode)))") | |
725 | + (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))")))) | |
726 | ||
727 | ;; Return 1 if OP is the zero constant for MODE. | |
728 | (define_predicate "const0_operand" | |
729 | diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr | |
6ef8d480 PZ |
730 | --- gcc/config/avr/t-avr 2011-10-27 16:55:55.000000000 +0530 |
731 | +++ gcc/config/avr/t-avr 2011-10-27 17:00:24.000000000 +0530 | |
dbe7ab63 | 732 | @@ -107,8 +107,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr |
733 | ||
734 | FPBIT = fp-bit.c | |
735 | ||
736 | -MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6 | |
737 | -MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 | |
738 | +MULTILIB_OPTIONS = mmcu=avr2/mmcu=avr25/mmcu=avr3/mmcu=avr31/mmcu=avr35/mmcu=avr4/mmcu=avr5/mmcu=avr51/mmcu=avr6/mmcu=avrxmega2/mmcu=avrxmega4/mmcu=avrxmega5/mmcu=avrxmega6/mmcu=avrxmega7 | |
739 | +MULTILIB_DIRNAMES = avr2 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega2 avrxmega4 avrxmega5 avrxmega6 avrxmega7 | |
740 | ||
741 | # The many avr2 matches are not listed here - this is the default. | |
742 | MULTILIB_MATCHES = \ | |
6ef8d480 PZ |
743 | @@ -252,7 +252,25 @@ MULTILIB_MATCHES = \ |
744 | mmcu?avr51=mmcu?at90usb1286 \ | |
745 | mmcu?avr51=mmcu?at90usb1287 \ | |
dbe7ab63 | 746 | mmcu?avr6=mmcu?atmega2560 \ |
747 | - mmcu?avr6=mmcu?atmega2561 | |
748 | + mmcu?avr6=mmcu?atmega2561 \ | |
749 | + mmcu?avrxmega2=mmcu?atxmega16a4 \ | |
750 | + mmcu?avrxmega2=mmcu?atxmega16d4 \ | |
dbe7ab63 | 751 | + mmcu?avrxmega2=mmcu?atxmega32d4 \ |
752 | + mmcu?avrxmega2=mmcu?atxmega32a4 \ | |
6ef8d480 | 753 | + mmcu?avrxmega2=mmcu?atxmega32x1 \ |
dbe7ab63 | 754 | + mmcu?avrxmega4=mmcu?atxmega64a3 \ |
755 | + mmcu?avrxmega4=mmcu?atxmega64d3 \ | |
756 | + mmcu?avrxmega5=mmcu?atxmega64a1 \ | |
757 | + mmcu?avrxmega5=mmcu?atxmega64a1u \ | |
758 | + mmcu?avrxmega6=mmcu?atxmega128a3 \ | |
759 | + mmcu?avrxmega6=mmcu?atxmega128d3 \ | |
760 | + mmcu?avrxmega6=mmcu?atxmega192a3 \ | |
761 | + mmcu?avrxmega6=mmcu?atxmega192d3 \ | |
762 | + mmcu?avrxmega6=mmcu?atxmega256a3 \ | |
763 | + mmcu?avrxmega6=mmcu?atxmega256a3b \ | |
764 | + mmcu?avrxmega6=mmcu?atxmega256d3 \ | |
765 | + mmcu?avrxmega7=mmcu?atxmega128a1 \ | |
766 | + mmcu?avrxmega7=mmcu?atxmega128a1u | |
767 | ||
768 | MULTILIB_EXCEPTIONS = | |
769 |