1 diff -Naurp bfd/archures.c bfd/archures.c
2 --- bfd/archures.c 2011-06-07 11:55:03.000000000 -0500
3 +++ bfd/archures.c 2011-06-07 11:56:48.000000000 -0500
4 @@ -375,6 +375,7 @@ DESCRIPTION
5 .#define bfd_mach_avrxmega5 105
6 .#define bfd_mach_avrxmega6 106
7 .#define bfd_mach_avrxmega7 107
8 +.#define bfd_mach_avrtiny10 201
9 . bfd_arch_bfin, {* ADI Blackfin *}
10 .#define bfd_mach_bfin 1
11 . bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
12 diff -Naurp bfd/bfd-in2.h bfd/bfd-in2.h
13 --- bfd/bfd-in2.h 2011-06-07 11:55:03.000000000 -0500
14 +++ bfd/bfd-in2.h 2011-06-07 11:56:48.000000000 -0500
15 @@ -2049,6 +2049,7 @@ enum bfd_architecture
16 #define bfd_mach_avrxmega5 105
17 #define bfd_mach_avrxmega6 106
18 #define bfd_mach_avrxmega7 107
19 +#define bfd_mach_avrtiny10 201
20 bfd_arch_bfin, /* ADI Blackfin */
21 #define bfd_mach_bfin 1
22 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
23 diff -Naurp bfd/cpu-avr.c bfd/cpu-avr.c
24 --- bfd/cpu-avr.c 2011-06-07 11:55:03.000000000 -0500
25 +++ bfd/cpu-avr.c 2011-06-07 11:56:48.000000000 -0500
26 @@ -154,7 +154,10 @@ static const bfd_arch_info_type arch_inf
27 N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[16]),
30 - N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
31 + N (24, bfd_mach_avrxmega7, "avr:107", FALSE, & arch_info_struct[17]),
34 + N (16, bfd_mach_avrtiny10, "avr:201", FALSE, NULL)
38 diff -Naurp bfd/elf32-avr.c bfd/elf32-avr.c
39 --- bfd/elf32-avr.c 2011-06-07 11:55:03.000000000 -0500
40 +++ bfd/elf32-avr.c 2011-06-07 11:56:48.000000000 -0500
41 @@ -1356,6 +1356,10 @@ bfd_elf_avr_final_write_processing (bfd
42 case bfd_mach_avrxmega7:
43 val = E_AVR_MACH_XMEGA7;
46 + case bfd_mach_avrtiny10:
47 + val = E_AVR_MACH_AVRTINY10;
51 elf_elfheader (abfd)->e_machine = EM_AVR;
52 @@ -1446,6 +1450,10 @@ elf32_avr_object_p (bfd *abfd)
53 case E_AVR_MACH_XMEGA7:
54 e_set = bfd_mach_avrxmega7;
57 + case E_AVR_MACH_AVRTINY10:
58 + e_set = bfd_mach_avrtiny10;
62 return bfd_default_set_arch_mach (abfd, bfd_arch_avr,
63 diff -Naurp gas/config/tc-avr.c gas/config/tc-avr.c
64 --- gas/config/tc-avr.c 2011-06-07 11:56:25.000000000 -0500
65 +++ gas/config/tc-avr.c 2011-06-07 11:56:48.000000000 -0500
66 @@ -88,6 +88,7 @@ static struct mcu_type_s mcu_types[] =
67 {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
68 {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
69 {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
70 + {"avrtiny10", AVR_ISA_AVRTINY10, bfd_mach_avrtiny10},
71 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
72 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
73 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
74 @@ -261,6 +262,12 @@ static struct mcu_type_s mcu_types[] =
75 {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
76 {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
77 {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
78 + {"attiny4", AVR_ISA_AVRTINY10, bfd_mach_avrtiny10},
79 + {"attiny5", AVR_ISA_AVRTINY10, bfd_mach_avrtiny10},
80 + {"attiny9", AVR_ISA_AVRTINY10, bfd_mach_avrtiny10},
81 + {"attiny10", AVR_ISA_AVRTINY10, bfd_mach_avrtiny10},
82 + {"attiny20", AVR_ISA_AVRTINY10, bfd_mach_avrtiny10},
83 + {"attiny40", AVR_ISA_AVRTINY10, bfd_mach_avrtiny10},
87 @@ -443,6 +450,7 @@ md_show_usage (FILE *stream)
88 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
89 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
90 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
91 + " avrtiny10 - tiny devices with 16 gp registers\n"
92 " or immediate microcontroller name.\n"));
94 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
95 @@ -790,6 +798,17 @@ avr_operand (struct avr_opcodes_s *opcod
96 op_mask = avr_get_constant (str, 31);
97 str = input_line_pointer;
99 + if (strcmp(avr_mcu->name, "avrtiny10") == 0
100 + || strcmp(avr_mcu->name, "attiny10") == 0
101 + || strcmp(avr_mcu->name, "attiny4") == 0
102 + || strcmp(avr_mcu->name, "attiny5") == 0
103 + || strcmp(avr_mcu->name, "attiny9") == 0
104 + || strcmp(avr_mcu->name, "attiny20") == 0
105 + || strcmp(avr_mcu->name, "attiny40") == 0)
108 + as_bad (_("register number above 15 required"));
113 diff -Naurp include/elf/avr.h include/elf/avr.h
114 --- include/elf/avr.h 2011-06-07 11:55:03.000000000 -0500
115 +++ include/elf/avr.h 2011-06-07 11:56:48.000000000 -0500
117 #define E_AVR_MACH_XMEGA5 105
118 #define E_AVR_MACH_XMEGA6 106
119 #define E_AVR_MACH_XMEGA7 107
120 +#define E_AVR_MACH_AVRTINY10 201
123 START_RELOC_NUMBERS (elf_avr_reloc_type)
124 diff -Naurp include/opcode/avr.h include/opcode/avr.h
125 --- include/opcode/avr.h 2011-06-07 11:55:03.000000000 -0500
126 +++ include/opcode/avr.h 2011-06-07 11:56:48.000000000 -0500
128 AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
129 AVR_ISA_SPM | AVR_ISA_BRK | AVR_ISA_EIND | \
132 +#define AVR_ISA_AVRTINY10 (AVR_ISA_1200 | AVR_ISA_BRK | AVR_ISA_SRAM)
133 #define REGISTER_P(x) ((x) == 'r' \
136 @@ -159,8 +159,8 @@ AVR_INSN (sez, "", "1001010000011000
137 AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
138 AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
140 -AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509)
141 -AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409)
142 +AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_SRAM, 0x9509)
143 +AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_SRAM, 0x9409)
145 AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
146 AVR_INSN (lpm, "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
147 @@ -260,8 +260,8 @@ AVR_INSN (dec, "r", "1001010rrrrr1010
148 AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
149 AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
150 AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
151 -AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f)
152 -AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f)
153 +AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_SRAM, 0x900f)
154 +AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_SRAM, 0x920f)
155 AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
156 AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
158 @@ -273,8 +273,8 @@ AVR_INSN (fmul, "a,a", "000000110ddd1rrr
159 AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380)
160 AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388)
162 -AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
163 -AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
164 +AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_SRAM, 0x9200)
165 +AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_SRAM, 0x9000)
167 /* Special case for b+0, `e' must be next entry after `b',
168 b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X. */
169 diff -Naurp ld/configure.tgt ld/configure.tgt
170 --- ld/configure.tgt 2011-06-07 11:55:03.000000000 -0500
171 +++ ld/configure.tgt 2011-06-07 11:56:48.000000000 -0500
172 @@ -110,7 +110,7 @@ xscale-*-coff) targ_emul=armcoff ;;
173 xscale-*-elf) targ_emul=armelf
175 avr-*-*) targ_emul=avr2
176 - targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega1 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7"
177 + targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega1 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny10"
179 bfin-*-elf) targ_emul=elf32bfin;
180 targ_extra_emuls="elf32bfinfd"
181 diff -Naurp ld/emulparams/avrtiny10.sh ld/emulparams/avrtiny10.sh
182 --- ld/emulparams/avrtiny10.sh 1969-12-31 18:00:00.000000000 -0600
183 +++ ld/emulparams/avrtiny10.sh 2011-06-07 11:56:48.000000000 -0500
188 +OUTPUT_FORMAT="elf32-avr"
194 +DATA_ORIGIN=0x800040
196 +EXTRA_EM_FILE=avrelf
197 diff -Naurp ld/Makefile.am ld/Makefile.am
198 --- ld/Makefile.am 2011-06-07 11:55:03.000000000 -0500
199 +++ ld/Makefile.am 2011-06-07 11:56:48.000000000 -0500
200 @@ -155,6 +155,7 @@ ALL_EMULATIONS = \
208 @@ -762,6 +763,10 @@ eavrxmega7.c: $(srcdir)/emulparams/avrxm
209 $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
211 ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
212 +eavrtiny10.c: $(srcdir)/emulparams/avrtiny10.sh \
213 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
215 + ${GENSCRIPTS} avrtiny10 "$(tdir_avr2)"
216 ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
217 $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
218 ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"