23 =======================================================
24 diff -Naurp bfd/archures.c bfd/archures.c
25 --- bfd/archures.c 2009-09-10 06:47:11.000000000 -0500
26 +++ bfd/archures.c 2011-06-07 11:44:52.000000000 -0500
27 @@ -368,6 +368,13 @@ DESCRIPTION
28 .#define bfd_mach_avr5 5
29 .#define bfd_mach_avr51 51
30 .#define bfd_mach_avr6 6
31 +.#define bfd_mach_avrxmega1 101
32 +.#define bfd_mach_avrxmega2 102
33 +.#define bfd_mach_avrxmega3 103
34 +.#define bfd_mach_avrxmega4 104
35 +.#define bfd_mach_avrxmega5 105
36 +.#define bfd_mach_avrxmega6 106
37 +.#define bfd_mach_avrxmega7 107
38 . bfd_arch_bfin, {* ADI Blackfin *}
39 .#define bfd_mach_bfin 1
40 . bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
41 diff -Naurp bfd/bfd-in2.h bfd/bfd-in2.h
42 --- bfd/bfd-in2.h 2010-02-03 07:28:24.000000000 -0600
43 +++ bfd/bfd-in2.h 2011-06-07 11:44:52.000000000 -0500
44 @@ -2042,6 +2042,13 @@ enum bfd_architecture
45 #define bfd_mach_avr5 5
46 #define bfd_mach_avr51 51
47 #define bfd_mach_avr6 6
48 +#define bfd_mach_avrxmega1 101
49 +#define bfd_mach_avrxmega2 102
50 +#define bfd_mach_avrxmega3 103
51 +#define bfd_mach_avrxmega4 104
52 +#define bfd_mach_avrxmega5 105
53 +#define bfd_mach_avrxmega6 106
54 +#define bfd_mach_avrxmega7 107
55 bfd_arch_bfin, /* ADI Blackfin */
56 #define bfd_mach_bfin 1
57 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
58 diff -Naurp bfd/cpu-avr.c bfd/cpu-avr.c
59 --- bfd/cpu-avr.c 2009-09-02 02:18:36.000000000 -0500
60 +++ bfd/cpu-avr.c 2011-06-07 11:44:52.000000000 -0500
61 @@ -133,7 +133,29 @@ static const bfd_arch_info_type arch_inf
62 N (22, bfd_mach_avr51, "avr:51", FALSE, & arch_info_struct[9]),
65 - N (22, bfd_mach_avr6, "avr:6", FALSE, NULL)
66 + N (22, bfd_mach_avr6, "avr:6", FALSE, & arch_info_struct[10]),
69 + N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[11]),
72 + N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[12]),
75 + N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[13]),
78 + N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[14]),
81 + N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[15]),
84 + N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[16]),
87 + N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
91 const bfd_arch_info_type bfd_avr_arch =
92 diff -Naurp bfd/elf32-avr.c bfd/elf32-avr.c
93 --- bfd/elf32-avr.c 2009-09-02 02:18:36.000000000 -0500
94 +++ bfd/elf32-avr.c 2011-06-07 11:44:52.000000000 -0500
95 @@ -1328,6 +1328,34 @@ bfd_elf_avr_final_write_processing (bfd
97 val = E_AVR_MACH_AVR6;
100 + case bfd_mach_avrxmega1:
101 + val = E_AVR_MACH_XMEGA1;
104 + case bfd_mach_avrxmega2:
105 + val = E_AVR_MACH_XMEGA2;
108 + case bfd_mach_avrxmega3:
109 + val = E_AVR_MACH_XMEGA3;
112 + case bfd_mach_avrxmega4:
113 + val = E_AVR_MACH_XMEGA4;
116 + case bfd_mach_avrxmega5:
117 + val = E_AVR_MACH_XMEGA5;
120 + case bfd_mach_avrxmega6:
121 + val = E_AVR_MACH_XMEGA6;
124 + case bfd_mach_avrxmega7:
125 + val = E_AVR_MACH_XMEGA7;
129 elf_elfheader (abfd)->e_machine = EM_AVR;
130 @@ -1390,6 +1418,34 @@ elf32_avr_object_p (bfd *abfd)
131 case E_AVR_MACH_AVR6:
132 e_set = bfd_mach_avr6;
135 + case E_AVR_MACH_XMEGA1:
136 + e_set = bfd_mach_avrxmega1;
139 + case E_AVR_MACH_XMEGA2:
140 + e_set = bfd_mach_avrxmega2;
143 + case E_AVR_MACH_XMEGA3:
144 + e_set = bfd_mach_avrxmega3;
147 + case E_AVR_MACH_XMEGA4:
148 + e_set = bfd_mach_avrxmega4;
151 + case E_AVR_MACH_XMEGA5:
152 + e_set = bfd_mach_avrxmega5;
155 + case E_AVR_MACH_XMEGA6:
156 + e_set = bfd_mach_avrxmega6;
159 + case E_AVR_MACH_XMEGA7:
160 + e_set = bfd_mach_avrxmega7;
164 return bfd_default_set_arch_mach (abfd, bfd_arch_avr,
165 diff -Naurp gas/config/tc-avr.c gas/config/tc-avr.c
166 --- gas/config/tc-avr.c 2011-06-07 11:47:11.000000000 -0500
167 +++ gas/config/tc-avr.c 2011-06-07 11:44:52.000000000 -0500
168 @@ -30,18 +30,19 @@ struct avr_opcodes_s
173 int insn_size; /* In words. */
175 unsigned int bin_opcode;
178 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
179 -{#NAME, CONSTR, SIZE, ISA, BIN},
180 +{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
182 struct avr_opcodes_s avr_opcodes[] =
184 #include "opcode/avr.h"
185 - {NULL, NULL, 0, 0, 0}
186 + {NULL, NULL, NULL, 0, 0, 0}
189 const char comment_chars[] = ";";
190 @@ -80,6 +81,13 @@ static struct mcu_type_s mcu_types[] =
191 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
192 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
193 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
194 + {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
195 + {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
196 + {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
197 + {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
198 + {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
199 + {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
200 + {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
201 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
202 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
203 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
204 @@ -216,6 +224,21 @@ static struct mcu_type_s mcu_types[] =
205 {"m3001b", AVR_ISA_AVR51, bfd_mach_avr51},
206 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
207 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
208 + {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
209 + {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
210 + {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
211 + {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
212 + {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
213 + {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
214 + {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
215 + {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
216 + {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
217 + {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
218 + {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
219 + {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
220 + {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
221 + {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
222 + {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
226 @@ -393,6 +416,11 @@ md_show_usage (FILE *stream)
227 " avr5 - enhanced AVR core with up to 64K program memory\n"
228 " avr51 - enhanced AVR core with up to 128K program memory\n"
229 " avr6 - enhanced AVR core with up to 256K program memory\n"
230 + " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
231 + " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
232 + " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
233 + " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
234 + " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
235 " or immediate microcontroller name.\n"));
237 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
238 @@ -820,7 +848,12 @@ avr_operand (struct avr_opcodes_s *opcod
244 + for (s = opcode->opcode; *s; ++s)
247 + op_mask |= (1 << (15 - (s - opcode->opcode)));
251 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
252 @@ -937,6 +970,16 @@ avr_operand (struct avr_opcodes_s *opcod
260 + x = avr_get_constant (str, 15);
261 + str = input_line_pointer;
262 + op_mask |= (x << 4);
269 diff -Naurp gas/doc/c-avr.texi gas/doc/c-avr.texi
270 --- gas/doc/c-avr.texi 2009-09-02 02:24:21.000000000 -0500
271 +++ gas/doc/c-avr.texi 2011-06-07 11:44:52.000000000 -0500
272 @@ -80,6 +80,27 @@ atmega128rfa1, at90can128, at90usb1286,
273 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
274 atmega2560, atmega2561).
276 +Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
277 +memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
280 +Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
281 +memory space and greater than 64K data space (MCU types: atxmega32a4).
283 +Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
284 +memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
286 +Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
287 +memory space and greater than 64K data space (MCU types: atxmega64a1).
289 +Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
290 +memory space and less than 64K data space (MCU types: atxmega128a3,
291 +atxmega128d3, atxmega192a3, atxmega192d3, atxmega256a3, atxmega256a3b,
294 +Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
295 +memory space and greater than 64K data space (MCU types: atxmega128a1).
297 @cindex @code{-mall-opcodes} command line option, AVR
299 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
300 diff -Naurp include/elf/avr.h include/elf/avr.h
301 --- include/elf/avr.h 2008-08-09 00:35:13.000000000 -0500
302 +++ include/elf/avr.h 2011-06-07 11:44:52.000000000 -0500
304 #define E_AVR_MACH_AVR5 5
305 #define E_AVR_MACH_AVR51 51
306 #define E_AVR_MACH_AVR6 6
307 +#define E_AVR_MACH_XMEGA1 101
308 +#define E_AVR_MACH_XMEGA2 102
309 +#define E_AVR_MACH_XMEGA3 103
310 +#define E_AVR_MACH_XMEGA4 104
311 +#define E_AVR_MACH_XMEGA5 105
312 +#define E_AVR_MACH_XMEGA6 106
313 +#define E_AVR_MACH_XMEGA7 107
316 START_RELOC_NUMBERS (elf_avr_reloc_type)
317 diff -Naurp include/opcode/avr.h include/opcode/avr.h
318 --- include/opcode/avr.h 2008-08-09 00:35:13.000000000 -0500
319 +++ include/opcode/avr.h 2011-06-07 11:44:52.000000000 -0500
321 #define AVR_ISA_BRK 0x0400 /* device has BREAK (on-chip debug) */
322 #define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
323 #define AVR_ISA_MOVW 0x1000 /* device has MOVW */
324 +#define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */
325 +#define AVR_ISA_DES 0x4000 /* device has DES */
327 #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
328 #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
330 #define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
331 #define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
332 #define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
333 +#define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND)
334 +#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
336 #define AVR_ISA_AVR1 AVR_ISA_TINY1
337 #define AVR_ISA_AVR2 AVR_ISA_2xxx
339 L - signed pc relative offset from -2048 to 2047
340 h - absolute code address (call, jmp)
341 S - immediate value from 0 to 7 (S = s << 4)
342 + E - immediate value from 0 to 15, shifted left by 4 (des)
343 ? - use this opcode entry if no parameters, else use next opcode entry
345 Order is important - some binary opcodes have more than one name,
346 @@ -168,7 +173,8 @@ AVR_INSN (reti, "", "1001010100011000
347 AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
348 AVR_INSN (break,"", "1001010110011000", 1, AVR_ISA_BRK, 0x9598)
349 AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
350 -AVR_INSN (spm, "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
351 +AVR_INSN (spm, "?", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
352 +AVR_INSN (spm, "z", "10010101111+1000", 1, AVR_ISA_SPMX, 0x95e8)
354 AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
355 AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
356 @@ -282,3 +288,6 @@ AVR_INSN (st, "e,r", "100!001rrrrree-+
357 AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
358 AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
360 +/* DES instruction for encryption and decryption */
361 +AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B)
363 diff -Naurp ld/configure.tgt ld/configure.tgt
364 --- ld/configure.tgt 2009-08-06 12:38:03.000000000 -0500
365 +++ ld/configure.tgt 2011-06-07 11:44:52.000000000 -0500
366 @@ -110,7 +110,7 @@ xscale-*-coff) targ_emul=armcoff ;;
367 xscale-*-elf) targ_emul=armelf
369 avr-*-*) targ_emul=avr2
370 - targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6"
371 + targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega1 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7"
373 bfin-*-elf) targ_emul=elf32bfin;
374 targ_extra_emuls="elf32bfinfd"
375 diff -Naurp ld/emulparams/avrxmega1.sh ld/emulparams/avrxmega1.sh
376 --- ld/emulparams/avrxmega1.sh 1969-12-31 18:00:00.000000000 -0600
377 +++ ld/emulparams/avrxmega1.sh 2011-06-07 11:44:52.000000000 -0500
382 +OUTPUT_FORMAT="elf32-avr"
388 +DATA_ORIGIN=0x802000
390 +EXTRA_EM_FILE=avrelf
391 diff -Naurp ld/emulparams/avrxmega2.sh ld/emulparams/avrxmega2.sh
392 --- ld/emulparams/avrxmega2.sh 1969-12-31 18:00:00.000000000 -0600
393 +++ ld/emulparams/avrxmega2.sh 2011-06-07 11:44:52.000000000 -0500
398 +OUTPUT_FORMAT="elf32-avr"
404 +DATA_ORIGIN=0x802000
406 +EXTRA_EM_FILE=avrelf
407 diff -Naurp ld/emulparams/avrxmega3.sh ld/emulparams/avrxmega3.sh
408 --- ld/emulparams/avrxmega3.sh 1969-12-31 18:00:00.000000000 -0600
409 +++ ld/emulparams/avrxmega3.sh 2011-06-07 11:44:52.000000000 -0500
414 +OUTPUT_FORMAT="elf32-avr"
420 +DATA_ORIGIN=0x802000
422 +EXTRA_EM_FILE=avrelf
423 diff -Naurp ld/emulparams/avrxmega4.sh ld/emulparams/avrxmega4.sh
424 --- ld/emulparams/avrxmega4.sh 1969-12-31 18:00:00.000000000 -0600
425 +++ ld/emulparams/avrxmega4.sh 2011-06-07 11:44:52.000000000 -0500
430 +OUTPUT_FORMAT="elf32-avr"
436 +DATA_ORIGIN=0x802000
438 +EXTRA_EM_FILE=avrelf
439 diff -Naurp ld/emulparams/avrxmega5.sh ld/emulparams/avrxmega5.sh
440 --- ld/emulparams/avrxmega5.sh 1969-12-31 18:00:00.000000000 -0600
441 +++ ld/emulparams/avrxmega5.sh 2011-06-07 11:44:52.000000000 -0500
446 +OUTPUT_FORMAT="elf32-avr"
452 +DATA_ORIGIN=0x802000
454 +EXTRA_EM_FILE=avrelf
455 diff -Naurp ld/emulparams/avrxmega6.sh ld/emulparams/avrxmega6.sh
456 --- ld/emulparams/avrxmega6.sh 1969-12-31 18:00:00.000000000 -0600
457 +++ ld/emulparams/avrxmega6.sh 2011-06-07 11:44:52.000000000 -0500
462 +OUTPUT_FORMAT="elf32-avr"
468 +DATA_ORIGIN=0x802000
470 +EXTRA_EM_FILE=avrelf
471 diff -Naurp ld/emulparams/avrxmega7.sh ld/emulparams/avrxmega7.sh
472 --- ld/emulparams/avrxmega7.sh 1969-12-31 18:00:00.000000000 -0600
473 +++ ld/emulparams/avrxmega7.sh 2011-06-07 11:44:52.000000000 -0500
478 +OUTPUT_FORMAT="elf32-avr"
484 +DATA_ORIGIN=0x802000
486 +EXTRA_EM_FILE=avrelf
487 diff -Naurp ld/emultempl/avrelf.em ld/emultempl/avrelf.em
488 --- ld/emultempl/avrelf.em 2009-09-02 02:25:35.000000000 -0500
489 +++ ld/emultempl/avrelf.em 2011-06-07 11:44:52.000000000 -0500
490 @@ -71,8 +71,10 @@ avr_elf_${EMULATION_NAME}_before_allocat
492 gld${EMULATION_NAME}_before_allocation ();
494 - /* We only need stubs for the avr6 family. */
495 - if (strcmp ("${EMULATION_NAME}","avr6"))
496 + /* We only need stubs for avr6, avrxmega6, and avrxmega7. */
497 + if (strcmp ("${EMULATION_NAME}","avr6")
498 + && strcmp ("${EMULATION_NAME}","avrxmega6")
499 + && strcmp ("${EMULATION_NAME}","avrxmega7") )
502 avr_elf_set_global_bfd_parameters ();
503 diff -Naurp ld/Makefile.am ld/Makefile.am
504 --- ld/Makefile.am 2010-02-22 02:07:01.000000000 -0600
505 +++ ld/Makefile.am 2011-06-07 11:44:52.000000000 -0500
506 @@ -148,6 +148,13 @@ ALL_EMULATIONS = \
520 @@ -727,6 +734,34 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
521 $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
523 ${GENSCRIPTS} avr6 "$(tdir_avr2)"
524 +eavrxmega1.c: $(srcdir)/emulparams/avrxmega1.sh \
525 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
527 + ${GENSCRIPTS} avrxmega1 "$(tdir_avr2)"
528 +eavrxmega2.c: $(srcdir)/emulparams/avrxmega2.sh \
529 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
531 + ${GENSCRIPTS} avrxmega2 "$(tdir_avr2)"
532 +eavrxmega3.c: $(srcdir)/emulparams/avrxmega3.sh \
533 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
535 + ${GENSCRIPTS} avrxmega3 "$(tdir_avr2)"
536 +eavrxmega4.c: $(srcdir)/emulparams/avrxmega4.sh \
537 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
539 + ${GENSCRIPTS} avrxmega4 "$(tdir_avr2)"
540 +eavrxmega5.c: $(srcdir)/emulparams/avrxmega5.sh \
541 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
543 + ${GENSCRIPTS} avrxmega5 "$(tdir_avr2)"
544 +eavrxmega6.c: $(srcdir)/emulparams/avrxmega6.sh \
545 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
547 + ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)"
548 +eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \
549 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
551 + ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
552 ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
553 $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
554 ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
555 diff -Naurp ld/Makefile.in ld/Makefile.in
556 --- ld/Makefile.in 2010-03-03 08:06:21.000000000 -0600
557 +++ ld/Makefile.in 2011-06-07 11:44:52.000000000 -0500
558 @@ -434,6 +434,13 @@ ALL_EMULATIONS = \
572 @@ -2069,6 +2076,34 @@ eavr6.c: $(srcdir)/emulparams/avr6.sh $(
573 $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
575 ${GENSCRIPTS} avr6 "$(tdir_avr2)"
576 +eavrxmega1.c: $(srcdir)/emulparams/avrxmega1.sh \
577 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
579 + ${GENSCRIPTS} avrxmega1 "$(tdir_avr2)"
580 +eavrxmega2.c: $(srcdir)/emulparams/avrxmega2.sh \
581 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
583 + ${GENSCRIPTS} avrxmega2 "$(tdir_avr2)"
584 +eavrxmega3.c: $(srcdir)/emulparams/avrxmega3.sh \
585 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
587 + ${GENSCRIPTS} avrxmega3 "$(tdir_avr2)"
588 +eavrxmega4.c: $(srcdir)/emulparams/avrxmega4.sh \
589 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
591 + ${GENSCRIPTS} avrxmega4 "$(tdir_avr2)"
592 +eavrxmega5.c: $(srcdir)/emulparams/avrxmega5.sh \
593 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
595 + ${GENSCRIPTS} avrxmega5 "$(tdir_avr2)"
596 +eavrxmega6.c: $(srcdir)/emulparams/avrxmega6.sh \
597 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
599 + ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)"
600 +eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \
601 + $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
603 + ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
604 ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
605 $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
606 ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
607 diff -Naurp opcodes/avr-dis.c opcodes/avr-dis.c
608 --- opcodes/avr-dis.c 2008-11-06 06:03:24.000000000 -0600
609 +++ opcodes/avr-dis.c 2011-06-07 11:44:52.000000000 -0500
610 @@ -50,7 +50,7 @@ static const char * comment_start = "0x"
613 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
614 - char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
615 + char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
619 @@ -118,8 +118,18 @@ avr_operand (unsigned int insn, unsigned
625 + /* Check for post-increment. */
627 + for (s = opcode_str; *s; ++s)
637 if (AVR_UNDEF_P (insn))
638 sprintf (comment, _("undefined"));
639 @@ -227,6 +237,10 @@ avr_operand (unsigned int insn, unsigned
644 + sprintf (buf, "%d", (insn >> 4) & 15);
650 @@ -331,7 +345,8 @@ print_insn_avr (bfd_vma addr, disassembl
654 - char *op = opcode->constraints;
655 + char *constraints = opcode->constraints;
656 + char *opcode_str = opcode->opcode;
660 @@ -342,14 +357,14 @@ print_insn_avr (bfd_vma addr, disassembl
664 - if (*op && *op != '?')
665 + if (*constraints && *constraints != '?')
667 - int regs = REGISTER_P (*op);
668 + int regs = REGISTER_P (*constraints);
670 - ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
671 + ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1);
673 - if (ok && *(++op) == ',')
674 - ok = avr_operand (insn, insn2, addr, *(++op), op2,
675 + if (ok && *(++constraints) == ',')
676 + ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2,
677 *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);