up to 22.1.6

diff --git a/Mesa.spec b/Mesa.spec
index eb40b76456fe17c1253a6809c1709b9c2cf2eec4..3c59ee2f56f3ecc3a83467b5073c5591723d88e1 100644 (file)
--- a/Mesa.spec
+++ b/Mesa.spec
@@ -71,17 +71,16 @@
 Summary:       Free OpenGL implementation
 Summary(pl.UTF-8):     Wolnodostępna implementacja standardu OpenGL
 Name:          Mesa
-Version:       22.1.5
+Version:       22.1.6
 Release:       1
 License:       MIT (core) and others - see license.html file
 Group:         X11/Libraries
 #Source0:      ftp://ftp.freedesktop.org/pub/mesa/mesa-%{version}.tar.xz
 ## Source0-md5:        7c61a801311fb8d2f7b3cceb7b5cf308
 Source0:       https://gitlab.freedesktop.org/mesa/mesa/-/archive/mesa-%{version}/mesa-mesa-%{version}.tar.bz2
-# Source0-md5: 403e7858bebe7ccdd774baf34ae65017
+# Source0-md5: 6f4f6af12444e393dce89a7e776c143d
 Patch0:                zink_x32.patch
 Patch1:                powervr_uint64.patch
-Patch2:                bifrost_crash.patch
 URL:           https://www.mesa3d.org/
 %{?with_opencl_spirv:BuildRequires:    SPIRV-LLVM-Translator-devel >= 8.0.1.3}
 %{?with_gallium_zink:BuildRequires:    Vulkan-Loader-devel}
@@ -1428,7 +1427,6 @@ radv - eksperymentalny sterownik Vulkan dla GPU firmy AMD.
 %patch0 -p1
 %ifarch %{arm} aarch64
 %patch1 -p1
-%patch2 -p1
 %endif
 
 %build

diff --git a/bifrost_crash.patch b/bifrost_crash.patch
deleted file mode 100644 (file)
index 1e300b7..0000000
--- a/bifrost_crash.patch
+++ /dev/null
@@ -1,52 +0,0 @@
-From c69f1dba5c2b51614d69580249d52eb62dddaf62 Mon Sep 17 00:00:00 2001
-From: Eric Engestrom <eric@engestrom.ch>
-Date: Wed, 10 Aug 2022 16:43:24 +0100
-Subject: [PATCH] Revert "pan/bi: Require ATEST coverage mask input in R60"
-
-This reverts commit 7ead256891cec7a301d2fd415405a7f9106b1f46.
-
-See https://gitlab.freedesktop.org/mesa/mesa/-/issues/7025 for the
-details, but the short version is that this was causing a segfault.
----
- .pick_status.json            |  2 +-
- src/panfrost/bifrost/bi_ra.c | 11 -----------
- 2 files changed, 1 insertion(+), 12 deletions(-)
-
-diff --git a/.pick_status.json b/.pick_status.json
-index f33cb9b8538a..2dec29fd3e76 100644
---- a/.pick_status.json
-+++ b/.pick_status.json
-@@ -6349,7 +6349,7 @@
-         "description": "pan/bi: Require ATEST coverage mask input in R60",
-         "nominated": true,
-         "nomination_type": 0,
--        "resolution": 1,
-+        "resolution": 2,
-         "main_sha": null,
-         "because_sha": null
-     },
-diff --git a/src/panfrost/bifrost/bi_ra.c b/src/panfrost/bifrost/bi_ra.c
-index 7472c2e550b5..8b14c0ec79a9 100644
---- a/src/panfrost/bifrost/bi_ra.c
-+++ b/src/panfrost/bifrost/bi_ra.c
-@@ -334,17 +334,6 @@ bi_allocate_registers(bi_context *ctx, bool *success, bool full_regs)
-                         if (node < node_count)
-                                 l->solutions[node] = 4;
-                 }
--
--                /* Experimentally, it seems coverage masks inputs to ATEST must
--                 * be in R60. Otherwise coverage mask writes do not work with
--                 * early-ZS with pixel-frequency-shading (this combination of
--                 * settings is legal if depth/stencil writes are disabled).
--                 */
--                if (ins->op == BI_OPCODE_ATEST) {
--                        unsigned node = bi_get_node(ins->src[0]);
--                        assert(node < node_count);
--                        l->solutions[node] = 60;
--                }
-         }
- 
-         bi_compute_interference(ctx, l, full_regs);
--- 
-GitLab
-