-Index: libgomp/configure.tgt
+Index: libgomp/ChangeLog
===================================================================
---- libgomp/configure.tgt (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libgomp/configure.tgt (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -125,6 +125,10 @@
- config_path="bsd posix"
- ;;
-
-+ mips-sgi-irix6*)
-+ # Need to link with -lpthread so libgomp.so is self-contained.
-+ XLDFLAGS="${XLDFLAGS} -lpthread"
-+ ;;
- *)
- ;;
+--- libgomp/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libgomp/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,8 @@
++2012-03-22 Jakub Jelinek <jakub@redhat.com>
++
++ PR middle-end/52547
++ * testsuite/libgomp.c/pr52547.c: New test.
++
+ 2012-03-22 Release Manager
-Index: libgomp/ChangeLog
+ * GCC 4.7.0 released.
+Index: libgomp/testsuite/libgomp.c/pr52547.c
===================================================================
---- libgomp/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libgomp/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,10 @@
-+2010-12-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+--- libgomp/testsuite/libgomp.c/pr52547.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ libgomp/testsuite/libgomp.c/pr52547.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,36 @@
++/* PR middle-end/52547 */
++/* { dg-do run } */
+
-+ Backport from mainline:
-+ 2010-12-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
++extern void abort (void);
+
-+ * configure.tgt (mips-sgi-irix6*): Add -lpthread to XLDFLAGS.
++__attribute__((noinline, noclone)) int
++baz (int *x, int (*fn) (int *))
++{
++ return fn (x);
++}
+
- 2010-12-16 Release Manager
-
- * GCC 4.5.2 released.
-Index: gcc/tree-loop-distribution.c
++__attribute__((noinline, noclone)) int
++foo (int x, int *y)
++{
++ int i, e = 0;
++#pragma omp parallel for reduction(|:e)
++ for (i = 0; i < x; ++i)
++ {
++ __label__ lab;
++ int bar (int *z) { return z - y; }
++ if (baz (&y[i], bar) != i)
++ e |= 1;
++ }
++ return e;
++}
++
++int
++main ()
++{
++ int a[100], i;
++ for (i = 0; i < 100; i++)
++ a[i] = i;
++ if (foo (100, a))
++ abort ();
++ return 0;
++}
+Index: libstdc++-v3/include/Makefile.in
===================================================================
---- gcc/tree-loop-distribution.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/tree-loop-distribution.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -251,7 +251,7 @@
-
- /* Generate a call to memset. Return true when the operation succeeded. */
+--- libstdc++-v3/include/Makefile.in (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libstdc++-v3/include/Makefile.in (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1497,7 +1497,7 @@
+ sed -e "s,define __GLIBCXX__,define __GLIBCXX__ $$date," \
+ -e "s,define _GLIBCXX_INLINE_VERSION, define _GLIBCXX_INLINE_VERSION $$ns_version," \
+ -e "s,define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY, define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY $$visibility," \
+- -e "s,define _GLIBCXX_EXTERN_TEMPLATE, define _GLIBCXX_EXTERN_TEMPLATE $$externtemplate," \
++ -e "s,define _GLIBCXX_EXTERN_TEMPLATE$$, define _GLIBCXX_EXTERN_TEMPLATE $$externtemplate," \
+ -e "$$ldbl_compat" \
+ < ${glibcxx_srcdir}/include/bits/c++config > $@ ;\
+ sed -e 's/HAVE_/_GLIBCXX_HAVE_/g' \
+Index: libstdc++-v3/include/debug/safe_iterator.h
+===================================================================
+--- libstdc++-v3/include/debug/safe_iterator.h (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libstdc++-v3/include/debug/safe_iterator.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,6 +1,6 @@
+ // Safe iterator implementation -*- C++ -*-
+
+-// Copyright (C) 2003, 2004, 2005, 2006, 2009, 2010, 2011
++// Copyright (C) 2003, 2004, 2005, 2006, 2009, 2010, 2011, 2012
+ // Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library. This library is free
+@@ -169,7 +169,25 @@
+ ._M_iterator(__x, "other"));
+ }
--static bool
-+static void
- generate_memset_zero (gimple stmt, tree op0, tree nb_iter,
- gimple_stmt_iterator bsi)
- {
-@@ -265,45 +265,27 @@
-
- DR_STMT (dr) = stmt;
- DR_REF (dr) = op0;
-- if (!dr_analyze_innermost (dr))
-- goto end;
-+ res = dr_analyze_innermost (dr);
-+ gcc_assert (res && stride_of_unit_type_p (DR_STEP (dr), TREE_TYPE (op0)));
-
-- /* Test for a positive stride, iterating over every element. */
-- if (integer_zerop (size_binop (MINUS_EXPR,
-- fold_convert (sizetype, DR_STEP (dr)),
-- TYPE_SIZE_UNIT (TREE_TYPE (op0)))))
-- {
-- addr_base = fold_convert_loc (loc, sizetype,
-- size_binop_loc (loc, PLUS_EXPR,
-- DR_OFFSET (dr),
-- DR_INIT (dr)));
-- addr_base = fold_build2_loc (loc, POINTER_PLUS_EXPR,
-- TREE_TYPE (DR_BASE_ADDRESS (dr)),
-- DR_BASE_ADDRESS (dr), addr_base);
-+ nb_bytes = build_size_arg_loc (loc, nb_iter, op0, &stmt_list);
-+ addr_base = size_binop_loc (loc, PLUS_EXPR, DR_OFFSET (dr), DR_INIT (dr));
-+ addr_base = fold_convert_loc (loc, sizetype, addr_base);
-
-- nb_bytes = build_size_arg_loc (loc, nb_iter, op0, &stmt_list);
-- }
--
- /* Test for a negative stride, iterating over every element. */
-- else if (integer_zerop (size_binop (PLUS_EXPR,
-- TYPE_SIZE_UNIT (TREE_TYPE (op0)),
-- fold_convert (sizetype, DR_STEP (dr)))))
-+ if (integer_zerop (size_binop (PLUS_EXPR,
-+ TYPE_SIZE_UNIT (TREE_TYPE (op0)),
-+ fold_convert (sizetype, DR_STEP (dr)))))
- {
-- nb_bytes = build_size_arg_loc (loc, nb_iter, op0, &stmt_list);
--
-- addr_base = size_binop_loc (loc, PLUS_EXPR, DR_OFFSET (dr), DR_INIT (dr));
-- addr_base = fold_convert_loc (loc, sizetype, addr_base);
- addr_base = size_binop_loc (loc, MINUS_EXPR, addr_base,
- fold_convert_loc (loc, sizetype, nb_bytes));
- addr_base = size_binop_loc (loc, PLUS_EXPR, addr_base,
- TYPE_SIZE_UNIT (TREE_TYPE (op0)));
-- addr_base = fold_build2_loc (loc, POINTER_PLUS_EXPR,
-- TREE_TYPE (DR_BASE_ADDRESS (dr)),
-- DR_BASE_ADDRESS (dr), addr_base);
- }
-- else
-- goto end;
-
-+ addr_base = fold_build2_loc (loc, POINTER_PLUS_EXPR,
-+ TREE_TYPE (DR_BASE_ADDRESS (dr)),
-+ DR_BASE_ADDRESS (dr), addr_base);
- mem = force_gimple_operand (addr_base, &stmts, true, NULL);
- gimple_seq_add_seq (&stmt_list, stmts);
-
-@@ -311,14 +293,11 @@
- fn_call = gimple_build_call (fn, 3, mem, integer_zero_node, nb_bytes);
- gimple_seq_add_stmt (&stmt_list, fn_call);
- gsi_insert_seq_after (&bsi, stmt_list, GSI_CONTINUE_LINKING);
-- res = true;
-
- if (dump_file && (dump_flags & TDF_DETAILS))
- fprintf (dump_file, "generated memset zero\n");
-
-- end:
- free_data_ref (dr);
-- return res;
- }
++#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ /**
++ * @brief Move construction.
++ * @post __x is singular and unattached
++ */
++ _Safe_iterator(_Safe_iterator&& __x) : _M_current()
++ {
++ _GLIBCXX_DEBUG_VERIFY(!__x._M_singular()
++ || __x._M_current == _Iterator(),
++ _M_message(__msg_init_copy_singular)
++ ._M_iterator(*this, "this")
++ ._M_iterator(__x, "other"));
++ std::swap(_M_current, __x._M_current);
++ this->_M_attach(__x._M_sequence);
++ __x._M_detach();
++ }
++#endif
++
++ /**
+ * @brief Converting constructor from a mutable iterator to a
+ * constant iterator.
+ */
+@@ -208,7 +226,28 @@
+ return *this;
+ }
- /* Tries to generate a builtin function for the instructions of LOOP
-@@ -332,7 +311,6 @@
- unsigned i, x = 0;
- basic_block *bbs;
- gimple write = NULL;
-- tree op0, op1;
- gimple_stmt_iterator bsi;
- tree nb_iter = number_of_exit_cond_executions (loop);
++#ifdef __GXX_EXPERIMENTAL_CXX0X__
+ /**
++ * @brief Move assignment.
++ * @post __x is singular and unattached
++ */
++ _Safe_iterator&
++ operator=(_Safe_iterator&& __x)
++ {
++ _GLIBCXX_DEBUG_VERIFY(!__x._M_singular()
++ || __x._M_current == _Iterator(),
++ _M_message(__msg_copy_singular)
++ ._M_iterator(*this, "this")
++ ._M_iterator(__x, "other"));
++ _M_current = __x._M_current;
++ _M_attach(__x._M_sequence);
++ __x._M_detach();
++ __x._M_current = _Iterator();
++ return *this;
++ }
++#endif
++
++ /**
+ * @brief Iterator dereference.
+ * @pre iterator is dereferenceable
+ */
+@@ -422,7 +461,9 @@
+ /// Is this iterator equal to the sequence's before_begin() iterator if
+ /// any?
+ bool _M_is_before_begin() const
+- { return _BeforeBeginHelper<_Sequence>::_M_Is(base(), _M_get_sequence()); }
++ {
++ return _BeforeBeginHelper<_Sequence>::_M_Is(base(), _M_get_sequence());
++ }
+ };
-@@ -368,26 +346,17 @@
- }
- }
+ template<typename _IteratorL, typename _IteratorR, typename _Sequence>
+Index: libstdc++-v3/include/std/array
+===================================================================
+--- libstdc++-v3/include/std/array (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libstdc++-v3/include/std/array (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,6 +1,7 @@
+ // <array> -*- C++ -*-
+
+-// Copyright (C) 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
++// Copyright (C) 2007, 2008, 2009, 2010, 2011, 2012
++// Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library. This library is free
+ // software; you can redistribute it and/or modify it under the
+@@ -174,8 +175,9 @@
+ const_reference
+ at(size_type __n) const
+ {
+- return __n < _Nm ?
+- _M_instance[__n] : __throw_out_of_range(__N("array::at"));
++ if (__n >= _Nm)
++ std::__throw_out_of_range(__N("array::at"));
++ return _M_instance[__n];
+ }
+ #endif
-- if (!write)
-+ if (!stmt_with_adjacent_zero_store_dr_p (write))
- goto end;
+Index: libstdc++-v3/include/bits/forward_list.h
+===================================================================
+--- libstdc++-v3/include/bits/forward_list.h (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libstdc++-v3/include/bits/forward_list.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,6 +1,6 @@
+ // <forward_list.h> -*- C++ -*-
+
+-// Copyright (C) 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
++// Copyright (C) 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+ //
+ // This file is part of the GNU ISO C++ Library. This library is free
+ // software; you can redistribute it and/or modify it under the
+@@ -606,8 +606,8 @@
+ * in the range [@a __first,@a __last).
+ *
+ * Note that the assignment completely changes the %forward_list and
+- * that the resulting %forward_list's size is the same as the number
+- * of elements assigned. Old data may be lost.
++ * that the number of elements of the resulting %forward_list's is the
++ * same as the number of elements assigned. Old data is lost.
+ */
+ template<typename _InputIterator>
+ void
+@@ -622,10 +622,10 @@
+ * @param __n Number of elements to be assigned.
+ * @param __val Value to be assigned.
+ *
+- * This function fills a %forward_list with @a __n copies of the given
+- * value. Note that the assignment completely changes the
+- * %forward_list and that the resulting %forward_list's size is the
+- * same as the number of elements assigned. Old data may be lost.
++ * This function fills a %forward_list with @a __n copies of the
++ * given value. Note that the assignment completely changes the
++ * %forward_list, and that the resulting %forward_list has __n
++ * elements. Old data is lost.
+ */
+ void
+ assign(size_type __n, const _Tp& __val)
+@@ -744,7 +744,7 @@
+ { return this->_M_impl._M_head._M_next == 0; }
+
+ /**
+- * Returns the largest possible size of %forward_list.
++ * Returns the largest possible number of elements of %forward_list.
+ */
+ size_type
+ max_size() const noexcept
+@@ -997,9 +997,9 @@
+ *
+ * This function will %resize the %forward_list to the specified
+ * number of elements. If the number is smaller than the
+- * %forward_list's current size the %forward_list is truncated,
+- * otherwise the %forward_list is extended and the new elements
+- * are default constructed.
++ * %forward_list's current number of elements the %forward_list
++ * is truncated, otherwise the %forward_list is extended and the
++ * new elements are default constructed.
+ */
+ void
+ resize(size_type __sz);
+@@ -1012,9 +1012,9 @@
+ *
+ * This function will %resize the %forward_list to the specified
+ * number of elements. If the number is smaller than the
+- * %forward_list's current size the %forward_list is truncated,
+- * otherwise the %forward_list is extended and new elements are
+- * populated with given data.
++ * %forward_list's current number of elements the %forward_list
++ * is truncated, otherwise the %forward_list is extended and new
++ * elements are populated with given data.
+ */
+ void
+ resize(size_type __sz, const value_type& __val);
+@@ -1240,11 +1240,11 @@
+ * @brief Forward list equality comparison.
+ * @param __lx A %forward_list
+ * @param __ly A %forward_list of the same type as @a __lx.
+- * @return True iff the size and elements of the forward lists are equal.
++ * @return True iff the elements of the forward lists are equal.
+ *
+- * This is an equivalence relation. It is linear in the size of the
+- * forward lists. Deques are considered equivalent if corresponding
+- * elements compare equal.
++ * This is an equivalence relation. It is linear in the number of
++ * elements of the forward lists. Deques are considered equivalent
++ * if corresponding elements compare equal.
+ */
+ template<typename _Tp, typename _Alloc>
+ bool
+@@ -1257,8 +1257,9 @@
+ * @param __ly A %forward_list of the same type as @a __lx.
+ * @return True iff @a __lx is lexicographically less than @a __ly.
+ *
+- * This is a total ordering relation. It is linear in the size of the
+- * forward lists. The elements must be comparable with @c <.
++ * This is a total ordering relation. It is linear in the number of
++ * elements of the forward lists. The elements must be comparable
++ * with @c <.
+ *
+ * See std::lexicographical_compare() for how the determination is made.
+ */
+Index: libstdc++-v3/include/Makefile.am
+===================================================================
+--- libstdc++-v3/include/Makefile.am (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libstdc++-v3/include/Makefile.am (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,7 +1,7 @@
+ ## Makefile for the include subdirectory of the GNU C++ Standard library.
+ ##
+ ## Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
+-## 2011
++## 2011, 2012
+ ## Free Software Foundation, Inc.
+ ##
+ ## This file is part of the libstdc++ version 3 distribution.
+@@ -1105,7 +1105,7 @@
+ sed -e "s,define __GLIBCXX__,define __GLIBCXX__ $$date," \
+ -e "s,define _GLIBCXX_INLINE_VERSION, define _GLIBCXX_INLINE_VERSION $$ns_version," \
+ -e "s,define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY, define _GLIBCXX_HAVE_ATTRIBUTE_VISIBILITY $$visibility," \
+- -e "s,define _GLIBCXX_EXTERN_TEMPLATE, define _GLIBCXX_EXTERN_TEMPLATE $$externtemplate," \
++ -e "s,define _GLIBCXX_EXTERN_TEMPLATE$$, define _GLIBCXX_EXTERN_TEMPLATE $$externtemplate," \
+ -e "$$ldbl_compat" \
+ < ${glibcxx_srcdir}/include/bits/c++config > $@ ;\
+ sed -e 's/HAVE_/_GLIBCXX_HAVE_/g' \
+Index: libstdc++-v3/ChangeLog
+===================================================================
+--- libstdc++-v3/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libstdc++-v3/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,30 @@
++2012-03-23 David S. Miller <davem@davemloft.net>
++
++ * config/abi/post/sparc-linux-gnu/baseline_symbols.txt: Update.
++
++2012-03-23 Paolo Carlini <paolo.carlini@oracle.com>
++
++ * include/bits/forward_list.h: Fix comments.
++
++2012-03-23 Paweł Sikora <pawel.sikora@agmk.net>
++
++ PR libstdc++/52540
++ * include/Makefile.am (c++config.h): Fix sed rule to not break
++ the _GLIBCXX_EXTERN_TEMPLATE redefinition.
++ * include/Makefile.in: Regenerate.
++
++2012-03-22 Jonathan Wakely <jwakely.gcc@gmail.com>
++
++ PR libstdc++/52433
++ * include/debug/safe_iterator.h (_Safe_iterator): Add move
++ constructor and move assignment operator.
++ * testsuite/23_containers/vector/debug/52433.cc: New.
++
++2012-03-22 Paolo Carlini <paolo.carlini@oracle.com>
++
++ * include/std/array (array<>::at(size_type) const): Fix version
++ for undefined __EXCEPTIONS.
++
+ 2012-03-22 Release Manager
-- op0 = gimple_assign_lhs (write);
-- op1 = gimple_assign_rhs1 (write);
--
-- if (!(TREE_CODE (op0) == ARRAY_REF
-- || TREE_CODE (op0) == INDIRECT_REF))
-- goto end;
--
- /* The new statements will be placed before LOOP. */
- bsi = gsi_last_bb (loop_preheader_edge (loop)->src);
-+ generate_memset_zero (write, gimple_assign_lhs (write), nb_iter, bsi);
-+ res = true;
-
-- if (gimple_assign_rhs_code (write) == INTEGER_CST
-- && (integer_zerop (op1) || real_zerop (op1)))
-- res = generate_memset_zero (write, op0, nb_iter, bsi);
--
- /* If this is the last partition for which we generate code, we have
- to destroy the loop. */
-- if (res && !copy_p)
-+ if (!copy_p)
- {
- unsigned nbbs = loop->num_nodes;
- edge exit = single_exit (loop);
-@@ -531,24 +500,6 @@
- static void rdg_flag_vertex_and_dependent (struct graph *, int, bitmap, bitmap,
- bitmap, bool *);
+ * GCC 4.7.0 released.
+Index: libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc
+===================================================================
+--- libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc (.../tags/gcc_4_7_0_release) (wersja 0)
++++ libstdc++-v3/testsuite/23_containers/vector/debug/52433.cc (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,43 @@
++// Copyright (C) 2012 Free Software Foundation, Inc.
++//
++// This file is part of the GNU ISO C++ Library. This library is free
++// software; you can redistribute it and/or modify it under the
++// terms of the GNU General Public License as published by the
++// Free Software Foundation; either version 3, or (at your option)
++// any later version.
++//
++// This library is distributed in the hope that it will be useful,
++// but WITHOUT ANY WARRANTY; without even the implied warranty of
++// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
++// GNU General Public License for more details.
++//
++// You should have received a copy of the GNU General Public License along
++// with this library; see the file COPYING3. If not see
++// <http://www.gnu.org/licenses/>.
++//
++// { dg-require-debug-mode "" }
++// { dg-options "-std=gnu++0x" }
++// { dg-do compile }
++
++// PR libstdc++/52433
++
++#include <vector>
++
++struct X
++{
++ std::vector<int>::iterator i;
++
++ X() = default;
++ X(const X&) = default;
++ X(X&&) = default;
++ X& operator=(const X&) = default;
++ X& operator=(X&&) = default;
++};
++
++X test01()
++{
++ X x;
++ x = X();
++ return x;
++}
++
+Index: libstdc++-v3/config/abi/post/sparc-linux-gnu/baseline_symbols.txt
+===================================================================
+--- libstdc++-v3/config/abi/post/sparc-linux-gnu/baseline_symbols.txt (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libstdc++-v3/config/abi/post/sparc-linux-gnu/baseline_symbols.txt (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -43,6 +43,10 @@
+ FUNC:_ZN11__gnu_debug19_Safe_sequence_base18_M_detach_singularEv@@GLIBCXX_3.4
+ FUNC:_ZN11__gnu_debug19_Safe_sequence_base22_M_revalidate_singularEv@@GLIBCXX_3.4
+ FUNC:_ZN11__gnu_debug19_Safe_sequence_base7_M_swapERS0_@@GLIBCXX_3.4
++FUNC:_ZN11__gnu_debug25_Safe_local_iterator_base9_M_attachEPNS_19_Safe_sequence_baseEb@@GLIBCXX_3.4.17
++FUNC:_ZN11__gnu_debug25_Safe_local_iterator_base9_M_detachEv@@GLIBCXX_3.4.17
++FUNC:_ZN11__gnu_debug30_Safe_unordered_container_base13_M_detach_allEv@@GLIBCXX_3.4.17
++FUNC:_ZN11__gnu_debug30_Safe_unordered_container_base7_M_swapERS0_@@GLIBCXX_3.4.17
+ FUNC:_ZN14__gnu_parallel9_Settings3getEv@@GLIBCXX_3.4.10
+ FUNC:_ZN14__gnu_parallel9_Settings3setERS0_@@GLIBCXX_3.4.10
+ FUNC:_ZN9__gnu_cxx12__atomic_addEPVii@@GLIBCXX_3.4
+@@ -877,6 +881,7 @@
+ FUNC:_ZNSaIwEC2Ev@@GLIBCXX_3.4
+ FUNC:_ZNSaIwED1Ev@@GLIBCXX_3.4
+ FUNC:_ZNSaIwED2Ev@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE10_S_compareEjj@@GLIBCXX_3.4.16
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_Alloc_hiderC1EPwRKS1_@@GLIBCXX_3.4
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_Alloc_hiderC2EPwRKS1_@@GLIBCXX_3.4
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE12_M_leak_hardEv@@GLIBCXX_3.4
+@@ -961,6 +966,7 @@
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjRKS2_jj@@GLIBCXX_3.4
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7replaceEjjjw@@GLIBCXX_3.4
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE7reserveEj@@GLIBCXX_3.4
++FUNC:_ZNSbIwSt11char_traitsIwESaIwEE8pop_backEv@@GLIBCXX_3.4.17
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@@GLIBCXX_3.4.5
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_assignEPwjw@GLIBCXX_3.4
+ FUNC:_ZNSbIwSt11char_traitsIwESaIwEE9_M_mutateEjjj@@GLIBCXX_3.4
+@@ -1116,6 +1122,7 @@
+ FUNC:_ZNSolsEt@@GLIBCXX_3.4
+ FUNC:_ZNSolsEx@@GLIBCXX_3.4
+ FUNC:_ZNSolsEy@@GLIBCXX_3.4
++FUNC:_ZNSs10_S_compareEjj@@GLIBCXX_3.4.16
+ FUNC:_ZNSs12_Alloc_hiderC1EPcRKSaIcE@@GLIBCXX_3.4
+ FUNC:_ZNSs12_Alloc_hiderC2EPcRKSaIcE@@GLIBCXX_3.4
+ FUNC:_ZNSs12_M_leak_hardEv@@GLIBCXX_3.4
+@@ -1200,6 +1207,7 @@
+ FUNC:_ZNSs7replaceEjjRKSsjj@@GLIBCXX_3.4
+ FUNC:_ZNSs7replaceEjjjc@@GLIBCXX_3.4
+ FUNC:_ZNSs7reserveEj@@GLIBCXX_3.4
++FUNC:_ZNSs8pop_backEv@@GLIBCXX_3.4.17
+ FUNC:_ZNSs9_M_assignEPcjc@@GLIBCXX_3.4.5
+ FUNC:_ZNSs9_M_assignEPcjc@GLIBCXX_3.4
+ FUNC:_ZNSs9_M_mutateEjjj@@GLIBCXX_3.4
+@@ -1433,6 +1441,9 @@
+ FUNC:_ZNSt13__future_base12_Result_baseD0Ev@@GLIBCXX_3.4.15
+ FUNC:_ZNSt13__future_base12_Result_baseD1Ev@@GLIBCXX_3.4.15
+ FUNC:_ZNSt13__future_base12_Result_baseD2Ev@@GLIBCXX_3.4.15
++FUNC:_ZNSt13__future_base19_Async_state_commonD0Ev@@GLIBCXX_3.4.17
++FUNC:_ZNSt13__future_base19_Async_state_commonD1Ev@@GLIBCXX_3.4.17
++FUNC:_ZNSt13__future_base19_Async_state_commonD2Ev@@GLIBCXX_3.4.17
+ FUNC:_ZNSt13bad_exceptionD0Ev@@GLIBCXX_3.4
+ FUNC:_ZNSt13bad_exceptionD1Ev@@GLIBCXX_3.4
+ FUNC:_ZNSt13bad_exceptionD2Ev@@GLIBCXX_3.4
+@@ -1741,6 +1752,8 @@
+ FUNC:_ZNSt15__exception_ptrneERKNS_13exception_ptrES2_@@CXXABI_1.3.3
+ FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_gbumpEi@@GLIBCXX_3.4.16
++FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE12__safe_pbumpEi@@GLIBCXX_3.4.16
+ FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4setgEPcS3_S3_@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4setpEPcS3_@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEE4syncEv@@GLIBCXX_3.4
+@@ -1780,6 +1793,8 @@
+ FUNC:_ZNSt15basic_streambufIcSt11char_traitsIcEEaSERKS2_@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE10pubseekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_gbumpEi@@GLIBCXX_3.4.16
++FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE12__safe_pbumpEi@@GLIBCXX_3.4.16
+ FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4setgEPwS3_S3_@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4setpEPwS3_@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_streambufIwSt11char_traitsIwEE4syncEv@@GLIBCXX_3.4
+@@ -1824,6 +1839,7 @@
+ FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7_M_syncEPcjj@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8_M_pbumpEPcS4_x@@GLIBCXX_3.4.16
+ FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE8overflowEi@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9pbackfailEi@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIcSt11char_traitsIcESaIcEE9showmanycEv@@GLIBCXX_3.4.6
+@@ -1841,6 +1857,7 @@
+ FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7_M_syncEPwjj@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekoffExSt12_Ios_SeekdirSt13_Ios_Openmode@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE7seekposESt4fposI11__mbstate_tESt13_Ios_Openmode@@GLIBCXX_3.4
++FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8_M_pbumpEPwS4_x@@GLIBCXX_3.4.16
+ FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE8overflowEj@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9pbackfailEj@@GLIBCXX_3.4
+ FUNC:_ZNSt15basic_stringbufIwSt11char_traitsIwESaIwEE9showmanycEv@@GLIBCXX_3.4.6
+@@ -2145,6 +2162,7 @@
+ FUNC:_ZNSt6localeD2Ev@@GLIBCXX_3.4
+ FUNC:_ZNSt6localeaSERKS_@@GLIBCXX_3.4
+ FUNC:_ZNSt6thread15_M_start_threadESt10shared_ptrINS_10_Impl_baseEE@@GLIBCXX_3.4.11
++FUNC:_ZNSt6thread20hardware_concurrencyEv@@GLIBCXX_3.4.17
+ FUNC:_ZNSt6thread4joinEv@@GLIBCXX_3.4.11
+ FUNC:_ZNSt6thread6detachEv@@GLIBCXX_3.4.11
+ FUNC:_ZNSt7codecvtIcc11__mbstate_tEC1EP15__locale_structj@@GLIBCXX_3.4
+@@ -2640,14 +2658,17 @@
+ FUNC:_ZnwjRKSt9nothrow_t@@GLIBCXX_3.4
+ FUNC:__atomic_flag_for_address@@GLIBCXX_3.4.11
+ FUNC:__atomic_flag_wait_explicit@@GLIBCXX_3.4.11
++FUNC:__cxa_allocate_dependent_exception@@CXXABI_1.3.6
+ FUNC:__cxa_allocate_exception@@CXXABI_1.3
+ FUNC:__cxa_bad_cast@@CXXABI_1.3
+ FUNC:__cxa_bad_typeid@@CXXABI_1.3
+ FUNC:__cxa_begin_catch@@CXXABI_1.3
+ FUNC:__cxa_call_unexpected@@CXXABI_1.3
+ FUNC:__cxa_current_exception_type@@CXXABI_1.3
++FUNC:__cxa_deleted_virtual@@CXXABI_1.3.6
+ FUNC:__cxa_demangle@@CXXABI_1.3
+ FUNC:__cxa_end_catch@@CXXABI_1.3
++FUNC:__cxa_free_dependent_exception@@CXXABI_1.3.6
+ FUNC:__cxa_free_exception@@CXXABI_1.3
+ FUNC:__cxa_get_exception_ptr@@CXXABI_1.3.1
+ FUNC:__cxa_get_globals@@CXXABI_1.3
+@@ -2658,6 +2679,7 @@
+ FUNC:__cxa_pure_virtual@@CXXABI_1.3
+ FUNC:__cxa_rethrow@@CXXABI_1.3
+ FUNC:__cxa_throw@@CXXABI_1.3
++FUNC:__cxa_tm_cleanup@@CXXABI_TM_1
+ FUNC:__cxa_vec_cctor@@CXXABI_1.3
+ FUNC:__cxa_vec_cleanup@@CXXABI_1.3
+ FUNC:__cxa_vec_ctor@@CXXABI_1.3
+@@ -2701,7 +2723,9 @@
+ OBJECT:0:CXXABI_1.3.3
+ OBJECT:0:CXXABI_1.3.4
+ OBJECT:0:CXXABI_1.3.5
++OBJECT:0:CXXABI_1.3.6
+ OBJECT:0:CXXABI_LDBL_1.3
++OBJECT:0:CXXABI_TM_1
+ OBJECT:0:GLIBCXX_3.4
+ OBJECT:0:GLIBCXX_3.4.1
+ OBJECT:0:GLIBCXX_3.4.10
+@@ -2710,6 +2734,8 @@
+ OBJECT:0:GLIBCXX_3.4.13
+ OBJECT:0:GLIBCXX_3.4.14
+ OBJECT:0:GLIBCXX_3.4.15
++OBJECT:0:GLIBCXX_3.4.16
++OBJECT:0:GLIBCXX_3.4.17
+ OBJECT:0:GLIBCXX_3.4.2
+ OBJECT:0:GLIBCXX_3.4.3
+ OBJECT:0:GLIBCXX_3.4.4
+@@ -2737,6 +2763,7 @@
+ OBJECT:12:_ZTIN9__gnu_cxx13stdio_filebufIwSt11char_traitsIwEEE@@GLIBCXX_3.4
+ OBJECT:12:_ZTIN9__gnu_cxx18stdio_sync_filebufIcSt11char_traitsIcEEE@@GLIBCXX_3.4
+ OBJECT:12:_ZTIN9__gnu_cxx18stdio_sync_filebufIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:12:_ZTINSt13__future_base19_Async_state_commonE@@GLIBCXX_3.4.17
+ OBJECT:12:_ZTINSt17__gnu_cxx_ldbl1287num_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEEE@@GLIBCXX_LDBL_3.4
+ OBJECT:12:_ZTINSt17__gnu_cxx_ldbl1287num_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEEE@@GLIBCXX_LDBL_3.4
+ OBJECT:12:_ZTINSt17__gnu_cxx_ldbl1287num_putIcSt19ostreambuf_iteratorIcSt11char_traitsIcEEEE@@GLIBCXX_LDBL_3.4
+@@ -3245,6 +3272,7 @@
+ OBJECT:20:_ZTSSt15underflow_error@@GLIBCXX_3.4
+ OBJECT:20:_ZTVNSt13__future_base11_State_baseE@@GLIBCXX_3.4.15
+ OBJECT:20:_ZTVNSt13__future_base12_Result_baseE@@GLIBCXX_3.4.15
++OBJECT:20:_ZTVNSt13__future_base19_Async_state_commonE@@GLIBCXX_3.4.17
+ OBJECT:20:_ZTVNSt8ios_base7failureE@@GLIBCXX_3.4
+ OBJECT:20:_ZTVSt10bad_typeid@@GLIBCXX_3.4
+ OBJECT:20:_ZTVSt10lock_error@@GLIBCXX_3.4.11
+@@ -3437,6 +3465,7 @@
+ OBJECT:40:_ZTVSt19basic_ostringstreamIwSt11char_traitsIwESaIwEE@@GLIBCXX_3.4
+ OBJECT:40:_ZTVSt8time_getIcSt19istreambuf_iteratorIcSt11char_traitsIcEEE@@GLIBCXX_3.4
+ OBJECT:40:_ZTVSt8time_getIwSt19istreambuf_iteratorIwSt11char_traitsIwEEE@@GLIBCXX_3.4
++OBJECT:41:_ZTSNSt13__future_base19_Async_state_commonE@@GLIBCXX_3.4.17
+ OBJECT:41:_ZTSSt15basic_streambufIcSt11char_traitsIcEE@@GLIBCXX_3.4
+ OBJECT:41:_ZTSSt15basic_streambufIwSt11char_traitsIwEE@@GLIBCXX_3.4
+ OBJECT:44:_ZTVN10__cxxabiv117__class_type_infoE@@CXXABI_1.3
+Index: libiberty/ChangeLog
+===================================================================
+--- libiberty/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libiberty/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,8 @@
++2012-03-22 Jason Merrill <jason@redhat.com>
++
++ * cp-demangle.c (cplus_demangle_operators): Add li.
++ (d_unqualified_name): Handle it specially.
++
+ 2012-03-22 Release Manager
--/* Flag all the uses of U. */
--
--static void
--rdg_flag_all_uses (struct graph *rdg, int u, bitmap partition, bitmap loops,
-- bitmap processed, bool *part_has_writes)
--{
-- struct graph_edge *e;
--
-- for (e = rdg->vertices[u].succ; e; e = e->succ_next)
-- if (!bitmap_bit_p (processed, e->dest))
-- {
-- rdg_flag_vertex_and_dependent (rdg, e->dest, partition, loops,
-- processed, part_has_writes);
-- rdg_flag_all_uses (rdg, e->dest, partition, loops, processed,
-- part_has_writes);
-- }
--}
--
- /* Flag the uses of U stopping following the information from
- upstream_mem_writes. */
+ * GCC 4.7.0 released.
+Index: libiberty/testsuite/demangle-expected
+===================================================================
+--- libiberty/testsuite/demangle-expected (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libiberty/testsuite/demangle-expected (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -4073,6 +4073,8 @@
+ _Z2f1IiEDTnw_T_ilEES0_
+ decltype (new int{}) f1<int>(int)
+ --format=gnu-v3
++_Zli2_wPKc
++operator"" _w(char const*)
+ _Z1fIiEDTnw_Dapifp_EET_
+ decltype (new auto({parm#1})) f<int>(int)
+ --format=gnu-v3
+Index: libiberty/cp-demangle.c
+===================================================================
+--- libiberty/cp-demangle.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libiberty/cp-demangle.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1419,7 +1419,12 @@
-@@ -720,68 +671,13 @@
+ ret = d_operator_name (di);
+ if (ret != NULL && ret->type == DEMANGLE_COMPONENT_OPERATOR)
+- di->expansion += sizeof "operator" + ret->u.s_operator.op->len - 2;
++ {
++ di->expansion += sizeof "operator" + ret->u.s_operator.op->len - 2;
++ if (!strcmp (ret->u.s_operator.op->code, "li"))
++ ret = d_make_comp (di, DEMANGLE_COMPONENT_UNARY, ret,
++ d_source_name (di));
++ }
+ return ret;
}
- }
-
--/* Flag all the nodes of RDG containing memory accesses that could
-- potentially belong to arrays already accessed in the current
-- PARTITION. */
--
--static void
--rdg_flag_similar_memory_accesses (struct graph *rdg, bitmap partition,
-- bitmap loops, bitmap processed,
-- VEC (int, heap) **other_stores)
--{
-- bool foo;
-- unsigned i, n;
-- int j, k, kk;
-- bitmap_iterator ii;
-- struct graph_edge *e;
--
-- EXECUTE_IF_SET_IN_BITMAP (partition, 0, i, ii)
-- if (RDG_MEM_WRITE_STMT (rdg, i)
-- || RDG_MEM_READS_STMT (rdg, i))
-- {
-- for (j = 0; j < rdg->n_vertices; j++)
-- if (!bitmap_bit_p (processed, j)
-- && (RDG_MEM_WRITE_STMT (rdg, j)
-- || RDG_MEM_READS_STMT (rdg, j))
-- && rdg_has_similar_memory_accesses (rdg, i, j))
-- {
-- /* Flag first the node J itself, and all the nodes that
-- are needed to compute J. */
-- rdg_flag_vertex_and_dependent (rdg, j, partition, loops,
-- processed, &foo);
--
-- /* When J is a read, we want to coalesce in the same
-- PARTITION all the nodes that are using J: this is
-- needed for better cache locality. */
-- rdg_flag_all_uses (rdg, j, partition, loops, processed, &foo);
--
-- /* Remove from OTHER_STORES the vertex that we flagged. */
-- if (RDG_MEM_WRITE_STMT (rdg, j))
-- for (k = 0; VEC_iterate (int, *other_stores, k, kk); k++)
-- if (kk == j)
-- {
-- VEC_unordered_remove (int, *other_stores, k);
-- break;
-- }
-- }
--
-- /* If the node I has two uses, then keep these together in the
-- same PARTITION. */
-- for (n = 0, e = rdg->vertices[i].succ; e; e = e->succ_next, n++);
--
-- if (n > 1)
-- rdg_flag_all_uses (rdg, i, partition, loops, processed, &foo);
-- }
--}
--
- /* Returns a bitmap in which all the statements needed for computing
- the strongly connected component C of the RDG are flagged, also
- including the loop exit conditions. */
-
- static bitmap
- build_rdg_partition_for_component (struct graph *rdg, rdgc c,
-- bool *part_has_writes,
-- VEC (int, heap) **other_stores)
-+ bool *part_has_writes)
- {
- int i, v;
- bitmap partition = BITMAP_ALLOC (NULL);
-@@ -793,13 +689,6 @@
- rdg_flag_vertex_and_dependent (rdg, v, partition, loops, processed,
- part_has_writes);
-
-- /* Also iterate on the array of stores not in the starting vertices,
-- and determine those vertices that have some memory affinity with
-- the current nodes in the component: these are stores to the same
-- arrays, i.e. we're taking care of cache locality. */
-- rdg_flag_similar_memory_accesses (rdg, partition, loops, processed,
-- other_stores);
--
- rdg_flag_loop_exits (rdg, loops, partition, processed, part_has_writes);
-
- BITMAP_FREE (processed);
-@@ -863,6 +752,79 @@
- BITMAP_FREE (saved_components);
- }
-
-+/* Returns true when it is possible to generate a builtin pattern for
-+ the PARTITION of RDG. For the moment we detect only the memset
-+ zero pattern. */
+ else if (peek == 'C' || peek == 'D')
+@@ -1596,6 +1601,7 @@
+ { "ix", NL ("[]"), 2 },
+ { "lS", NL ("<<="), 2 },
+ { "le", NL ("<="), 2 },
++ { "li", NL ("operator\"\" "), 1 },
+ { "ls", NL ("<<"), 2 },
+ { "lt", NL ("<"), 2 },
+ { "mI", NL ("-="), 2 },
+Index: libgcc/ChangeLog
+===================================================================
+--- libgcc/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libgcc/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,30 @@
++2012-03-22 Georg-Johann Lay <avr@gjlay.de>
+
-+static bool
-+can_generate_builtin (struct graph *rdg, bitmap partition)
-+{
-+ unsigned i;
-+ bitmap_iterator bi;
-+ int nb_reads = 0;
-+ int nb_writes = 0;
-+ int stores_zero = 0;
-+
-+ EXECUTE_IF_SET_IN_BITMAP (partition, 0, i, bi)
-+ if (RDG_MEM_READS_STMT (rdg, i))
-+ nb_reads++;
-+ else if (RDG_MEM_WRITE_STMT (rdg, i))
-+ {
-+ nb_writes++;
-+ if (stmt_with_adjacent_zero_store_dr_p (RDG_STMT (rdg, i)))
-+ stores_zero++;
-+ }
++ Backport from 2012-03-07 mainline r185033.
+
-+ return stores_zero == 1 && nb_writes == 1 && nb_reads == 0;
-+}
++ PR target/52507
++ * config/avr/lib1funcs.S (__movmemx_hi): Fix loop label in RAM-part.
+
-+/* Returns true when PARTITION1 and PARTITION2 have similar memory
-+ accesses in RDG. */
++ Backport from 2012-03-07 mainline r185031.
+
-+static bool
-+similar_memory_accesses (struct graph *rdg, bitmap partition1,
-+ bitmap partition2)
-+{
-+ unsigned i, j;
-+ bitmap_iterator bi, bj;
-+
-+ EXECUTE_IF_SET_IN_BITMAP (partition1, 0, i, bi)
-+ if (RDG_MEM_WRITE_STMT (rdg, i)
-+ || RDG_MEM_READS_STMT (rdg, i))
-+ EXECUTE_IF_SET_IN_BITMAP (partition2, 0, j, bj)
-+ if (RDG_MEM_WRITE_STMT (rdg, j)
-+ || RDG_MEM_READS_STMT (rdg, j))
-+ if (rdg_has_similar_memory_accesses (rdg, i, j))
-+ return true;
-+
-+ return false;
-+}
++ PR target/52505
++ * config/avr/lib1funcs.S (__xload_1): Don't read unintentionally
++ from RAM.
+
-+/* Fuse all the partitions from PARTITIONS that contain similar memory
-+ references, i.e., we're taking care of cache locality. This
-+ function does not fuse those partitions that contain patterns that
-+ can be code generated with builtins. */
++ Backport from 2012-03-07 mainline r185030.
+
-+static void
-+fuse_partitions_with_similar_memory_accesses (struct graph *rdg,
-+ VEC (bitmap, heap) **partitions)
-+{
-+ int p1, p2;
-+ bitmap partition1, partition2;
-+
-+ for (p1 = 0; VEC_iterate (bitmap, *partitions, p1, partition1); p1++)
-+ if (!can_generate_builtin (rdg, partition1))
-+ for (p2 = 0; VEC_iterate (bitmap, *partitions, p2, partition2); p2++)
-+ if (p1 != p2
-+ && !can_generate_builtin (rdg, partition2)
-+ && similar_memory_accesses (rdg, partition1, partition2))
-+ {
-+ bitmap_ior_into (partition1, partition2);
-+ VEC_ordered_remove (bitmap, *partitions, p2);
-+ p2--;
-+ }
-+}
++ PR target/52461
++ PR target/52508
++ * config/avr/lib1funcs.S (__do_copy_data): Clear RAMPZ after usage
++ if RAMPZ affects reading from RAM.
++ (__tablejump_elpm__): Ditto.
++ (.xload): Ditto.
++ (__movmemx_hi): Ditto.
++ (__do_global_ctors): Right condition for RAMPZ usage is "have ELPM".
++ (__do_global_dtors): Ditto.
++ (__xload_1, __xload_2, __xload_3, __xload_4): Ditto.
++ (__movmemx_hi): Ditto.
+
- /* Aggregate several components into a useful partition that is
- registered in the PARTITIONS vector. Partitions will be
- distributed in different loops. */
-@@ -885,8 +847,7 @@
- if (bitmap_bit_p (processed, v))
- continue;
-
-- np = build_rdg_partition_for_component (rdg, x, &part_has_writes,
-- other_stores);
-+ np = build_rdg_partition_for_component (rdg, x, &part_has_writes);
- bitmap_ior_into (partition, np);
- bitmap_ior_into (processed, np);
- BITMAP_FREE (np);
-@@ -932,6 +893,8 @@
- VEC_safe_push (bitmap, heap, *partitions, partition);
- else
- BITMAP_FREE (partition);
-+
-+ fuse_partitions_with_similar_memory_accesses (rdg, partitions);
- }
+ 2012-03-22 Release Manager
+
+ * GCC 4.7.0 released.
+Index: libgcc/config/avr/lib1funcs.S
+===================================================================
+--- libgcc/config/avr/lib1funcs.S (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libgcc/config/avr/lib1funcs.S (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1893,6 +1893,10 @@
+ cpc r27, r17
+ brne .L__do_copy_data_loop
+ #endif /* !defined(__AVR_HAVE_ELPMX__) && !defined(__AVR_HAVE_ELPM__) */
++#if defined (__AVR_HAVE_ELPM__) && defined (__AVR_HAVE_RAMPD__)
++ ;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
++ out __RAMPZ__, __zero_reg__
++#endif /* ELPM && RAMPD */
+ ENDF __do_copy_data
+ #endif /* L_copy_data */
+
+@@ -1920,7 +1924,7 @@
+ #ifdef L_ctors
+ .section .init6,"ax",@progbits
+ DEFUN __do_global_ctors
+-#if defined(__AVR_HAVE_RAMPZ__)
++#if defined(__AVR_HAVE_ELPM__)
+ ldi r17, hi8(__ctors_start)
+ ldi r28, lo8(__ctors_end)
+ ldi r29, hi8(__ctors_end)
+@@ -1953,14 +1957,14 @@
+ cpi r28, lo8(__ctors_start)
+ cpc r29, r17
+ brne .L__do_global_ctors_loop
+-#endif /* defined(__AVR_HAVE_RAMPZ__) */
++#endif /* defined(__AVR_HAVE_ELPM__) */
+ ENDF __do_global_ctors
+ #endif /* L_ctors */
+
+ #ifdef L_dtors
+ .section .fini6,"ax",@progbits
+ DEFUN __do_global_dtors
+-#if defined(__AVR_HAVE_RAMPZ__)
++#if defined(__AVR_HAVE_ELPM__)
+ ldi r17, hi8(__dtors_end)
+ ldi r28, lo8(__dtors_start)
+ ldi r29, hi8(__dtors_start)
+@@ -1993,7 +1997,7 @@
+ cpi r28, lo8(__dtors_end)
+ cpc r29, r17
+ brne .L__do_global_dtors_loop
+-#endif /* defined(__AVR_HAVE_RAMPZ__) */
++#endif /* defined(__AVR_HAVE_ELPM__) */
+ ENDF __do_global_dtors
+ #endif /* L_dtors */
+
+@@ -2001,18 +2005,21 @@
+
+ #ifdef L_tablejump_elpm
+ DEFUN __tablejump_elpm__
+-#if defined (__AVR_HAVE_ELPM__)
+-#if defined (__AVR_HAVE_LPMX__)
++#if defined (__AVR_HAVE_ELPMX__)
+ elpm __tmp_reg__, Z+
+ elpm r31, Z
+ mov r30, __tmp_reg__
++#if defined (__AVR_HAVE_RAMPD__)
++ ;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
++ out __RAMPZ__, __zero_reg__
++#endif /* RAMPD */
+ #if defined (__AVR_HAVE_EIJMP_EICALL__)
+ eijmp
+ #else
+ ijmp
+ #endif
+
+-#else
++#elif defined (__AVR_HAVE_ELPM__)
+ elpm
+ adiw r30, 1
+ push r0
+@@ -2024,7 +2031,6 @@
+ #endif
+ ret
+ #endif
+-#endif /* defined (__AVR_HAVE_ELPM__) */
+ ENDF __tablejump_elpm__
+ #endif /* defined (L_tablejump_elpm) */
+
+@@ -2114,11 +2120,18 @@
+ adiw r30, 1
+ .endif
+ #endif
++#if defined (__AVR_HAVE_ELPM__) && defined (__AVR_HAVE_RAMPD__)
++.if \dest == D0+\n-1
++ ;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
++ out __RAMPZ__, __zero_reg__
++.endif
++#endif
+ .endm ; .xload
+
+ #if defined (L_xload_1)
+ DEFUN __xload_1
+-#if defined (__AVR_HAVE_LPMX__) && !defined (__AVR_HAVE_RAMPZ__)
++#if defined (__AVR_HAVE_LPMX__) && !defined (__AVR_HAVE_ELPM__)
++ sbrc HHI8, 7
+ ld D0, Z
+ sbrs HHI8, 7
+ lpm D0, Z
+@@ -2126,14 +2139,14 @@
+ #else
+ sbrc HHI8, 7
+ rjmp 1f
+-#if defined (__AVR_HAVE_RAMPZ__)
++#if defined (__AVR_HAVE_ELPM__)
+ out __RAMPZ__, HHI8
+-#endif /* __AVR_HAVE_RAMPZ__ */
++#endif /* __AVR_HAVE_ELPM__ */
+ .xload D0, 1
+ ret
+ 1: ld D0, Z
+ ret
+-#endif /* LPMx && ! RAMPZ */
++#endif /* LPMx && ! ELPM */
+ ENDF __xload_1
+ #endif /* L_xload_1 */
+
+@@ -2141,9 +2154,9 @@
+ DEFUN __xload_2
+ sbrc HHI8, 7
+ rjmp 1f
+-#if defined (__AVR_HAVE_RAMPZ__)
++#if defined (__AVR_HAVE_ELPM__)
+ out __RAMPZ__, HHI8
+-#endif /* __AVR_HAVE_RAMPZ__ */
++#endif /* __AVR_HAVE_ELPM__ */
+ .xload D0, 2
+ .xload D1, 2
+ ret
+@@ -2157,9 +2170,9 @@
+ DEFUN __xload_3
+ sbrc HHI8, 7
+ rjmp 1f
+-#if defined (__AVR_HAVE_RAMPZ__)
++#if defined (__AVR_HAVE_ELPM__)
+ out __RAMPZ__, HHI8
+-#endif /* __AVR_HAVE_RAMPZ__ */
++#endif /* __AVR_HAVE_ELPM__ */
+ .xload D0, 3
+ .xload D1, 3
+ .xload D2, 3
+@@ -2175,9 +2188,9 @@
+ DEFUN __xload_4
+ sbrc HHI8, 7
+ rjmp 1f
+-#if defined (__AVR_HAVE_RAMPZ__)
++#if defined (__AVR_HAVE_ELPM__)
+ out __RAMPZ__, HHI8
+-#endif /* __AVR_HAVE_RAMPZ__ */
++#endif /* __AVR_HAVE_ELPM__ */
+ .xload D0, 4
+ .xload D1, 4
+ .xload D2, 4
+@@ -2219,7 +2232,7 @@
+
+ ;; Read from Flash
+
+-#if defined (__AVR_HAVE_RAMPZ__)
++#if defined (__AVR_HAVE_ELPM__)
+ out __RAMPZ__, HHI8
+ #endif
+
+@@ -2243,6 +2256,10 @@
+ st X+, r0
+ sbiw LOOP, 1
+ brne 0b
++#if defined (__AVR_HAVE_ELPM__) && defined (__AVR_HAVE_RAMPD__)
++ ;; Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM
++ out __RAMPZ__, __zero_reg__
++#endif /* ELPM && RAMPD */
+ ret
+
+ ;; Read from RAM
+@@ -2252,7 +2269,7 @@
+ ;; and store that Byte to RAM Destination
+ st X+, r0
+ sbiw LOOP, 1
+- brne 0b
++ brne 1b
+ ret
+ ENDF __movmemx_hi
+
+Index: gcc/c-family/ChangeLog
+===================================================================
+--- gcc/c-family/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/c-family/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,8 @@
++2012-03-23 William Bader <williambader@hotmail.com>
++
++ PR c/52682
++ * c-lex.c (c_lex_with_flags): Avoid declarations after stmts.
++
+ 2012-03-22 Release Manager
- /* Dump to FILE the PARTITIONS. */
+ * GCC 4.7.0 released.
+Index: gcc/c-family/c-lex.c
+===================================================================
+--- gcc/c-family/c-lex.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/c-family/c-lex.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -342,6 +342,8 @@
+
+ if (flags & CPP_N_USERDEF)
+ {
++ char *str;
++ tree literal;
+ tree suffix_id = get_identifier (suffix);
+ int len = tok->val.str.len - strlen (suffix);
+ /* If this is going to be used as a C string to pass to a
+@@ -350,9 +352,9 @@
+ (const char *) tok->val.str.text);
+ TREE_TYPE (num_string) = char_array_type_node;
+ num_string = fix_string_type (num_string);
+- char *str = CONST_CAST (char *, TREE_STRING_POINTER (num_string));
++ str = CONST_CAST (char *, TREE_STRING_POINTER (num_string));
+ str[len] = '\0';
+- tree literal = build_userdef_literal (suffix_id, *value,
++ literal = build_userdef_literal (suffix_id, *value,
+ num_string);
+ *value = literal;
+ }
Index: gcc/DATESTAMP
===================================================================
---- gcc/DATESTAMP (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/DATESTAMP (.../branches/gcc-4_5-branch) (wersja 168599)
+--- gcc/DATESTAMP (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/DATESTAMP (.../branches/gcc-4_7-branch) (wersja 185750)
@@ -1 +1 @@
--20101216
-+20110108
+-20120322
++20120323
Index: gcc/DEV-PHASE
===================================================================
---- gcc/DEV-PHASE (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/DEV-PHASE (.../branches/gcc-4_5-branch) (wersja 168599)
+--- gcc/DEV-PHASE (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/DEV-PHASE (.../branches/gcc-4_7-branch) (wersja 185750)
@@ -0,0 +1 @@
+prerelease
-Index: gcc/tree-ssa-sccvn.c
-===================================================================
---- gcc/tree-ssa-sccvn.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/tree-ssa-sccvn.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1063,6 +1063,7 @@
- size2 = TREE_INT_CST_LOW (gimple_call_arg (def_stmt, 2)) * 8;
- if ((unsigned HOST_WIDE_INT)size2 / 8
- == TREE_INT_CST_LOW (gimple_call_arg (def_stmt, 2))
-+ && maxsize2 != -1
- && operand_equal_p (base, base2, 0)
- && offset2 <= offset
- && offset2 + size2 >= offset + maxsize)
-@@ -1086,7 +1087,8 @@
- HOST_WIDE_INT offset2, size2, maxsize2;
- base2 = get_ref_base_and_extent (gimple_assign_lhs (def_stmt),
- &offset2, &size2, &maxsize2);
-- if (operand_equal_p (base, base2, 0)
-+ if (maxsize2 != -1
-+ && operand_equal_p (base, base2, 0)
- && offset2 <= offset
- && offset2 + size2 >= offset + maxsize)
- {
-@@ -1116,7 +1118,8 @@
- /* See if the assignment kills REF. */
- base2 = get_ref_base_and_extent (gimple_assign_lhs (def_stmt),
- &offset2, &size2, &maxsize2);
-- if (!operand_equal_p (base, base2, 0)
-+ if (maxsize2 == -1
-+ || !operand_equal_p (base, base2, 0)
- || offset2 > offset
- || offset2 + size2 < offset + maxsize)
- return (void *)-1;
Index: gcc/ChangeLog
===================================================================
---- gcc/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,157 @@
-+2011-01-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+--- gcc/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,173 @@
++2012-03-23 Michael Meissner <meissner@linux.vnet.ibm.com>
++
++ Backported from mainline
++ 2012-03-06 Michael Meissner <meissner@linux.vnet.ibm.com>
++
++ PR target/50310
++ * config/rs6000/vector.md (vector_uneq<mode>): Add support for
++ UNEQ, LTGT, ORDERED, and UNORDERED IEEE vector comparisons.
++ (vector_ltgt<mode>): Likewise.
++ (vector_ordered<mode>): Likewise.
++ (vector_unordered<mode>): Likewise.
++ * config/rs6000/rs6000.c (rs6000_emit_vector_compare_inner): Likewise.
++
++2012-03-23 Joern Rennecke <joern.rennecke@embecosm.com>
++
++ * config/epiphany/epiphany.c (epiphany_function_value_regno_p):
++ Make static.
++
++2012-03-22 Kaz Kojima <kkojima@gcc.gnu.org>
++
++ Backported from mainline
++ 2012-03-02 Kaz Kojima <kkojima@gcc.gnu.org>
++
++ PR target/48596
++ PR target/48806
++ * config/sh/sh.c (sh_register_move_cost): Increase cost between
++ GENERAL_REGS and FP_REGS for SImode.
++
++2012-03-22 Jakub Jelinek <jakub@redhat.com>
++
++ PR middle-end/52547
++ * tree-nested.c (convert_tramp_reference_stmt): Call declare_vars
++ on any new_local_var_chain vars declared during recursing on
++ GIMPLE_OMP_PARALLEL or GIMPLE_OMP_TASK body.
++
++2012-03-22 Georg-Johann Lay <avr@gjlay.de>
++
++ Backport from 2012-03-22 mainline r185692.
++
++ PR target/52496
++ * config/avr/avr.md (unspec): Remove UNSPEC_MEMORY_BARRIER.
++ (unspecv): Add UNSPECV_MEMORY_BARRIER.
++ (cli_sei): Use unspec_volatile instead of unspec for memory barrier.
++ (delay_cycles_1, delay_cycles_2): Ditto.
++ (delay_cycles_3, delay_cycles_4): Ditto.
++ (nopv, *nopv): Ditto.
++ (sleep, *sleep): Ditto.
++ (wdr, *wdr): Ditto.
++
++ Backport from 2012-03-21 mainline r185605.
++
++ PR rtl-optimization/52543
++ PR target/52461
++ * config/avr/avr-protos.h (avr_load_lpm): New prototype.
++ * config/avr/avr.c (avr_mode_dependent_address_p): New function.
++ (TARGET_MODE_DEPENDENT_ADDRESS_P): New define.
++ (avr_load_libgcc_p): Restrict to __flash loads.
++ (avr_out_lpm): Only handle 1-byte loads from __flash.
++ (avr_load_lpm): New function.
++ (avr_find_unused_d_reg): Remove.
++ (avr_out_lpm_no_lpmx): Remove.
++ (adjust_insn_length): Handle ADJUST_LEN_LOAD_LPM.
++ * config/avr/avr.md (unspec): Add UNSPEC_LPM.
++ (load_<mode>_libgcc): Use UNSPEC_LPM instead of MEM.
++ (load_<mode>, load_<mode>_clobber): New insns.
++ (mov<mode>): For multi-byte move from non-generic
++ 16-bit address spaces: Expand to load_<mode> resp.
++ load_<mode>_clobber.
++ (load<mode>_libgcc): Remove expander.
++ (split-lpmx): Remove split.
+
-+ Backport from mainline:
-+ 2011-01-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
++ Backport from 2012-03-13 mainline r185329.
+
-+ PR target/43309
-+ * config/i386/i386.c (legitimize_tls_address)
-+ <TLS_MODEL_INITIAL_EXEC>: Handle TARGET_64BIT && TARGET_SUN_TLS.
-+ * config/i386/i386.md (UNSPEC_TLS_IE_SUN): Declare.
-+ (tls_initial_exec_64_sun): New pattern.
++ PR target/52488
++ * config/avr/avr.c (avr_prologue_setup_frame): Cut down stack
++ offset (size) to a value the insns can deal with.
++ (expand_epilogue): Ditto.
+
-+2011-01-03 Eric Botcazou <ebotcazou@adacore.com>
++ Backport from 2012-03-12 mainline r185256.
+
-+ Backport from mainline
-+ 2010-12-30 Eric Botcazou <ebotcazou@adacore.com>
++ PR target/52499
++ * config/avr/avr.c (avr_mode_code_base_reg_class): Change return
++ type from reg_class_t to enum reg_class.
++ * config/avr/avr-protos.h (avr_mode_code_base_reg_class): Ditto.
+
-+ PR target/47038
-+ * config/sparc/sparc.c (sparc_file_end): Call resolve_unique_section
-+ on the GOT helper if USE_HIDDEN_LINKONCE.
++ Backport from 2012-03-12 mainline r185253.
+
-+ 2010-12-02 Eric Botcazou <ebotcazou@adacore.com>
++ PR target/52148
++ * config/avr/avr.c (avr_out_movmem): Fix typo in output template
++ for the case ADDR_SPACE_FLASH and AVR_HAVE_LPMX introduced in
++ r184615 from 2012-02-28.
+
-+ PR target/46685
-+ * config/sparc/sparc.c (can_use_mov_pic_label_ref): New predicate.
-+ (sparc_expand_move): Call it to decide whether to emit the special
-+ mov{si,di}_pic_label_ref patterns.
-+ (sparc_legitimize_pic_address): Call it to decide whether to emit
-+ the regular PIC sequence for labels. Fix long line.
-+ (sparc_file_end): Set is_thunk for the PIC helper.
++ Backport from 2012-03-08 mainline r185105.
+
-+2010-12-30 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
++ * config/avr/avr.md (*addhi3, addhi3_clobber): Add "w" alternative
++ for constants in [-63,63].
+
-+ * config/pa/pa.md: Add ",*" condition to 64-bit add/subtract boolean
-+ patterns.
++ Backport from 2012-03-08 mainline r185100.
+
-+2010-12-27 Yao Qi <yao@codesourcery.com>
++ PR target/52496
++ * config/avr/avr.c (avr_mem_clobber): New static function.
++ (avr_expand_delay_cycles): Add memory clobber operand to
++ delay_cycles_1, delay_cycles_2, delay_cycles_3, delay_cycles_4.
++ * config/avr/avr.md (unspec): Add UNSPEC_MEMORY_BARRIER.
++ (enable_interrupt, disable_interrupt): New expander.
++ (nopv, sleep, wdr): New expanders.
++ (delay_cycles_1): Add memory clobber.
++ (delay_cycles_2): Add memory clobber.
++ (delay_cycles_3): Add memory clobber.
++ (delay_cycles_4): Add memory clobber.
++ (cli_sei): New insn from former "enable_interrupt",
++ "disable_interrupt" with memory clobber.
++ (*wdt): New insn from former "wdt" with memory clobber.
++ (*nopv): Similar, but for "nopv".
++ (*sleep): Similar, but for "sleep".
+
-+ Backport from mainline:
-+ 2010-10-14 Yao Qi <yao@codesourcery.com>
-+
-+ PR target/45447
-+ * config/arm/arm.c (arm_build_builtin_va_list): Assign
-+ va_list_name to TYPE_STUB_DECL (va_list_type).
-+
-+2010-12-23 Sebastian Pop <sebastian.pop@amd.com>
-+ Richard Guenther <rguenther@suse.de>
-+
-+ PR tree-optimization/46758
-+ * graphite-sese-to-poly.c (scan_tree_for_params_right_scev): Use
-+ tree_int_to_gmp instead of int_cst_value.
-+ (scan_tree_for_params_int): Same.
-+ (scan_tree_for_params): Same.
-+ (pdr_add_data_dimensions): Use ppl_set_inhomogeneous_tree.
-+
-+2010-12-23 Sebastian Pop <sebastian.pop@amd.com>
-+
-+ Backport from mainline
-+ Fix PR45758: reset scevs before Graphite.
-+ 2010-09-24 Sebastian Pop <sebastian.pop@amd.com>
-+
-+ PR tree-optimization/45552
-+ * graphite.c (graphite_initialize): Call scev_reset.
-+
-+2010-12-23 Sebastian Pop <sebastian.pop@amd.com>
-+
-+ PR tree-optimization/43023
-+ * tree-data-ref.c (mem_write_stride_of_same_size_as_unit_type_p):
-+ Removed.
-+ (stores_zero_from_loop): Call stmt_stores_zero.
-+ (stmt_with_adjacent_zero_store_dr_p): New.
-+ * tree-data-ref.h (stmt_with_adjacent_zero_store_dr_p): Declared.
-+ (stride_of_unit_type_p): New.
-+ * tree-loop-distribution.c (generate_memset_zero): Do not return a
-+ boolean. Call gcc_assert on stride_of_unit_type_p.
-+ (generate_builtin): Call stmt_stores_zero.
-+ (rdg_flag_all_uses): Removed.
-+ (rdg_flag_similar_memory_accesses): Removed.
-+ (build_rdg_partition_for_component): Removed parameter
-+ other_stores. Removed call to rdg_flag_similar_memory_accesses.
-+ (can_generate_builtin): New.
-+ (similar_memory_accesses): New.
-+ (fuse_partitions_with_similar_memory_accesses): New.
-+ (rdg_build_partitions): Call
-+ fuse_partitions_with_similar_memory_accesses.
-+
-+2010-12-21 Martin Jambor <mjambor@suse.cz>
++ Backport from 2012-03-07 mainline r185043.
+
-+ Backport from mainline:
-+ 2010-12-09 Martin Jambor <mjambor@suse.cz>
++ PR target/52484
++ * config/avr/avr.md (xload<mode>_A): Add R22... to register footprint.
+
-+ PR middle-end/46734
-+ * tree-sra.c (splice_param_accesses): Check that there are not
-+ multiple ADDRESSABLE types.
++ Backport from 2012-03-07 mainline r185032.
+
-+2010-12-19 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
++ PR target/52506
++ * gcc/config/avr/avr.c (expand_epilogue): Fix order of restoration
++ to: RAMPZ, RAMPY, RAMPX, RAMPD.
++ (expand_prologue): Only clear RAMPZ if it has effect on RAM-read.
+
-+ Backport from mainline:
-+ 2010-12-18 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
-+
-+ PR target/46915
-+ * config/pa/pa.c (branch_to_delay_slot_p): Use next_active_insn instead
-+ of next_real_insn. Search forward checking for both ASM_INPUT and
-+ ASM_OPERANDS asms until exit condition is found.
-+ (branch_needs_nop_p): Likewise.
-+ (use_skip_p): New function.
-+ (output_cbranch): Use use_skip_p.
-+ (output_bb, output_bvb): Likewise.
-+
-+2010-12-19 Eric Botcazou <ebotcazou@adacore.com>
-+
-+ PR target/46729
-+ * config/sparc/sparc.h (GLOBAL_OFFSET_TABLE_REGNUM): New macro.
-+ (PIC_OFFSET_TABLE_REGNUM): Rewrite in terms of above macro.
-+ * config/sparc/sparc.c (pic_helper_needed): Delete.
-+ (global_offset_table): Likewise.
-+ (pic_helper_symbol): Rename to...
-+ (got_helper_rtx): ...this.
-+ (global_offset_table_rtx): New global variable.
-+ (sparc_got_symbol): Likewise.
-+ (sparc_got): New static function.
-+ (check_pic): Use local variable and call sparc_got.
-+ (sparc_tls_symbol): Initialize to NULL_RTX.
-+ (sparc_tls_got): In non-PIC mode, reload the GOT register for Sun TLS
-+ and 32-bit ABI and copy the GOT symbol to a new register otherwise.
-+ (get_pc_thunk_name): Rename local variable.
-+ (gen_load_pcrel_sym): New wrapper around load_pcrel_sym{si,di}.
-+ (load_pic_register): Rename to...
-+ (load_got_register): ...this. Adjust and call gen_load_pcrel_sym.
-+ (sparc_expand_prologue): Do not test flag_pic.
-+ (sparc_output_mi_thunk): Use pic_offset_table_rtx directly.
-+ (sparc_file_end): Test got_helper_rtx instead of pic_helper_needed.
-+ Rename local variable and do not call get_pc_thunk_name again.
-+ * config/sparc/sparc.md (load_pcrel_sym): Add operand #3.
-+
-+2010-12-18 Alexandre Oliva <aoliva@redhat.com>
-+
-+ PR debug/46756
-+ * jump.c (mark_all_labels): Skip debug insns.
-+
-+2010-12-18 Alexandre Oliva <aoliva@redhat.com>
-+
-+ PR debug/46782
-+ * cfgcleanup.c (try_forward_edges): Skip debug insns.
-+
-+2010-12-16 Eric Botcazou <ebotcazou@adacore.com>
-+
-+ * tree-ssa-sccvn.c (vn_reference_lookup_3): Always punt if the call to
-+ get_ref_base_and_extent returns -1 as the max size.
-+
-+2010-12-16 Richard Guenther <rguenther@suse.de>
-+
-+ * DEV-PHASE: Set back to prerelease.
-+ * BASE-VER: Bump to 4.5.3.
-+
- 2010-12-16 Release Manager
-
- * GCC 4.5.2 released.
-Index: gcc/testsuite/gcc.target/arm/pr45447.c
-===================================================================
---- gcc/testsuite/gcc.target/arm/pr45447.c (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gcc.target/arm/pr45447.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,3 @@
-+/* { dg-do compile } */
-+/* { dg-options "-g -femit-struct-debug-baseonly" } */
-+typedef __builtin_va_list x;
-Index: gcc/testsuite/gnat.dg/opt13.adb
-===================================================================
---- gcc/testsuite/gnat.dg/opt13.adb (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gnat.dg/opt13.adb (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,13 @@
-+-- { dg-do run }
-+-- { dg-options "-O" }
-+
-+with Opt13_Pkg; use Opt13_Pkg;
-+
-+procedure Opt13 is
-+ T : My_Type;
-+begin
-+ Allocate (T);
-+ if N /= 1 then
-+ raise Program_Error;
-+ end if;
-+end;
-Index: gcc/testsuite/gnat.dg/opt13_pkg.adb
-===================================================================
---- gcc/testsuite/gnat.dg/opt13_pkg.adb (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gnat.dg/opt13_pkg.adb (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,31 @@
-+package body Opt13_Pkg is
++ Backport from 2012-03-07 mainline r185031.
++
++ PR target/52505
++ * config/avr/avr.c (avr_out_xload): Don't read unintentionally
++ from RAM.
++ * config/avr/avr.md (xload_8): Adjust insn length.
++
++ Backport from 2012-03-07 mainline r185030.
++
++ PR target/52461
++ * gcc/config/avr/avr.c (avr_out_lpm): Clear RAMPZ after usage
++ if RAMPZ affects reading from RAM.
++
++ Backport from 2012-03-05 mainline r184919.
++
++ * config/avr/avr.md (*umaddqihi4.2): New insn-and-split.
+
-+ subtype Index_Type is Natural range 0 .. 16;
++2012-03-22 Georg-Johann Lay <avr@gjlay.de>
+
-+ type Arr is array (Index_Type range <>) of Integer;
++ Backport from mainline r185259.
+
-+ type Rec is record
-+ F1, F2, F3 : Float;
-+ N : Natural;
-+ B1, B2 : Boolean;
-+ F4 : Float;
-+ end record;
++ PR other/52545
++ * output.h (SECTION_EXCLUDE, SECTION_MACH_DEP): Don't use
++ SECTION_MACH_DEP reserved bits for SECTION_EXCLUDE.
+
-+ type Data (D : Index_Type) is record
-+ A : Arr (1 .. D);
-+ R : Rec;
-+ end record;
++2012-03-22 Jakub Jelinek <jakub@redhat.com>
+
-+ Zero : constant Rec := (0.0, 0.0, 0.0, 0, False, False, 0.0);
++ Backported from mainline
++ 2012-03-13 Jakub Jelinek <jakub@redhat.com>
++
++ PR c/52577
++ * c-parser.c (c_parser_postfix_expression)
++ <case RID_BUILTIN_SHUFFLE>: Call mark_exp_read on argument values.
+
-+ procedure Allocate (T : out My_Type) is
-+ begin
-+ T := new Data (Index_Type'last);
-+ T.R := Zero;
++ * config/i386/smmintrin.h: Avoid /* within a comment.
++ * config/i386/nmmintrin.h: Likewise.
+
-+ for I in 1 .. T.A'last loop
-+ N := 1;
-+ end loop;
-+ end;
++2012-03-22 Richard Guenther <rguenther@suse.de>
+
-+end Opt13_Pkg;
-Index: gcc/testsuite/gnat.dg/opt13_pkg.ads
++ * BASE-VER: Set to 4.7.1.
++ * DEV-PHASE: Set to prerelease.
++
+ 2012-03-22 Release Manager
+
+ * GCC 4.7.0 released.
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-1-0.c
===================================================================
---- gcc/testsuite/gnat.dg/opt13_pkg.ads (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gnat.dg/opt13_pkg.ads (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,15 @@
-+package Opt13_Pkg is
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-1-0.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-1-0.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,6 @@
++/* { dg-options "-std=gnu99" } */
++/* { dg-do run } */
++
++#define __as __flash
+
-+ N : Natural := 0;
++#include "addr-space-1.h"
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-1-1.c
+===================================================================
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-1-1.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-1-1.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,6 @@
++/* { dg-options "-std=gnu99 -Tavr51-flash1.x" } */
++/* { dg-do run } */
+
-+ type My_Type is private;
++#define __as __flash1
+
-+ procedure Allocate (T : out My_Type);
++#include "addr-space-1.h"
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-2-0.c
+===================================================================
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-2-0.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-2-0.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,6 @@
++/* { dg-options "-std=gnu99" } */
++/* { dg-do run } */
+
-+private
++#define __as __flash
+
-+ type Data;
++#include "addr-space-2.h"
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-2-1.c
+===================================================================
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-2-1.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-2-1.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,6 @@
++/* { dg-options "-std=gnu99 -Tavr51-flash1.x" } */
++/* { dg-do run } */
+
-+ type My_Type is access Data;
++#define __as __flash1
+
-+end Opt13_Pkg;
-Index: gcc/testsuite/gcc.dg/debug/pr46782.c
++#include "addr-space-2.h"
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-1-x.c
===================================================================
---- gcc/testsuite/gcc.dg/debug/pr46782.c (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gcc.dg/debug/pr46782.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,11 @@
-+/* PR debug/46782 */
-+/* { dg-do compile } */
-+/* { dg-options "-w -O0 -fvar-tracking -fcompare-debug" } */
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-1-x.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-1-x.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,6 @@
++/* { dg-options "-std=gnu99" } */
++/* { dg-do run } */
+
-+void foo (int i)
-+{
-+ if (i)
-+ i++;
-+ while (i)
-+ ;
-+}
-Index: gcc/testsuite/gcc.dg/graphite/run-id-pr46758.c
++#define __as __memx
++
++#include "addr-space-1.h"
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-1.h
===================================================================
---- gcc/testsuite/gcc.dg/graphite/run-id-pr46758.c (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gcc.dg/graphite/run-id-pr46758.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,18 @@
-+int
-+movegt (int y, long long a)
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-1.h (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-1.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,83 @@
++#include <stdlib.h>
++#include <string.h>
++
++typedef struct
+{
-+ int i;
-+ int ret = 0;
-+ for (i = 0; i < y; i++)
-+ if (a == -1LL << 33)
-+ ret = -1;
-+ return ret;
-+}
++ char i1;
++ short i2;
++ long i4;
++ long long i8;
++ char str[2][10];
++} a_t;
++
++const __as a_t A =
++ {
++ 12, 345, 678910, 1234567891011ll,
++ {
++ "xxx..xxx",
++ "yyy..yyy"
++ }
++ };
+
-+int
-+main ()
++const __as volatile a_t V =
++ {
++ 12+1, 345+1, 678910+1, 1234567891011ll+1,
++ {
++ "XXX..XXX",
++ "YYY..YYY"
++ }
++ };
++
++a_t A2;
++volatile a_t V2;
++
++int main (void)
+{
-+ if (movegt (1, -1LL << 33) != -1)
-+ __builtin_abort ();
++ if (A.i1 != 12
++ || A.i1 != V.i1 -1)
++ abort();
++
++ if (A.i2 != 345
++ || A.i2 != V.i2 -1)
++ abort();
++
++ if (A.i4 != 678910
++ || A.i4 != V.i4 -1)
++ abort();
++
++ if (A.i8 != 1234567891011ll
++ || A.i8 != V.i8 -1)
++ abort();
++
++ A2 = A;
++ V2 = V;
++
++ if (A2.i1 != 12
++ || A2.i1 != V2.i1 -1)
++ abort();
++
++ if (A2.i2 != 345
++ || A2.i2 != V2.i2 -1)
++ abort();
++
++ if (A2.i4 != 678910
++ || A2.i4 != V2.i4 -1)
++ abort();
++
++ if (A2.i8 != 1234567891011ll
++ || A2.i8 != V2.i8 -1)
++ abort();
++
++ if (strcmp (A2.str[0], "xxx..xxx"))
++ abort();
++ if (strcmp (A2.str[1], "yyy..yyy"))
++ abort();
++
++ if (strcmp ((const char*) V2.str[0], "XXX..XXX"))
++ abort();
++ if (strcmp ((const char*) V2.str[1], "YYY..YYY"))
++ abort();
++
++ exit (0);
+ return 0;
+}
-Index: gcc/testsuite/gcc.dg/graphite/pr45552.c
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-2-x.c
===================================================================
---- gcc/testsuite/gcc.dg/graphite/pr45552.c (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gcc.dg/graphite/pr45552.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,46 @@
-+typedef struct
-+{
-+ double z;
-+} Vector;
-+typedef struct
-+{
-+ float *vertex;
-+ float *normal;
-+} VertexArray;
-+typedef struct
-+{
-+ Vector *vertex;
-+ int num_vertex;
-+} ObjectSmooth;
-+typedef struct
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-2-x.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-2-x.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,9 @@
++/* { dg-options "-std=gnu99 -Wa,--no-warn" } */
++/* { dg-do run } */
++
++/* --no-warn because: "assembling 24-bit address needs binutils extension"
++ see binutils PR13503. */
++
++#define __as __memx
++
++#include "addr-space-2.h"
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-2.h
+===================================================================
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-2.h (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-2.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,106 @@
++extern void exit (int);
++extern void abort (void);
++
++typedef struct T
+{
-+ int num_cells;
-+} State;
-+static void *array_from_ObjectSmooth( ObjectSmooth *obj )
++ char val;
++ const __as struct T *l, *r;
++} tree;
++
++/*
++ abcd
++ / \
++ ab cd
++ / \ / \
++ a b c d
++*/
++
++const __as tree a = { 'a', 0, 0 };
++const __as tree b = { 'b', 0, 0 };
++const __as tree c = { 'c', 0, 0 };
++const __as tree d = { 'd', 0, 0 };
++
++const __as tree ab = { 'A', &a, &b };
++const __as tree cd = { 'C', &c, &d };
++
++const __as tree abcd = { '*', &ab, &cd };
++
++static void
++test1 (void)
+{
-+ int i, j;
-+ VertexArray *array = (VertexArray *) __builtin_malloc( sizeof( VertexArray ) );
-+ array->vertex = (float *) __builtin_malloc( 3*sizeof(float)*obj->num_vertex );
-+ array->normal = (float *) __builtin_malloc( 3*sizeof(float)*obj->num_vertex );
-+ for (i=0, j=0; i<obj->num_vertex; ++i) {
-+ array->normal[j++] = 9;
-+ array->vertex[j] = obj->vertex[i].z;
-+ array->normal[j++] = 1;
-+ }
++ if (abcd.val != '*')
++ abort();
++
++ if (abcd.l->val != 'A')
++ abort();
++ if (abcd.r->val != 'C')
++ abort();
++
++ if (abcd.l->l->val != 'a')
++ abort();
++ if (abcd.l->r->val != 'b')
++ abort();
++ if (abcd.r->l->val != 'c')
++ abort();
++ if (abcd.r->r->val != 'd')
++ abort();
+}
-+static void draw_cell( void )
++
++static void
++test2 (const __as tree *t)
+{
-+ glCallList( array_from_ObjectSmooth( (ObjectSmooth *) __builtin_malloc(10) ));
++ if (t->val != '*')
++ abort();
++
++ if (t->l->val != 'A')
++ abort();
++ if (t->r->val != 'C')
++ abort();
++
++ if (t->l->l->val != 'a')
++ abort();
++ if (t->l->r->val != 'b')
++ abort();
++ if (t->r->l->val != 'c')
++ abort();
++ if (t->r->r->val != 'd')
++ abort();
+}
-+static int render( State *st)
++
++static void
++test3 (const __as tree *pt)
+{
-+ int b;
-+ for (b=0; b<st->num_cells; ++b) {
-+ draw_cell();
-+ draw_cell();
-+ }
++ tree t = *pt;
++
++ if (t.val != '*')
++ abort();
++
++ if (t.l->val != 'A')
++ abort();
++ if (t.r->val != 'C')
++ abort();
++
++ if (t.l->l->val != 'a')
++ abort();
++ if (t.l->r->val != 'b')
++ abort();
++ if (t.r->l->val != 'c')
++ abort();
++ if (t.r->r->val != 'd')
++ abort();
+}
-+reshape_glcells( int width, int height )
++
++int main (void)
+{
-+ render( 0 );
++ const __as tree *t = &abcd;
++ test1();
++ test2 (&abcd);
++ test3 (&abcd);
++
++ __asm ("" : "+r" (t));
++ test2 (t);
++ test3 (t);
++
++ exit (0);
++ return 0;
+}
-Index: gcc/testsuite/ChangeLog
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-1-g.c
===================================================================
---- gcc/testsuite/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/testsuite/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,63 @@
-+2011-02-01 Thomas Koenig <tkoenig@gcc.gnu.org>
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-1-g.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-1-g.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,6 @@
++/* { dg-options "-std=gnu99" } */
++/* { dg-do run } */
+
-+ Backport from mainline
-+ PR fortran/45338
-+ * gfortran.dg/userdef_operator_2.f90: New test case.
++#define __as
+
-+2010-12-27 Yao Qi <yao@codesourcery.com>
++#include "addr-space-1.h"
+Index: gcc/testsuite/gcc.target/avr/torture/addr-space-2-g.c
+===================================================================
+--- gcc/testsuite/gcc.target/avr/torture/addr-space-2-g.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.target/avr/torture/addr-space-2-g.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,6 @@
++/* { dg-options "-std=gnu99" } */
++/* { dg-do run } */
+
-+ Backport from mainline:
-+ 2010-10-14 Yao Qi <yao@codesourcery.com>
++#define __as
++
++#include "addr-space-2.h"
+Index: gcc/testsuite/gcc.target/avr/progmem.h
+===================================================================
+--- gcc/testsuite/gcc.target/avr/progmem.h (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/testsuite/gcc.target/avr/progmem.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -5,6 +5,7 @@
+ static const char __c[] PROGMEM = (s); \
+ &__c[0];}))
+
++#ifdef __AVR_HAVE_LPMX__
+ #define pgm_read_char(addr) \
+ (__extension__({ \
+ unsigned int __addr16 = (unsigned int)(addr); \
+@@ -12,3 +13,13 @@
+ __asm__ ("lpm %0, %a1" \
+ : "=r" (__result) : "z" (__addr16)); \
+ __result; }))
++#else
++#define pgm_read_char(addr) \
++ (__extension__({ \
++ unsigned int __addr16 = (unsigned int)(addr); \
++ char __result; \
++ __asm__ ("lpm" "\n\t" \
++ "mov %0, r0" \
++ : "=r" (__result) : "z" (__addr16)); \
++ __result; }))
++#endif
+Index: gcc/testsuite/gfortran.dg/intrinsic_8.f90
+===================================================================
+--- gcc/testsuite/gfortran.dg/intrinsic_8.f90 (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gfortran.dg/intrinsic_8.f90 (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,23 @@
++! { dg-do compile }
++!
++! PR fortran/52452
++!
++! Contributed by Roger Ferrer Ibanez
++!
++PROGRAM test_etime
++ IMPLICIT NONE
++ INTRINSIC :: etime
++ REAL(4) :: tarray(1:2)
++ REAL(4) :: result
++
++ CALL etime(tarray, result)
++END PROGRAM test_etime
++
++subroutine test_etime2
++ IMPLICIT NONE
++ INTRINSIC :: etime
++ REAL(4) :: tarray(1:2)
++ REAL(4) :: result
++
++ result = etime(tarray)
++END subroutine test_etime2
+Index: gcc/testsuite/gcc.dg/Wunused-var-3.c
+===================================================================
+--- gcc/testsuite/gcc.dg/Wunused-var-3.c (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/gcc.dg/Wunused-var-3.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,34 @@
++/* PR c/52577 */
++/* { dg-do compile } */
++/* { dg-options "-Wunused" } */
++
++typedef int V __attribute__((vector_size (sizeof (int) * 4)));
++
++void
++f1 (V *p)
++{
++ V mask = { 1, 2, 3, 0 };
++ *p = __builtin_shuffle (*p, mask);
++}
+
-+ PR target/45447
-+ * gcc.target/arm/pr45447.c: New test.
++void
++f2 (V *p, V *q)
++{
++ V mask = { 1, 2, 3, 0 };
++ *p = __builtin_shuffle (*p, *q, mask);
++}
++
++void
++f3 (V *p, V *mask)
++{
++ V a = { 1, 2, 3, 0 };
++ *p = __builtin_shuffle (a, *mask);
++}
++
++void
++f4 (V *p, V *mask)
++{
++ V a = { 1, 2, 3, 0 };
++ V b = { 2, 3, 4, 1 };
++ *p = __builtin_shuffle (a, b, *mask);
++}
+Index: gcc/testsuite/ChangeLog
+===================================================================
+--- gcc/testsuite/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/testsuite/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,60 @@
++2012-03-22 Paolo Carlini <paolo.carlini@oracle.com>
+
-+2010-12-24 Eric Botcazou <ebotcazou@adacore.com>
++ PR c++/52487
++ * g++.dg/cpp0x/lambda/lambda-ice7.C: New.
+
-+ * gnat.dg/opt13_pkg.ad[sb]: Fix line ending.
++2012-03-22 Tobias Burnus <burnus@net-b.de>
+
-+2010-12-22 Sebastian Pop <sebastian.pop@amd.com>
++ PR fortran/52452
++ * gfortran.dg/intrinsic_8.f90: New.
+
-+ PR tree-optimization/46758
-+ * gcc.dg/graphite/run-id-pr46758.c: New.
++2012-03-22 Jakub Jelinek <jakub@redhat.com>
+
-+2010-12-23 Sebastian Pop <sebastian.pop@amd.com>
++ PR c++/52671
++ * g++.dg/ext/attrib44.C: New test.
+
-+ PR tree-optimization/45552
-+ * gcc.dg/graphite/pr45552.c
++2012-03-22 Jason Merrill <jason@redhat.com>
+
++ * g++.dg/torture/pr52582.C: New.
+
-+2010-12-23 Sebastian Pop <sebastian.pop@amd.com>
++2012-03-22 Georg-Johann Lay <avr@gjlay.de>
+
-+ PR tree-optimization/43023
-+ * gfortran.dg/ldist-1.f90: Adjust pattern.
-+ * gfortran.dg/ldist-pr43023.f90: New.
++ Backport from 2012-03-20 mainline r185583.
+
-+2010-12-21 Martin Jambor <mjambor@suse.cz>
++ * gcc.target/avr/progmem.h (pgm_read_char): Define depending on
++ __AVR_HAVE_LPMX__
+
-+ PR middle-end/46734
-+ * g++.dg/tree-ssa/pr46734.C: New test.
++ Backport from 2012-03-20 mainline r185570.
+
-+2010-12-18 Alexandre Oliva <aoliva@redhat.com>
++ PR target/49868
++ * gcc.target/avr/torture/addr-space-2.h: New file.
++ * gcc.target/avr/torture/addr-space-2-g.h: New test.
++ * gcc.target/avr/torture/addr-space-2-0.h: New test.
++ * gcc.target/avr/torture/addr-space-2-1.h: New test.
++ * gcc.target/avr/torture/addr-space-2-x.h: New test.
+
-+ PR debug/46756
-+ * gfortran.dg/debug/pr46756.f: New.
++ Backport from 2012-03-12 mainline r185255.
+
-+2010-12-18 Alexandre Oliva <aoliva@redhat.com>
++ PR target/49868
++ * gcc.target/avr/torture/addr-space-1.h: New file.
++ * gcc.target/avr/torture/addr-space-g.h: New test.
++ * gcc.target/avr/torture/addr-space-0.h: New test.
++ * gcc.target/avr/torture/addr-space-1.h: New test.
++ * gcc.target/avr/torture/addr-space-x.h: New test.
+
-+ PR debug/46782
-+ * gcc.dg/debug/pr46782.c: New.
++2012-03-22 Jakub Jelinek <jakub@redhat.com>
+
-+2010-12-17 Daniel Kraft <d@domob.eu>
++ Backported from mainline
++ 2012-03-14 Jakub Jelinek <jakub@redhat.com>
+
-+ PR fortran/46794
-+ * gfortran.dg/power2.f90: Initialize variables.
++ PR c++/52521
++ * g++.dg/cpp0x/udlit-args2.C: New test.
+
-+2010-12-16 Eric Botcazou <ebotcazou@adacore.com>
++ 2012-03-13 Jakub Jelinek <jakub@redhat.com>
+
-+ * gnat.dg/opt13.adb: New test.
-+ * gnat.dg/opt13_pkg.ad[sb]: New helper.
++ PR c/52577
++ * gcc.dg/Wunused-var-3.c: New test.
+
- 2010-12-16 Release Manager
+ 2012-03-22 Release Manager
- * GCC 4.5.2 released.
-Index: gcc/testsuite/g++.dg/tree-ssa/pr46734.C
+ * GCC 4.7.0 released.
+Index: gcc/testsuite/g++.dg/ext/attrib44.C
===================================================================
---- gcc/testsuite/g++.dg/tree-ssa/pr46734.C (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/g++.dg/tree-ssa/pr46734.C (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,34 @@
-+/* { dg-do compile } */
-+/* { dg-options "-O -fipa-sra" } */
+--- gcc/testsuite/g++.dg/ext/attrib44.C (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/g++.dg/ext/attrib44.C (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,4 @@
++// PR c++/52671
++// { dg-do compile }
++__attribute__ ((deprecated)) enum E { E0 }; // { dg-warning "attribute ignored in declaration of" }
++// { dg-message "must follow the" "" { target *-*-* } 3 }
+Index: gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice7.C
+===================================================================
+--- gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice7.C (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/g++.dg/cpp0x/lambda/lambda-ice7.C (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,9 @@
++// PR c++/52487
++// { dg-options "-std=c++0x" }
++
++struct A; // { dg-error "forward declaration" }
+
-+struct A
++void foo(A& a)
+{
-+ int *p;
-+ A() {p = (int *) -1;}
-+ ~A() {if (p && p != (int *) -1) *p = 0;}
-+};
++ [=](){a;}; // { dg-error "invalid use of incomplete type" }
++}
+Index: gcc/testsuite/g++.dg/cpp0x/udlit-args2.C
+===================================================================
+--- gcc/testsuite/g++.dg/cpp0x/udlit-args2.C (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/g++.dg/cpp0x/udlit-args2.C (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,15 @@
++// PR c++/52521
++// { dg-do compile }
++// { dg-options -std=c++11 }
++
++#include <cstddef>
++
++int operator "" _a (const char *);
++int operator "" _a (const char *, std::size_t);
++int a = 123_a;
++int a2 = "abc"_a;
++
++int operator "" _b (const char *, std::size_t);
++int operator "" _b (const char *);
++int b = 123_b;
++int b2 = "abc"_b;
+Index: gcc/testsuite/g++.dg/torture/pr52582.C
+===================================================================
+--- gcc/testsuite/g++.dg/torture/pr52582.C (.../tags/gcc_4_7_0_release) (wersja 0)
++++ gcc/testsuite/g++.dg/torture/pr52582.C (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -0,0 +1,23 @@
++// PR c++/52582
+
++inline void *operator new (__SIZE_TYPE__, void *p) throw ()
++{
++ return p;
++}
+struct B
+{
-+ A a;
-+ char data[23];
-+ B() : a() {data[0] = 0;}
++ virtual ~B ();
++ B ();
+};
-+
-+extern A ga;
-+extern int *gi;
-+extern void *gz;
-+extern B *gb;
-+
-+static int * __attribute__ ((noinline)) foo (B *b, void *z)
++struct A : B
+{
-+ __builtin_memcpy (gz, z, 28);
-+ ga = b->a;
-+ return b->a.p;
-+}
-+
-+int *bar (B *b, void *z)
++ A () : B () {}
++ virtual void bar ();
++};
++void
++foo ()
+{
-+ gb = b;
-+ return foo (b, z);
++ char a[64];
++ B *b = new (&a) A ();
++ b->~B ();
+}
-Index: gcc/testsuite/gfortran.dg/ldist-1.f90
+Index: gcc/cp/class.c
===================================================================
---- gcc/testsuite/gfortran.dg/ldist-1.f90 (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/testsuite/gfortran.dg/ldist-1.f90 (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -29,5 +29,8 @@
- return
- end Subroutine PADEC
-
--! { dg-final { scan-tree-dump-times "distributed: split to 4 loops" 1 "ldist" } }
-+! There are 5 legal partitions in this code. Based on the data
-+! locality heuristic, this loop should not be split.
-+
-+! { dg-final { scan-tree-dump-not "distributed: split to" "ldist" } }
- ! { dg-final { cleanup-tree-dump "ldist" } }
-Index: gcc/testsuite/gfortran.dg/debug/pr46756.f
+--- gcc/cp/class.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/cp/class.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -3145,8 +3145,9 @@
+ CLASSTYPE_NON_AGGREGATE (t) = 1;
+
+ /* If at least one non-static data member is non-literal, the whole
+- class becomes non-literal. */
+- if (!literal_type_p (type))
++ class becomes non-literal. Note: if the type is incomplete we
++ will complain later on. */
++ if (COMPLETE_TYPE_P (type) && !literal_type_p (type))
+ CLASSTYPE_LITERAL_P (t) = false;
+
+ /* A standard-layout class is a class that:
+Index: gcc/cp/decl.c
===================================================================
---- gcc/testsuite/gfortran.dg/debug/pr46756.f (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gfortran.dg/debug/pr46756.f (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,29 @@
-+C PR debug/46756, reduced from ../20010519-1.f
-+C { dg-do compile }
-+C { dg-options "-O -fcompare-debug" }
-+ LOGICAL QDISK,QDW,QCMPCT
-+ LOGICAL LNOMA,LRAISE,LSCI,LBIG
-+ ASSIGN 801 TO I800 ! { dg-warning "Deleted feature: ASSIGN" "Deleted feature: ASSIGN" }
-+ GOTO 800
-+ 801 CONTINUE
-+ ASSIGN 761 TO I760 ! { dg-warning "Deleted feature: ASSIGN" "Deleted feature: ASSIGN" }
-+ 761 CONTINUE
-+ IF(LSCI) THEN
-+ DO I=1,LENCM
-+ ENDDO
-+ ENDIF
-+ DO WHILE((CVGMX.GT.TOLDIM).AND.(ITER.LT.ITMX))
-+ IF(.NOT.QDW) THEN
-+ ASSIGN 641 to I640 ! { dg-warning "Deleted feature: ASSIGN" "Deleted feature: ASSIGN" }
-+ GOTO 640
-+ 641 CONTINUE
-+ ENDIF
-+ ENDDO
-+ GOTO 700
-+ 640 CONTINUE
-+ GOTO I640 ! { dg-warning "Deleted feature: Assigned" "Assigned GO TO" }
-+ 700 CONTINUE
-+ GOTO I760 ! { dg-warning "Deleted feature: Assigned" "Assigned GO TO" }
-+ 800 CONTINUE
-+ GOTO I800 ! { dg-warning "Deleted feature: Assigned" "Assigned GO TO" }
-+ END
-Index: gcc/testsuite/gfortran.dg/ldist-pr43023.f90
+--- gcc/cp/decl.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/cp/decl.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -4219,7 +4219,8 @@
+ if (declspecs->attributes)
+ {
+ location_t loc = input_location;
+- if (!CLASSTYPE_TEMPLATE_INSTANTIATION (declared_type))
++ if (!CLASS_TYPE_P (declared_type)
++ || !CLASSTYPE_TEMPLATE_INSTANTIATION (declared_type))
+ /* For a non-template class, use the name location; for a template
+ class (an explicit instantiation), use the current location. */
+ input_location = location_of (declared_type);
+Index: gcc/cp/method.c
===================================================================
---- gcc/testsuite/gfortran.dg/ldist-pr43023.f90 (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gfortran.dg/ldist-pr43023.f90 (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,31 @@
-+! { dg-do compile }
-+! { dg-options "-O2 -ftree-loop-distribution" }
+--- gcc/cp/method.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/cp/method.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1590,6 +1590,7 @@
+ DECL_DELETED_FN (fn) = deleted_p;
+ DECL_DECLARED_CONSTEXPR_P (fn) = constexpr_p;
+ }
++ DECL_EXTERNAL (fn) = true;
+ DECL_NOT_REALLY_EXTERN (fn) = 1;
+ DECL_DECLARED_INLINE_P (fn) = 1;
+ gcc_assert (!TREE_USED (fn));
+Index: gcc/cp/ChangeLog
+===================================================================
+--- gcc/cp/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/cp/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,30 @@
++2012-03-22 Paolo Carlini <paolo.carlini@oracle.com>
+
-+MODULE NFT_mod
++ PR c++/52487
++ * class.c (check_field_decls): Call literal_type_p only
++ on complete types.
+
-+implicit none
-+integer :: Nangle
-+real:: Z0
-+real, dimension(:,:), allocatable :: Angle
-+real, dimension(:), allocatable :: exth, ezth, hxth, hyth, hyphi
++2012-03-22 Jakub Jelinek <jakub@redhat.com>
+
-+CONTAINS
++ PR c++/52671
++ * decl.c (check_tag_decl): Only use CLASSTYPE_TEMPLATE_INSTANTIATION
++ on CLASS_TYPE_P types.
+
-+SUBROUTINE NFT_Init()
++2012-03-22 Jason Merrill <jason@redhat.com>
+
-+real :: th, fi
-+integer :: n
++ PR c++/52582
++ * method.c (implicitly_declare_fn): Set DECL_EXTERNAL.
+
-+do n = 1,Nangle
-+ th = Angle(n,1)
-+ fi = Angle(n,2)
++2012-03-22 Jakub Jelinek <jakub@redhat.com>
+
-+ exth(n) = cos(fi)*cos(th)
-+ ezth(n) = -sin(th)
-+ hxth(n) = -sin(fi)
-+ hyth(n) = cos(fi)
-+ hyphi(n) = -sin(fi)
-+end do
-+END SUBROUTINE NFT_Init
++ Backported from mainline
++ 2012-03-14 Jakub Jelinek <jakub@redhat.com>
+
-+END MODULE NFT_mod
-Index: gcc/testsuite/gfortran.dg/userdef_operator_2.f90
-===================================================================
---- gcc/testsuite/gfortran.dg/userdef_operator_2.f90 (.../tags/gcc_4_5_2_release) (wersja 0)
-+++ gcc/testsuite/gfortran.dg/userdef_operator_2.f90 (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -0,0 +1,17 @@
-+! { dg-do compile }
-+! PR 45338 - no ICE when cmp is not used explicitly.
-+! Test case by Simon Smart
-+module test_mod
-+ implicit none
-+contains
-+ subroutine test_fn (cmp)
-+ interface operator(.myop.)
-+ pure function cmp (a, b) result(ret)
-+ integer, intent(in) :: a, b
-+ logical ret
-+ end function cmp
-+ end interface
-+ integer :: a, b
-+ print*, a .myop. b
-+ end subroutine test_fn
-+end module test_mod
-Index: gcc/testsuite/gfortran.dg/power2.f90
-===================================================================
---- gcc/testsuite/gfortran.dg/power2.f90 (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/testsuite/gfortran.dg/power2.f90 (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -13,6 +13,9 @@
- INTEGER(KIND=1) :: k1
- INTEGER(KIND=2) :: k2
-
-+ k1 = 1_1
-+ k2 = 1_2
++ PR c++/52521
++ * parser.c (lookup_literal_operator): Return fn only if
++ processed all arguments from args vector and argtypes is
++ void_list_node.
+
- k1 = 1_1 + 1_1**k1
- k2 = 1_2 + 1_2**k2
+ 2012-03-22 Release Manager
-Index: gcc/jump.c
+ * GCC 4.7.0 released.
+Index: gcc/cp/parser.c
===================================================================
---- gcc/jump.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/jump.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -194,7 +194,7 @@
- rtx prev_nonjump_insn = NULL;
-
- for (insn = f; insn; insn = NEXT_INSN (insn))
-- if (INSN_P (insn))
-+ if (NONDEBUG_INSN_P (insn))
- {
- mark_jump_label (PATTERN (insn), insn, 0);
-
-Index: gcc/ada/ChangeLog
+--- gcc/cp/parser.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/cp/parser.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,6 +1,6 @@
+ /* C++ Parser.
+ Copyright (C) 2000, 2001, 2002, 2003, 2004,
+- 2005, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc.
++ 2005, 2007, 2008, 2009, 2010, 2011, 2012 Free Software Foundation, Inc.
+ Written by Mark Mitchell <mark@codesourcery.com>.
+
+ This file is part of GCC.
+@@ -3581,7 +3581,13 @@
+ TREE_TYPE (tparm))))
+ found = false;
+ }
+- if (found)
++ if (found
++ && ix == VEC_length (tree, args)
++ /* May be this should be sufficient_parms_p instead,
++ depending on how exactly should user-defined literals
++ work in presence of default arguments on the literal
++ operator parameters. */
++ && argtypes == void_list_node)
+ return fn;
+ }
+ }
+Index: gcc/fortran/ChangeLog
===================================================================
---- gcc/ada/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/ada/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
+--- gcc/fortran/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/fortran/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
@@ -1,3 +1,9 @@
-+2011-01-04 Eric Botcazou <ebotcazou@adacore.com>
++2012-03-22 Tobias Burnus <burnus@net-b.de>
+
-+ * gcc-interface/trans.c (Subprogram_Body_to_gnu): Evaluate the
-+ expressions of the parameter cache within the statement group of
-+ the CICO mechanism.
++ PR fortran/52452
++ * resolve.c (resolve_intrinsic): Don't search for a
++ function if we know that it is a subroutine.
+
- 2010-12-16 Release Manager
+ 2012-03-22 Release Manager
- * GCC 4.5.2 released.
-Index: gcc/ada/gcc-interface/trans.c
+ * GCC 4.7.0 released.
+Index: gcc/fortran/resolve.c
===================================================================
---- gcc/ada/gcc-interface/trans.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/ada/gcc-interface/trans.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -2303,6 +2303,31 @@
- gnat_poplevel ();
- gnu_result = end_stmt_group ();
-
-+ /* If we populated the parameter attributes cache, we need to make sure that
-+ the cached expressions are evaluated on all the possible paths leading to
-+ their uses. So we force their evaluation on entry of the function. */
-+ cache = DECL_STRUCT_FUNCTION (gnu_subprog_decl)->language->parm_attr_cache;
-+ if (cache)
-+ {
-+ struct parm_attr_d *pa;
-+ int i;
-+
-+ start_stmt_group ();
-+
-+ for (i = 0; VEC_iterate (parm_attr, cache, i, pa); i++)
-+ {
-+ if (pa->first)
-+ add_stmt_with_node (pa->first, gnat_node);
-+ if (pa->last)
-+ add_stmt_with_node (pa->last, gnat_node);
-+ if (pa->length)
-+ add_stmt_with_node (pa->length, gnat_node);
-+ }
-+
-+ add_stmt (gnu_result);
-+ gnu_result = end_stmt_group ();
-+ }
-+
- /* If we are dealing with a return from an Ada procedure with parameters
- passed by copy-in/copy-out, we need to return a record containing the
- final values of these parameters. If the list contains only one entry,
-@@ -2341,30 +2366,6 @@
+--- gcc/fortran/resolve.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/fortran/resolve.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1496,7 +1496,7 @@
- pop_stack (&gnu_return_label_stack);
-
-- /* If we populated the parameter attributes cache, we need to make sure
-- that the cached expressions are evaluated on all possible paths. */
-- cache = DECL_STRUCT_FUNCTION (gnu_subprog_decl)->language->parm_attr_cache;
-- if (cache)
-- {
-- struct parm_attr_d *pa;
-- int i;
--
-- start_stmt_group ();
--
-- for (i = 0; VEC_iterate (parm_attr, cache, i, pa); i++)
-- {
-- if (pa->first)
-- add_stmt_with_node (pa->first, gnat_node);
-- if (pa->last)
-- add_stmt_with_node (pa->last, gnat_node);
-- if (pa->length)
-- add_stmt_with_node (pa->length, gnat_node);
-- }
--
-- add_stmt (gnu_result);
-- gnu_result = end_stmt_group ();
-- }
--
- /* Set the end location. */
- Sloc_to_locus
- ((Present (End_Label (Handled_Statement_Sequence (gnat_node)))
-Index: gcc/fortran/ChangeLog
-===================================================================
---- gcc/fortran/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/fortran/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,10 @@
-+2011-02-01 Thomas Koenig <tkoenig@gcc.gnu.org>
-+
-+ Backport from mainline
-+ PR fortran/45338
-+ * resolve.c (resolve_operator): Mark function for user-defined
-+ operator as referenced.
-+
- 2010-12-16 Release Manager
-
- * GCC 4.5.2 released.
-Index: gcc/fortran/resolve.c
-===================================================================
---- gcc/fortran/resolve.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/fortran/resolve.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -3577,9 +3577,12 @@
- sprintf (msg, _("Operand of user operator '%s' at %%L is %s"),
- e->value.op.uop->name, gfc_typename (&op1->ts));
- else
-- sprintf (msg, _("Operands of user operator '%s' at %%L are %s/%s"),
-- e->value.op.uop->name, gfc_typename (&op1->ts),
-- gfc_typename (&op2->ts));
-+ {
-+ sprintf (msg, _("Operands of user operator '%s' at %%L are %s/%s"),
-+ e->value.op.uop->name, gfc_typename (&op1->ts),
-+ gfc_typename (&op2->ts));
-+ e->value.op.uop->op->sym->attr.referenced = 1;
-+ }
-
- goto bad_op;
+ if (sym->intmod_sym_id)
+ isym = gfc_intrinsic_function_by_id ((gfc_isym_id) sym->intmod_sym_id);
+- else
++ else if (!sym->attr.subroutine)
+ isym = gfc_find_function (sym->name);
+ if (isym)
Index: gcc/BASE-VER
===================================================================
---- gcc/BASE-VER (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/BASE-VER (.../branches/gcc-4_5-branch) (wersja 168599)
+--- gcc/BASE-VER (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/BASE-VER (.../branches/gcc-4_7-branch) (wersja 185750)
@@ -1 +1 @@
--4.5.2
-+4.5.3
-Index: gcc/tree-data-ref.c
+-4.7.0
++4.7.1
+Index: gcc/tree-nested.c
===================================================================
---- gcc/tree-data-ref.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/tree-data-ref.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -4594,7 +4594,7 @@
- for (e = v->succ; e; e = e->succ_next)
- fprintf (file, " %d", e->dest);
-
-- fprintf (file, ") \n");
-+ fprintf (file, ")\n");
- print_gimple_stmt (file, RDGV_STMT (v), 0, TDF_VOPS|TDF_MEMSYMS);
- fprintf (file, ")\n");
- }
-@@ -4991,6 +4991,38 @@
- free (bbs);
- }
-
-+/* Returns true when the statement at STMT is of the form "A[i] = 0"
-+ that contains a data reference on its LHS with a stride of the same
-+ size as its unit type. */
-+
-+bool
-+stmt_with_adjacent_zero_store_dr_p (gimple stmt)
-+{
-+ tree op0, op1;
-+ bool res;
-+ struct data_reference *dr;
-+
-+ if (!stmt
-+ || !gimple_vdef (stmt)
-+ || !is_gimple_assign (stmt)
-+ || !gimple_assign_single_p (stmt)
-+ || !(op1 = gimple_assign_rhs1 (stmt))
-+ || !(integer_zerop (op1) || real_zerop (op1)))
-+ return false;
-+
-+ dr = XCNEW (struct data_reference);
-+ op0 = gimple_assign_lhs (stmt);
-+
-+ DR_STMT (dr) = stmt;
-+ DR_REF (dr) = op0;
-+
-+ res = dr_analyze_innermost (dr)
-+ && stride_of_unit_type_p (DR_STEP (dr), TREE_TYPE (op0));
-+
-+ free_data_ref (dr);
-+ return res;
-+}
-+
- /* For a data reference REF, return the declaration of its base
- address or NULL_TREE if the base is not determined. */
+--- gcc/tree-nested.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/tree-nested.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1954,6 +1954,7 @@
+ convert_tramp_reference_stmt (gimple_stmt_iterator *gsi, bool *handled_ops_p,
+ struct walk_stmt_info *wi)
+ {
++ struct nesting_info *info = (struct nesting_info *) wi->info;
+ gimple stmt = gsi_stmt (*gsi);
+
+ switch (gimple_code (stmt))
+@@ -1966,16 +1967,33 @@
+ for (i = 0; i < nargs; i++)
+ walk_tree (gimple_call_arg_ptr (stmt, i), convert_tramp_reference_op,
+ wi, NULL);
++ break;
++ }
-Index: gcc/tree-data-ref.h
-===================================================================
---- gcc/tree-data-ref.h (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/tree-data-ref.h (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -567,7 +567,19 @@
- void remove_similar_memory_refs (VEC (gimple, heap) **);
- bool rdg_defs_used_in_other_loops_p (struct graph *, int);
- bool have_similar_memory_accesses (gimple, gimple);
-+bool stmt_with_adjacent_zero_store_dr_p (gimple);
-
-+/* Returns true when STRIDE is equal in absolute value to the size of
-+ the unit type of TYPE. */
-+
-+static inline bool
-+stride_of_unit_type_p (tree stride, tree type)
-+{
-+ return tree_int_cst_equal (fold_unary (ABS_EXPR, TREE_TYPE (stride),
-+ stride),
-+ TYPE_SIZE_UNIT (type));
-+}
-+
- /* Determines whether RDG vertices V1 and V2 access to similar memory
- locations, in which case they have to be in the same partition. */
+- *handled_ops_p = true;
+- return NULL_TREE;
++ case GIMPLE_OMP_PARALLEL:
++ case GIMPLE_OMP_TASK:
++ {
++ tree save_local_var_chain;
++ walk_gimple_op (stmt, convert_tramp_reference_op, wi);
++ save_local_var_chain = info->new_local_var_chain;
++ info->new_local_var_chain = NULL;
++ walk_body (convert_tramp_reference_stmt, convert_tramp_reference_op,
++ info, gimple_omp_body (stmt));
++ if (info->new_local_var_chain)
++ declare_vars (info->new_local_var_chain,
++ gimple_seq_first_stmt (gimple_omp_body (stmt)),
++ false);
++ info->new_local_var_chain = save_local_var_chain;
+ }
++ break;
-Index: gcc/graphite.c
-===================================================================
---- gcc/graphite.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/graphite.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -210,6 +210,7 @@
- return false;
+ default:
++ *handled_ops_p = false;
++ return NULL_TREE;
+ break;
}
-+ scev_reset ();
- recompute_all_dominators ();
- initialize_original_copy_tables ();
- cloog_initialize ();
-Index: gcc/cfgcleanup.c
+- *handled_ops_p = false;
++ *handled_ops_p = true;
+ return NULL_TREE;
+ }
+
+Index: gcc/output.h
===================================================================
---- gcc/cfgcleanup.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/cfgcleanup.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -482,15 +482,20 @@
- /* When not optimizing, ensure that edges or forwarder
- blocks with different locus are not optimized out. */
- int locus = single_succ_edge (target)->goto_locus;
-+ rtx last ;
-
- if (locus && goto_locus && !locator_eq (locus, goto_locus))
- counter = n_basic_blocks;
- else if (locus)
- goto_locus = locus;
-
-- if (INSN_P (BB_END (target)))
-+ last = BB_END (target);
-+ if (DEBUG_INSN_P (last))
-+ last = prev_nondebug_insn (last);
-+
-+ if (last && INSN_P (last))
- {
-- locus = INSN_LOCATOR (BB_END (target));
-+ locus = INSN_LOCATOR (last);
-
- if (locus && goto_locus
- && !locator_eq (locus, goto_locus))
-Index: gcc/tree-sra.c
+--- gcc/output.h (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/output.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -446,8 +446,8 @@
+ #define SECTION_STYLE_MASK 0x600000 /* bits used for SECTION_STYLE */
+ #define SECTION_COMMON 0x800000 /* contains common data */
+ #define SECTION_RELRO 0x1000000 /* data is readonly after relocation processing */
+-#define SECTION_MACH_DEP 0x2000000 /* subsequent bits reserved for target */
+-#define SECTION_EXCLUDE 0x4000000 /* discarded by the linker */
++#define SECTION_EXCLUDE 0x2000000 /* discarded by the linker */
++#define SECTION_MACH_DEP 0x4000000 /* subsequent bits reserved for target */
+
+ /* This SECTION_STYLE is used for unnamed sections that we can switch
+ to using a special assembler directive. */
+Index: gcc/c-parser.c
===================================================================
---- gcc/tree-sra.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/tree-sra.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -3413,7 +3413,10 @@
- else if (ac2->size != access->size)
- return NULL;
-
-- if (access_precludes_ipa_sra_p (ac2))
-+ if (access_precludes_ipa_sra_p (ac2)
-+ || (ac2->type != access->type
-+ && (TREE_ADDRESSABLE (ac2->type)
-+ || TREE_ADDRESSABLE (access->type))))
- return NULL;
-
- modification |= ac2->write;
-Index: gcc/graphite-sese-to-poly.c
+--- gcc/c-parser.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/c-parser.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,7 +1,7 @@
+ /* Parser for C and Objective-C.
+ Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+- 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011
+- Free Software Foundation, Inc.
++ 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009, 2010, 2011,
++ 2012 Free Software Foundation, Inc.
+
+ Parser actions based on the old Bison parser; structure somewhat
+ influenced by and fragments based on the C++ parser.
+@@ -6647,6 +6647,8 @@
+ case RID_BUILTIN_SHUFFLE:
+ {
+ VEC(c_expr_t,gc) *cexpr_list;
++ unsigned int i;
++ c_expr_t *p;
+
+ c_parser_consume_token (parser);
+ if (!c_parser_get_builtin_args (parser,
+@@ -6657,6 +6659,9 @@
+ break;
+ }
+
++ FOR_EACH_VEC_ELT (c_expr_t, cexpr_list, i, p)
++ mark_exp_read (p->value);
++
+ if (VEC_length (c_expr_t, cexpr_list) == 2)
+ expr.value =
+ c_build_vec_perm_expr
+Index: gcc/config/i386/nmmintrin.h
===================================================================
---- gcc/graphite-sese-to-poly.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/graphite-sese-to-poly.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -715,7 +715,7 @@
- gcc_assert (TREE_CODE (e) == INTEGER_CST);
-
- value_init (val);
-- value_set_si (val, int_cst_value (e));
-+ tree_int_to_gmp (e, val);
- add_value_to_dim (l, expr, val);
- value_clear (val);
- }
-@@ -729,16 +729,13 @@
- {
- Value val;
- ppl_Coefficient_t coef;
-- int v = int_cst_value (cst);
-+ tree type = TREE_TYPE (cst);
+--- gcc/config/i386/nmmintrin.h (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/i386/nmmintrin.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2007, 2009 Free Software Foundation, Inc.
++/* Copyright (C) 2007, 2009, 2012 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+@@ -19,7 +19,7 @@
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+- <http://www.gnu.org/licenses/>.
++ <http://www.gnu.org/licenses/>. */
+
+ /* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 10.0. */
+Index: gcc/config/i386/smmintrin.h
+===================================================================
+--- gcc/config/i386/smmintrin.h (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/i386/smmintrin.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
++/* Copyright (C) 2007, 2008, 2009, 2010, 2012 Free Software Foundation, Inc.
- value_init (val);
-- value_set_si (val, 0);
+ This file is part of GCC.
- /* Necessary to not get "-1 = 2^n - 1". */
-- if (v < 0)
-- value_sub_int (val, val, -v);
-- else
-- value_add_int (val, val, v);
-+ mpz_set_double_int (val, double_int_sext (tree_to_double_int (cst),
-+ TYPE_PRECISION (type)), false);
-
- value_multiply (val, val, k);
- ppl_new_Coefficient (&coef);
-@@ -816,7 +813,7 @@
- Value val;
- gcc_assert (host_integerp (TREE_OPERAND (e, 1), 0));
- value_init (val);
-- value_set_si (val, int_cst_value (TREE_OPERAND (e, 1)));
-+ tree_int_to_gmp (TREE_OPERAND (e, 1), val);
- value_multiply (val, val, k);
- scan_tree_for_params (s, TREE_OPERAND (e, 0), c, val);
- value_clear (val);
-@@ -831,7 +828,7 @@
- Value val;
- gcc_assert (host_integerp (TREE_OPERAND (e, 0), 0));
- value_init (val);
-- value_set_si (val, int_cst_value (TREE_OPERAND (e, 0)));
-+ tree_int_to_gmp (TREE_OPERAND (e, 0), val);
- value_multiply (val, val, k);
- scan_tree_for_params (s, TREE_OPERAND (e, 1), c, val);
- value_clear (val);
-@@ -1717,10 +1714,13 @@
- /* subscript - low >= 0 */
- if (host_integerp (low, 0))
- {
-+ tree minus_low;
-+
- ppl_new_Linear_Expression_with_dimension (&expr, accessp_nb_dims);
- ppl_set_coef (expr, subscript, 1);
-
-- ppl_set_inhomogeneous (expr, -int_cst_value (low));
-+ minus_low = fold_build1 (NEGATE_EXPR, TREE_TYPE (low), low);
-+ ppl_set_inhomogeneous_tree (expr, minus_low);
-
- ppl_new_Constraint (&cstr, expr, PPL_CONSTRAINT_TYPE_GREATER_OR_EQUAL);
- ppl_Polyhedron_add_constraint (accesses, cstr);
-@@ -1740,7 +1740,7 @@
- ppl_new_Linear_Expression_with_dimension (&expr, accessp_nb_dims);
- ppl_set_coef (expr, subscript, -1);
-
-- ppl_set_inhomogeneous (expr, int_cst_value (high));
-+ ppl_set_inhomogeneous_tree (expr, high);
-
- ppl_new_Constraint (&cstr, expr, PPL_CONSTRAINT_TYPE_GREATER_OR_EQUAL);
- ppl_Polyhedron_add_constraint (accesses, cstr);
-Index: gcc/config/sparc/sparc.md
-===================================================================
---- gcc/config/sparc/sparc.md (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/sparc/sparc.md (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1106,14 +1106,15 @@
-
- ;; Load in operand 0 the (absolute) address of operand 1, which is a symbolic
- ;; value subject to a PC-relative relocation. Operand 2 is a helper function
--;; that adds the PC value at the call point to operand 0.
-+;; that adds the PC value at the call point to register #(operand 3).
-
- (define_insn "load_pcrel_sym<P:mode>"
- [(set (match_operand:P 0 "register_operand" "=r")
- (unspec:P [(match_operand:P 1 "symbolic_operand" "")
-- (match_operand:P 2 "call_address_operand" "")] UNSPEC_LOAD_PCREL_SYM))
-+ (match_operand:P 2 "call_address_operand" "")
-+ (match_operand:P 3 "const_int_operand" "")] UNSPEC_LOAD_PCREL_SYM))
- (clobber (reg:P 15))]
-- ""
-+ "REGNO (operands[0]) == INTVAL (operands[3])"
- {
- if (flag_delayed_branch)
- return "sethi\t%%hi(%a1-4), %0\n\tcall\t%a2\n\t add\t%0, %%lo(%a1+4), %0";
-Index: gcc/config/sparc/sparc.c
+@@ -19,9 +19,8 @@
+ You should have received a copy of the GNU General Public License and
+ a copy of the GCC Runtime Library Exception along with this program;
+ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
+- <http://www.gnu.org/licenses/>.
++ <http://www.gnu.org/licenses/>. */
+
+-
+ /* Implemented from the specification included in the Intel C++ Compiler
+ User Guide and Reference, version 10.0. */
+
+Index: gcc/config/sh/sh.c
===================================================================
---- gcc/config/sparc/sparc.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/sparc/sparc.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -363,7 +363,7 @@
- static int epilogue_renumber (rtx *, int);
- static bool sparc_assemble_integer (rtx, unsigned int, int);
- static int set_extends (rtx);
--static void load_pic_register (void);
-+static void load_got_register (void);
- static int save_or_restore_regs (int, int, rtx, int, int);
- static void emit_save_or_restore_regs (int);
- static void sparc_asm_function_prologue (FILE *, HOST_WIDE_INT);
-@@ -966,6 +966,36 @@
- return 0;
- }
+--- gcc/config/sh/sh.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/sh/sh.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,6 +1,6 @@
+ /* Output routines for GCC for Renesas / SuperH SH.
+ Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
+- 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
++ 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
+ Free Software Foundation, Inc.
+ Contributed by Steve Chamberlain (sac@cygnus.com).
+ Improved by Jim Wilson (wilson@cygnus.com).
+@@ -11497,9 +11497,16 @@
+ && REGCLASS_HAS_GENERAL_REG (srcclass))
+ || (REGCLASS_HAS_GENERAL_REG (dstclass)
+ && REGCLASS_HAS_FP_REG (srcclass)))
+- return ((TARGET_SHMEDIA ? 4 : TARGET_FMOVD ? 8 : 12)
+- * ((GET_MODE_SIZE (mode) + 7) / 8U));
++ {
++ /* Discourage trying to use fp regs for a pointer. This also
++ discourages fp regs with SImode because Pmode is an alias
++ of SImode on this target. See PR target/48596. */
++ int addend = (mode == Pmode) ? 40 : 0;
-+/* Return true if the address of LABEL can be loaded by means of the
-+ mov{si,di}_pic_label_ref patterns in PIC mode. */
-+
-+static bool
-+can_use_mov_pic_label_ref (rtx label)
-+{
-+ /* VxWorks does not impose a fixed gap between segments; the run-time
-+ gap can be different from the object-file gap. We therefore can't
-+ assume X - _GLOBAL_OFFSET_TABLE_ is a link-time constant unless we
-+ are absolutely sure that X is in the same segment as the GOT.
-+ Unfortunately, the flexibility of linker scripts means that we
-+ can't be sure of that in general, so assume that GOT-relative
-+ accesses are never valid on VxWorks. */
-+ if (TARGET_VXWORKS_RTP)
-+ return false;
-+
-+ /* Similarly, if the label is non-local, it might end up being placed
-+ in a different section than the current one; now mov_pic_label_ref
-+ requires the label and the code to be in the same section. */
-+ if (LABEL_REF_NONLOCAL_P (label))
-+ return false;
-+
-+ /* Finally, if we are reordering basic blocks and partition into hot
-+ and cold sections, this might happen for any label. */
-+ if (flag_reorder_blocks_and_partition)
-+ return false;
-+
-+ return true;
-+}
++ return (((TARGET_SHMEDIA ? 4 : TARGET_FMOVD ? 8 : 12) + addend)
++ * ((GET_MODE_SIZE (mode) + 7) / 8U));
++ }
+
- /* Expand a move instruction. Return true if all work is done. */
-
- bool
-@@ -1000,14 +1030,9 @@
- if (pic_address_needs_scratch (operands[1]))
- operands[1] = legitimize_pic_address (operands[1], NULL_RTX);
-
-- /* VxWorks does not impose a fixed gap between segments; the run-time
-- gap can be different from the object-file gap. We therefore can't
-- assume X - _GLOBAL_OFFSET_TABLE_ is a link-time constant unless we
-- are absolutely sure that X is in the same segment as the GOT.
-- Unfortunately, the flexibility of linker scripts means that we
-- can't be sure of that in general, so assume that _G_O_T_-relative
-- accesses are never valid on VxWorks. */
-- if (GET_CODE (operands[1]) == LABEL_REF && !TARGET_VXWORKS_RTP)
-+ /* We cannot use the mov{si,di}_pic_label_ref patterns in all cases. */
-+ if (GET_CODE (operands[1]) == LABEL_REF
-+ && can_use_mov_pic_label_ref (operands[1]))
- {
- if (mode == SImode)
- {
-@@ -2907,26 +2932,39 @@
+ if ((dstclass == FPUL_REGS
+ && REGCLASS_HAS_GENERAL_REG (srcclass))
+ || (srcclass == FPUL_REGS
+Index: gcc/config/avr/avr.md
+===================================================================
+--- gcc/config/avr/avr.md (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/avr/avr.md (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -63,6 +63,7 @@
+ [UNSPEC_STRLEN
+ UNSPEC_MOVMEM
+ UNSPEC_INDEX_JMP
++ UNSPEC_LPM
+ UNSPEC_FMUL
+ UNSPEC_FMULS
+ UNSPEC_FMULSU
+@@ -77,6 +78,7 @@
+ UNSPECV_WRITE_SP
+ UNSPECV_GOTO_RECEIVER
+ UNSPECV_ENABLE_IRQS
++ UNSPECV_MEMORY_BARRIER
+ UNSPECV_NOP
+ UNSPECV_SLEEP
+ UNSPECV_WDR
+@@ -139,7 +141,7 @@
+ "out_bitop, out_plus, out_plus_noclobber, plus64, addto_sp,
+ tsthi, tstpsi, tstsi, compare, compare64, call,
+ mov8, mov16, mov24, mov32, reload_in16, reload_in24, reload_in32,
+- xload, movmem,
++ xload, movmem, load_lpm,
+ ashlqi, ashrqi, lshrqi,
+ ashlhi, ashrhi, lshrhi,
+ ashlsi, ashrsi, lshrsi,
+@@ -363,36 +365,63 @@
+ ;;========================================================================
+ ;; Move stuff around
+
+-(define_expand "load<mode>_libgcc"
+- [(set (match_dup 3)
+- (match_dup 2))
+- (set (reg:MOVMODE 22)
+- (match_operand:MOVMODE 1 "memory_operand" ""))
+- (set (match_operand:MOVMODE 0 "register_operand" "")
+- (reg:MOVMODE 22))]
+- "avr_load_libgcc_p (operands[1])"
+- {
+- operands[3] = gen_rtx_REG (HImode, REG_Z);
+- operands[2] = force_operand (XEXP (operands[1], 0), NULL_RTX);
+- operands[1] = replace_equiv_address (operands[1], operands[3]);
+- set_mem_addr_space (operands[1], ADDR_SPACE_FLASH);
+- })
+-
++;; Represent a load from __flash that needs libgcc support as UNSPEC.
++;; This is legal because we read from non-changing memory.
++;; For rationale see the FIXME below.
++
++;; "load_psi_libgcc"
++;; "load_si_libgcc"
++;; "load_sf_libgcc"
+ (define_insn "load_<mode>_libgcc"
+ [(set (reg:MOVMODE 22)
+- (match_operand:MOVMODE 0 "memory_operand" "m,m"))]
+- "avr_load_libgcc_p (operands[0])
+- && REG_P (XEXP (operands[0], 0))
+- && REG_Z == REGNO (XEXP (operands[0], 0))"
++ (unspec:MOVMODE [(reg:HI REG_Z)]
++ UNSPEC_LPM))]
++ ""
+ {
+- operands[0] = GEN_INT (GET_MODE_SIZE (<MODE>mode));
+- return "%~call __load_%0";
++ rtx n_bytes = GEN_INT (GET_MODE_SIZE (<MODE>mode));
++ output_asm_insn ("%~call __load_%0", &n_bytes);
++ return "";
+ }
+- [(set_attr "length" "1,2")
+- (set_attr "isa" "rjmp,jmp")
++ [(set_attr "type" "xcall")
+ (set_attr "cc" "clobber")])
+
+
++;; Similar for inline reads from flash. We use UNSPEC instead
++;; of MEM for the same reason as above: PR52543.
++;; $1 contains the memory segment.
++
++(define_insn "load_<mode>"
++ [(set (match_operand:MOVMODE 0 "register_operand" "=r")
++ (unspec:MOVMODE [(reg:HI REG_Z)
++ (match_operand:QI 1 "reg_or_0_operand" "rL")]
++ UNSPEC_LPM))]
++ "(CONST_INT_P (operands[1]) && AVR_HAVE_LPMX)
++ || (REG_P (operands[1]) && AVR_HAVE_ELPMX)"
++ {
++ return avr_load_lpm (insn, operands, NULL);
++ }
++ [(set_attr "adjust_len" "load_lpm")
++ (set_attr "cc" "clobber")])
++
++
++;; Similar to above for the complementary situation when there is no [E]LPMx.
++;; Clobber Z in that case.
++
++(define_insn "load_<mode>_clobber"
++ [(set (match_operand:MOVMODE 0 "register_operand" "=r")
++ (unspec:MOVMODE [(reg:HI REG_Z)
++ (match_operand:QI 1 "reg_or_0_operand" "rL")]
++ UNSPEC_LPM))
++ (clobber (reg:HI REG_Z))]
++ "!((CONST_INT_P (operands[1]) && AVR_HAVE_LPMX)
++ || (REG_P (operands[1]) && AVR_HAVE_ELPMX))"
++ {
++ return avr_load_lpm (insn, operands, NULL);
++ }
++ [(set_attr "adjust_len" "load_lpm")
++ (set_attr "cc" "clobber")])
++
++
+ (define_insn_and_split "xload8_A"
+ [(set (match_operand:QI 0 "register_operand" "=r")
+ (match_operand:QI 1 "memory_operand" "m"))
+@@ -418,9 +447,15 @@
+ DONE;
+ })
+
++;; "xloadqi_A"
++;; "xloadhi_A"
++;; "xloadpsi_A"
++;; "xloadsi_A"
++;; "xloadsf_A"
+ (define_insn_and_split "xload<mode>_A"
+ [(set (match_operand:MOVMODE 0 "register_operand" "=r")
+ (match_operand:MOVMODE 1 "memory_operand" "m"))
++ (clobber (reg:MOVMODE 22))
+ (clobber (reg:QI 21))
+ (clobber (reg:HI REG_Z))]
+ "can_create_pseudo_p()
+@@ -461,7 +496,7 @@
+ {
+ return avr_out_xload (insn, operands, NULL);
+ }
+- [(set_attr "length" "3,4")
++ [(set_attr "length" "4,4")
+ (set_attr "adjust_len" "*,xload")
+ (set_attr "isa" "lpmx,lpm")
+ (set_attr "cc" "none")])
+@@ -532,12 +567,55 @@
+ DONE;
}
- }
- \f
--/* PIC support. */
--static GTY(()) bool pic_helper_needed = false;
--static GTY(()) rtx pic_helper_symbol;
--static GTY(()) rtx global_offset_table;
-+/* Global Offset Table support. */
-+static GTY(()) rtx got_helper_rtx = NULL_RTX;
-+static GTY(()) rtx global_offset_table_rtx = NULL_RTX;
-+/* Return the SYMBOL_REF for the Global Offset Table. */
-+
-+static GTY(()) rtx sparc_got_symbol = NULL_RTX;
++ /* For old devices without LPMx, prefer __flash loads per libcall. */
+
-+static rtx
-+sparc_got (void)
-+{
-+ if (!sparc_got_symbol)
-+ sparc_got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
-+
-+ return sparc_got_symbol;
-+}
+ if (avr_load_libgcc_p (src))
+ {
+- /* For the small devices, do loads per libgcc call. */
+- emit_insn (gen_load<mode>_libgcc (dest, src));
++ emit_move_insn (gen_rtx_REG (Pmode, REG_Z),
++ force_reg (Pmode, XEXP (src, 0)));
++
++ emit_insn (gen_load_<mode>_libgcc ());
++ emit_move_insn (dest, gen_rtx_REG (<MODE>mode, 22));
+ DONE;
+ }
+
- /* Ensure that we are not using patterns that are not OK with PIC. */
-
- int
- check_pic (int i)
- {
-+ rtx op;
++ /* ; FIXME: Hack around PR rtl-optimization/52543.
++ ; lower-subreg.c splits loads from the 16-bit address spaces which
++ ; causes code bloat because each load need his setting of RAMPZ.
++ ; Moreover, the split will happen in such a way that the loads don't
++ ; take advantage of POST_INC addressing. Thus, we use UNSPEC to
++ ; represent these loads instead. Notice that this is legitimate
++ ; because the memory content does not change: Loads from the same
++ ; address will yield the same value.
++ ; POST_INC addressing would make the addresses mode_dependent and could
++ ; work around that PR, too. However, notice that it is *not* legitimate
++ ; to expand to POST_INC at expand time: The following passes assert
++ ; that pre-/post-modify addressing is introduced by .auto_inc_dec and
++ ; does not exist before that pass. */
++
++ if (avr_mem_flash_p (src)
++ && (GET_MODE_SIZE (<MODE>mode) > 1
++ || MEM_ADDR_SPACE (src) != ADDR_SPACE_FLASH))
++ {
++ rtx xsegment = GEN_INT (avr_addrspace[MEM_ADDR_SPACE (src)].segment);
++ if (!AVR_HAVE_ELPM)
++ xsegment = const0_rtx;
++ if (xsegment != const0_rtx)
++ xsegment = force_reg (QImode, xsegment);
++
++ emit_move_insn (gen_rtx_REG (Pmode, REG_Z),
++ force_reg (Pmode, XEXP (src, 0)));
++
++ if ((CONST_INT_P (xsegment) && AVR_HAVE_LPMX)
++ || (REG_P (xsegment) && AVR_HAVE_ELPMX))
++ emit_insn (gen_load_<mode> (dest, xsegment));
++ else
++ emit_insn (gen_load_<mode>_clobber (dest, xsegment));
++ DONE;
++ }
+
- switch (flag_pic)
- {
- case 1:
-- gcc_assert (GET_CODE (recog_data.operand[i]) != SYMBOL_REF
-- && (GET_CODE (recog_data.operand[i]) != CONST
-- || (GET_CODE (XEXP (recog_data.operand[i], 0)) == MINUS
-- && (XEXP (XEXP (recog_data.operand[i], 0), 0)
-- == global_offset_table)
-- && (GET_CODE (XEXP (XEXP (recog_data.operand[i], 0), 1))
-- == CONST))));
-+ op = recog_data.operand[i];
-+ gcc_assert (GET_CODE (op) != SYMBOL_REF
-+ && (GET_CODE (op) != CONST
-+ || (GET_CODE (XEXP (op, 0)) == MINUS
-+ && XEXP (XEXP (op, 0), 0) == sparc_got ()
-+ && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST)));
- case 2:
- default:
- return 1;
-@@ -3161,9 +3199,9 @@
- return 1;
- }
++ /* ; The only address-space for which we use plain MEM and reload
++ ; machinery are 1-byte loads from __flash. */
+ })
+
+ ;;========================================================================
+@@ -677,40 +755,6 @@
+ operands[5] = gen_rtx_REG (HImode, REGNO (operands[3]));
+ })
+
+-;; For LPM loads from AS1 we split
+-;; R = *Z
+-;; to
+-;; R = *Z++
+-;; Z = Z - sizeof (R)
+-;;
+-;; so that the second instruction can be optimized out.
+-
+-(define_split ; "split-lpmx"
+- [(set (match_operand:HISI 0 "register_operand" "")
+- (match_operand:HISI 1 "memory_operand" ""))]
+- "reload_completed
+- && AVR_HAVE_LPMX"
+- [(set (match_dup 0)
+- (match_dup 2))
+- (set (match_dup 3)
+- (plus:HI (match_dup 3)
+- (match_dup 4)))]
+- {
+- rtx addr = XEXP (operands[1], 0);
+-
+- if (!avr_mem_flash_p (operands[1])
+- || !REG_P (addr)
+- || reg_overlap_mentioned_p (addr, operands[0]))
+- {
+- FAIL;
+- }
+-
+- operands[2] = replace_equiv_address (operands[1],
+- gen_rtx_POST_INC (Pmode, addr));
+- operands[3] = addr;
+- operands[4] = gen_int_mode (-GET_MODE_SIZE (<MODE>mode), HImode);
+- })
+-
+ ;;==========================================================================
+ ;; xpointer move (24 bit)
+
+@@ -1081,15 +1125,16 @@
+ (set_attr "adjust_len" "addto_sp")])
+
+ (define_insn "*addhi3"
+- [(set (match_operand:HI 0 "register_operand" "=r,d,d")
+- (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0")
+- (match_operand:HI 2 "nonmemory_operand" "r,s,n")))]
++ [(set (match_operand:HI 0 "register_operand" "=r,d,!w,d")
++ (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0 ,0")
++ (match_operand:HI 2 "nonmemory_operand" "r,s,IJ,n")))]
+ ""
+ {
+ static const char * const asm_code[] =
+ {
+ "add %A0,%A2\;adc %B0,%B2",
+ "subi %A0,lo8(-(%2))\;sbci %B0,hi8(-(%2))",
++ "",
+ ""
+ };
--/* Construct the SYMBOL_REF for the tls_get_offset function. */
-+/* Return the SYMBOL_REF for the tls_get_addr function. */
+@@ -1098,9 +1143,9 @@
--static GTY(()) rtx sparc_tls_symbol;
-+static GTY(()) rtx sparc_tls_symbol = NULL_RTX;
+ return avr_out_plus_noclobber (operands, NULL, NULL);
+ }
+- [(set_attr "length" "2,2,2")
+- (set_attr "adjust_len" "*,*,out_plus_noclobber")
+- (set_attr "cc" "set_n,set_czn,out_plus_noclobber")])
++ [(set_attr "length" "2,2,2,2")
++ (set_attr "adjust_len" "*,*,out_plus_noclobber,out_plus_noclobber")
++ (set_attr "cc" "set_n,set_czn,out_plus_noclobber,out_plus_noclobber")])
+
+ ;; Adding a constant to NO_LD_REGS might have lead to a reload of
+ ;; that constant to LD_REGS. We don't add a scratch to *addhi3
+@@ -1138,10 +1183,10 @@
+ (clobber (match_dup 2))])])
+
+ (define_insn "addhi3_clobber"
+- [(set (match_operand:HI 0 "register_operand" "=d,l")
+- (plus:HI (match_operand:HI 1 "register_operand" "%0,0")
+- (match_operand:HI 2 "const_int_operand" "n,n")))
+- (clobber (match_scratch:QI 3 "=X,&d"))]
++ [(set (match_operand:HI 0 "register_operand" "=!w,d,r")
++ (plus:HI (match_operand:HI 1 "register_operand" "%0,0,0")
++ (match_operand:HI 2 "const_int_operand" "IJ,n,n")))
++ (clobber (match_scratch:QI 3 "=X,X,&d"))]
+ ""
+ {
+ gcc_assert (REGNO (operands[0]) == REGNO (operands[1]));
+@@ -1692,6 +1737,29 @@
+
+ ;; Handle small constants
+
++;; Special case of a += 2*b as frequently seen with accesses to int arrays.
++;; This is shorter, faster than MUL and has lower register pressure.
++
++(define_insn_and_split "*umaddqihi4.2"
++ [(set (match_operand:HI 0 "register_operand" "=r")
++ (plus:HI (mult:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
++ (const_int 2))
++ (match_operand:HI 2 "register_operand" "r")))]
++ "!reload_completed
++ && !reg_overlap_mentioned_p (operands[0], operands[1])"
++ { gcc_unreachable(); }
++ "&& 1"
++ [(set (match_dup 0)
++ (match_dup 2))
++ ; *addhi3_zero_extend
++ (set (match_dup 0)
++ (plus:HI (zero_extend:HI (match_dup 1))
++ (match_dup 0)))
++ ; *addhi3_zero_extend
++ (set (match_dup 0)
++ (plus:HI (zero_extend:HI (match_dup 1))
++ (match_dup 0)))])
++
+ ;; "umaddqihi4.uconst"
+ ;; "maddqihi4.sconst"
+ (define_insn_and_split "*<extend_u>maddqihi4.<extend_su>const"
+@@ -5198,18 +5266,36 @@
+ (set_attr "length" "1")])
+
+ ;; Enable Interrupts
+-(define_insn "enable_interrupt"
+- [(unspec_volatile [(const_int 1)] UNSPECV_ENABLE_IRQS)]
++(define_expand "enable_interrupt"
++ [(clobber (const_int 0))]
+ ""
+- "sei"
+- [(set_attr "length" "1")
+- (set_attr "cc" "none")])
++ {
++ rtx mem = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (mem) = 1;
++ emit_insn (gen_cli_sei (const1_rtx, mem));
++ DONE;
++ })
+
+ ;; Disable Interrupts
+-(define_insn "disable_interrupt"
+- [(unspec_volatile [(const_int 0)] UNSPECV_ENABLE_IRQS)]
++(define_expand "disable_interrupt"
++ [(clobber (const_int 0))]
+ ""
+- "cli"
++ {
++ rtx mem = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (mem) = 1;
++ emit_insn (gen_cli_sei (const0_rtx, mem));
++ DONE;
++ })
++
++(define_insn "cli_sei"
++ [(unspec_volatile [(match_operand:QI 0 "const_int_operand" "L,P")]
++ UNSPECV_ENABLE_IRQS)
++ (set (match_operand:BLK 1 "" "")
++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))]
++ ""
++ "@
++ cli
++ sei"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+@@ -5316,10 +5402,12 @@
+ [(unspec_volatile [(match_operand:QI 0 "const_int_operand" "n")
+ (const_int 1)]
+ UNSPECV_DELAY_CYCLES)
+- (clobber (match_scratch:QI 1 "=&d"))]
++ (set (match_operand:BLK 1 "" "")
++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
++ (clobber (match_scratch:QI 2 "=&d"))]
+ ""
+- "ldi %1,lo8(%0)
+- 1: dec %1
++ "ldi %2,lo8(%0)
++ 1: dec %2
+ brne 1b"
+ [(set_attr "length" "3")
+ (set_attr "cc" "clobber")])
+@@ -5328,11 +5416,13 @@
+ [(unspec_volatile [(match_operand:HI 0 "const_int_operand" "n")
+ (const_int 2)]
+ UNSPECV_DELAY_CYCLES)
+- (clobber (match_scratch:HI 1 "=&w"))]
++ (set (match_operand:BLK 1 "" "")
++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
++ (clobber (match_scratch:HI 2 "=&w"))]
+ ""
+- "ldi %A1,lo8(%0)
+- ldi %B1,hi8(%0)
+- 1: sbiw %A1,1
++ "ldi %A2,lo8(%0)
++ ldi %B2,hi8(%0)
++ 1: sbiw %A2,1
+ brne 1b"
+ [(set_attr "length" "4")
+ (set_attr "cc" "clobber")])
+@@ -5341,16 +5431,18 @@
+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "n")
+ (const_int 3)]
+ UNSPECV_DELAY_CYCLES)
+- (clobber (match_scratch:QI 1 "=&d"))
++ (set (match_operand:BLK 1 "" "")
++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
+ (clobber (match_scratch:QI 2 "=&d"))
+- (clobber (match_scratch:QI 3 "=&d"))]
++ (clobber (match_scratch:QI 3 "=&d"))
++ (clobber (match_scratch:QI 4 "=&d"))]
+ ""
+- "ldi %1,lo8(%0)
+- ldi %2,hi8(%0)
+- ldi %3,hlo8(%0)
+- 1: subi %1,1
+- sbci %2,0
++ "ldi %2,lo8(%0)
++ ldi %3,hi8(%0)
++ ldi %4,hlo8(%0)
++ 1: subi %2,1
+ sbci %3,0
++ sbci %4,0
+ brne 1b"
+ [(set_attr "length" "7")
+ (set_attr "cc" "clobber")])
+@@ -5359,19 +5451,21 @@
+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "n")
+ (const_int 4)]
+ UNSPECV_DELAY_CYCLES)
+- (clobber (match_scratch:QI 1 "=&d"))
++ (set (match_operand:BLK 1 "" "")
++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))
+ (clobber (match_scratch:QI 2 "=&d"))
+ (clobber (match_scratch:QI 3 "=&d"))
+- (clobber (match_scratch:QI 4 "=&d"))]
++ (clobber (match_scratch:QI 4 "=&d"))
++ (clobber (match_scratch:QI 5 "=&d"))]
+ ""
+- "ldi %1,lo8(%0)
+- ldi %2,hi8(%0)
+- ldi %3,hlo8(%0)
+- ldi %4,hhi8(%0)
+- 1: subi %1,1
+- sbci %2,0
++ "ldi %2,lo8(%0)
++ ldi %3,hi8(%0)
++ ldi %4,hlo8(%0)
++ ldi %5,hhi8(%0)
++ 1: subi %2,1
+ sbci %3,0
+ sbci %4,0
++ sbci %5,0
+ brne 1b"
+ [(set_attr "length" "9")
+ (set_attr "cc" "clobber")])
+@@ -5757,9 +5851,23 @@
+ ;; CPU instructions
+
+ ;; NOP taking 1 or 2 Ticks
+-(define_insn "nopv"
++(define_expand "nopv"
++ [(parallel [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")]
++ UNSPECV_NOP)
++ (set (match_dup 1)
++ (unspec_volatile:BLK [(match_dup 1)]
++ UNSPECV_MEMORY_BARRIER))])]
++ ""
++ {
++ operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[1]) = 1;
++ })
++
++(define_insn "*nopv"
+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "P,K")]
+- UNSPECV_NOP)]
++ UNSPECV_NOP)
++ (set (match_operand:BLK 1 "" "")
++ (unspec_volatile:BLK [(match_dup 1)] UNSPECV_MEMORY_BARRIER))]
+ ""
+ "@
+ nop
+@@ -5768,17 +5876,43 @@
+ (set_attr "cc" "none")])
+
+ ;; SLEEP
+-(define_insn "sleep"
+- [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP)]
++(define_expand "sleep"
++ [(parallel [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP)
++ (set (match_dup 0)
++ (unspec_volatile:BLK [(match_dup 0)]
++ UNSPECV_MEMORY_BARRIER))])]
+ ""
++ {
++ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[0]) = 1;
++ })
++
++(define_insn "*sleep"
++ [(unspec_volatile [(const_int 0)] UNSPECV_SLEEP)
++ (set (match_operand:BLK 0 "" "")
++ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMORY_BARRIER))]
++ ""
+ "sleep"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+
+ ;; WDR
+-(define_insn "wdr"
+- [(unspec_volatile [(const_int 0)] UNSPECV_WDR)]
++(define_expand "wdr"
++ [(parallel [(unspec_volatile [(const_int 0)] UNSPECV_WDR)
++ (set (match_dup 0)
++ (unspec_volatile:BLK [(match_dup 0)]
++ UNSPECV_MEMORY_BARRIER))])]
+ ""
++ {
++ operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (operands[0]) = 1;
++ })
++
++(define_insn "*wdr"
++ [(unspec_volatile [(const_int 0)] UNSPECV_WDR)
++ (set (match_operand:BLK 0 "" "")
++ (unspec_volatile:BLK [(match_dup 0)] UNSPECV_MEMORY_BARRIER))]
++ ""
+ "wdr"
+ [(set_attr "length" "1")
+ (set_attr "cc" "none")])
+Index: gcc/config/avr/avr-protos.h
+===================================================================
+--- gcc/config/avr/avr-protos.h (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/avr/avr-protos.h (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -75,6 +75,8 @@
+ extern const char *avr_out_ashrpsi3 (rtx, rtx*, int*);
+ extern const char *avr_out_lshrpsi3 (rtx, rtx*, int*);
+
++extern const char* avr_load_lpm (rtx, rtx*, int*);
++
+ extern bool avr_rotate_bytes (rtx operands[]);
+
+ extern void expand_prologue (void);
+@@ -115,7 +117,7 @@
+ extern RTX_CODE avr_normalize_condition (RTX_CODE condition);
+ extern void out_shift_with_cnt (const char *templ, rtx insn,
+ rtx operands[], int *len, int t_len);
+-extern reg_class_t avr_mode_code_base_reg_class (enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE);
++extern enum reg_class avr_mode_code_base_reg_class (enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE);
+ extern bool avr_regno_mode_code_ok_for_base_p (int, enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE);
+ extern rtx avr_incoming_return_addr_rtx (void);
+ extern rtx avr_legitimize_reload_address (rtx*, enum machine_mode, int, int, int, int, rtx (*)(rtx,int));
+Index: gcc/config/avr/avr.c
+===================================================================
+--- gcc/config/avr/avr.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/avr/avr.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -827,7 +827,11 @@
+ bool isr_p = cfun->machine->is_interrupt || cfun->machine->is_signal;
+ int live_seq = sequent_regs_live ();
+
++ HOST_WIDE_INT size_max
++ = (HOST_WIDE_INT) GET_MODE_MASK (AVR_HAVE_8BIT_SP ? QImode : Pmode);
++
+ bool minimize = (TARGET_CALL_PROLOGUES
++ && size < size_max
+ && live_seq
+ && !isr_p
+ && !cfun->machine->is_OS_task
+@@ -933,6 +937,7 @@
+ leaf function and thus X has already been saved. */
+
+ int irq_state = -1;
++ HOST_WIDE_INT size_cfa = size;
+ rtx fp_plus_insns, fp, my_fp;
+
+ gcc_assert (frame_pointer_needed
+@@ -951,6 +956,27 @@
+ my_fp = all_regs_rtx[FRAME_POINTER_REGNUM];
+ }
+
++ /* Cut down size and avoid size = 0 so that we don't run
++ into ICE like PR52488 in the remainder. */
++
++ if (size > size_max)
++ {
++ /* Don't error so that insane code from newlib still compiles
++ and does not break building newlib. As PR51345 is implemented
++ now, there are multilib variants with -mtiny-stack.
++
++ If user wants sanity checks he can use -Wstack-usage=
++ or similar options.
++
++ For CFA we emit the original, non-saturated size so that
++ the generic machinery is aware of the real stack usage and
++ will print the above diagnostic as expected. */
++
++ size = size_max;
++ }
++
++ size = trunc_int_for_mode (size, GET_MODE (my_fp));
++
+ /************ Method 1: Adjust frame pointer ************/
+
+ start_sequence ();
+@@ -975,7 +1001,7 @@
+ RTX_FRAME_RELATED_P (insn) = 1;
+ add_reg_note (insn, REG_CFA_ADJUST_CFA,
+ gen_rtx_SET (VOIDmode, fp,
+- plus_constant (fp, -size)));
++ plus_constant (fp, -size_cfa)));
+ }
+
+ /* Copy to stack pointer. Note that since we've already
+@@ -1003,7 +1029,7 @@
+ add_reg_note (insn, REG_CFA_ADJUST_CFA,
+ gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+ plus_constant (stack_pointer_rtx,
+- -size)));
++ -size_cfa)));
+ }
+
+ fp_plus_insns = get_insns ();
+@@ -1026,7 +1052,7 @@
+ add_reg_note (insn, REG_CFA_ADJUST_CFA,
+ gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+ plus_constant (stack_pointer_rtx,
+- -size)));
++ -size_cfa)));
+ if (frame_pointer_needed)
+ {
+ insn = emit_move_insn (fp, stack_pointer_rtx);
+@@ -1048,7 +1074,7 @@
+ emit_insn (fp_plus_insns);
+ }
+
+- cfun->machine->stack_usage += size;
++ cfun->machine->stack_usage += size_cfa;
+ } /* !minimize && size != 0 */
+ } /* !minimize */
+ }
+@@ -1123,11 +1149,11 @@
+ emit_push_sfr (rampy_rtx, false /* frame-related */, true /* clr */);
+ }
+
+- if (AVR_HAVE_RAMPZ
++ if (AVR_HAVE_RAMPZ
+ && TEST_HARD_REG_BIT (set, REG_Z)
+ && TEST_HARD_REG_BIT (set, REG_Z + 1))
+ {
+- emit_push_sfr (rampz_rtx, false /* frame-related */, true /* clr */);
++ emit_push_sfr (rampz_rtx, false /* frame-related */, AVR_HAVE_RAMPD);
+ }
+ } /* is_interrupt is_signal */
+
+@@ -1261,6 +1287,7 @@
+ int irq_state = -1;
+ rtx fp, my_fp;
+ rtx fp_plus_insns;
++ HOST_WIDE_INT size_max;
+
+ gcc_assert (frame_pointer_needed
+ || !isr_p
+@@ -1277,6 +1304,13 @@
+
+ my_fp = all_regs_rtx[FRAME_POINTER_REGNUM];
+ }
++
++ /* For rationale see comment in prologue generation. */
++
++ size_max = (HOST_WIDE_INT) GET_MODE_MASK (GET_MODE (my_fp));
++ if (size > size_max)
++ size = size_max;
++ size = trunc_int_for_mode (size, GET_MODE (my_fp));
+
+ /********** Method 1: Adjust fp register **********/
+
+@@ -1347,12 +1381,12 @@
+ /* Restore RAMPZ/Y/X/D using tmp_reg as scratch.
+ The conditions to restore them must be tha same as in prologue. */
+
+- if (AVR_HAVE_RAMPX
+- && TEST_HARD_REG_BIT (set, REG_X)
+- && TEST_HARD_REG_BIT (set, REG_X + 1))
++ if (AVR_HAVE_RAMPZ
++ && TEST_HARD_REG_BIT (set, REG_Z)
++ && TEST_HARD_REG_BIT (set, REG_Z + 1))
+ {
+ emit_pop_byte (TMP_REGNO);
+- emit_move_insn (rampx_rtx, tmp_reg_rtx);
++ emit_move_insn (rampz_rtx, tmp_reg_rtx);
+ }
+
+ if (AVR_HAVE_RAMPY
+@@ -1364,12 +1398,12 @@
+ emit_move_insn (rampy_rtx, tmp_reg_rtx);
+ }
+
+- if (AVR_HAVE_RAMPZ
+- && TEST_HARD_REG_BIT (set, REG_Z)
+- && TEST_HARD_REG_BIT (set, REG_Z + 1))
++ if (AVR_HAVE_RAMPX
++ && TEST_HARD_REG_BIT (set, REG_X)
++ && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
+ emit_pop_byte (TMP_REGNO);
+- emit_move_insn (rampz_rtx, tmp_reg_rtx);
++ emit_move_insn (rampx_rtx, tmp_reg_rtx);
+ }
- static rtx
- sparc_tls_get_addr (void)
-@@ -3174,21 +3212,28 @@
- return sparc_tls_symbol;
+ if (AVR_HAVE_RAMPD)
+@@ -1423,6 +1457,22 @@
}
-+/* Return the Global Offset Table to be used in TLS mode. */
-+
- static rtx
- sparc_tls_got (void)
- {
-- rtx temp;
-+ /* In PIC mode, this is just the PIC offset table. */
- if (flag_pic)
- {
- crtl->uses_pic_offset_table = 1;
- return pic_offset_table_rtx;
- }
-- if (!global_offset_table)
-- global_offset_table = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
-- temp = gen_reg_rtx (Pmode);
-- emit_move_insn (temp, global_offset_table);
-- return temp;
-+ /* In non-PIC mode, Sun as (unlike GNU as) emits PC-relative relocations for
-+ the GOT symbol with the 32-bit ABI, so we reload the GOT register. */
-+ if (TARGET_SUN_TLS && TARGET_ARCH32)
-+ {
-+ load_got_register ();
-+ return global_offset_table_rtx;
-+ }
++/* Implement `TARGET_MODE_DEPENDENT_ADDRESS_P'. */
+
-+ /* In all other cases, we load a new pseudo with the GOT symbol. */
-+ return copy_to_reg (sparc_got ());
- }
++/* FIXME: PSImode addresses are not mode-dependent in themselves.
++ This hook just serves to hack around PR rtl-optimization/52543 by
++ claiming that PSImode addresses (which are used for the 24-bit
++ address space __memx) were mode-dependent so that lower-subreg.s
++ will skip these addresses. See also the similar FIXME comment along
++ with mov<mode> expanders in avr.md. */
++
++static bool
++avr_mode_dependent_address_p (const_rtx addr)
++{
++ return GET_MODE (addr) != Pmode;
++}
++
++
+ /* Helper function for `avr_legitimate_address_p'. */
- /* Return true if X contains a thread-local symbol. */
-@@ -3369,7 +3414,7 @@
+ static inline bool
+@@ -2435,7 +2485,8 @@
+
+ return (n_bytes > 2
+ && !AVR_HAVE_LPMX
+- && avr_mem_flash_p (op));
++ && MEM_P (op)
++ && MEM_ADDR_SPACE (op) == ADDR_SPACE_FLASH);
+ }
- if (GET_CODE (orig) == SYMBOL_REF
- /* See the comment in sparc_expand_move. */
-- || (TARGET_VXWORKS_RTP && GET_CODE (orig) == LABEL_REF))
-+ || (GET_CODE (orig) == LABEL_REF && !can_use_mov_pic_label_ref (orig)))
- {
- rtx pic_ref, address;
- rtx insn;
-@@ -3420,11 +3465,13 @@
- }
- else
- {
-- pic_ref = gen_const_mem (Pmode,
-- gen_rtx_PLUS (Pmode,
-- pic_offset_table_rtx, address));
-+ pic_ref
-+ = gen_const_mem (Pmode,
-+ gen_rtx_PLUS (Pmode,
-+ pic_offset_table_rtx, address));
- insn = emit_move_insn (reg, pic_ref);
- }
-+
- /* Put a REG_EQUAL note on this insn, so that it can be optimized
- by loop. */
- set_unique_reg_note (insn, REG_EQUAL, orig);
-@@ -3462,9 +3509,8 @@
- return gen_rtx_PLUS (Pmode, base, offset);
- }
- else if (GET_CODE (orig) == LABEL_REF)
-- /* ??? Why do we do this? */
-- /* Now movsi_pic_label_ref uses it, but we ought to be checking that
-- the register is live instead, in case it is eliminated. */
-+ /* ??? We ought to be checking that the register is live instead, in case
-+ it is eliminated. */
- crtl->uses_pic_offset_table = 1;
-
- return orig;
-@@ -3529,59 +3575,69 @@
- static void
- get_pc_thunk_name (char name[32], unsigned int regno)
- {
-- const char *pic_name = reg_names[regno];
-+ const char *reg_name = reg_names[regno];
-
- /* Skip the leading '%' as that cannot be used in a
- symbol name. */
-- pic_name += 1;
-+ reg_name += 1;
-
- if (USE_HIDDEN_LINKONCE)
-- sprintf (name, "__sparc_get_pc_thunk.%s", pic_name);
-+ sprintf (name, "__sparc_get_pc_thunk.%s", reg_name);
- else
- ASM_GENERATE_INTERNAL_LABEL (name, "LADDPC", regno);
+ /* Return true if a value of mode MODE is read by __xload_* function. */
+@@ -2450,155 +2501,6 @@
}
--/* Emit code to load the PIC register. */
-+/* Wrapper around the load_pcrel_sym{si,di} patterns. */
--static void
--load_pic_register (void)
-+static rtx
-+gen_load_pcrel_sym (rtx op0, rtx op1, rtx op2, rtx op3)
+-/* Find an unused d-register to be used as scratch in INSN.
+- EXCLUDE is either NULL_RTX or some register. In the case where EXCLUDE
+- is a register, skip all possible return values that overlap EXCLUDE.
+- The policy for the returned register is similar to that of
+- `reg_unused_after', i.e. the returned register may overlap the SET_DEST
+- of INSN.
+-
+- Return a QImode d-register or NULL_RTX if nothing found. */
+-
+-static rtx
+-avr_find_unused_d_reg (rtx insn, rtx exclude)
+-{
+- int regno;
+- bool isr_p = (interrupt_function_p (current_function_decl)
+- || signal_function_p (current_function_decl));
+-
+- for (regno = 16; regno < 32; regno++)
+- {
+- rtx reg = all_regs_rtx[regno];
+-
+- if ((exclude
+- && reg_overlap_mentioned_p (exclude, reg))
+- || fixed_regs[regno])
+- {
+- continue;
+- }
+-
+- /* Try non-live register */
+-
+- if (!df_regs_ever_live_p (regno)
+- && (TREE_THIS_VOLATILE (current_function_decl)
+- || cfun->machine->is_OS_task
+- || cfun->machine->is_OS_main
+- || (!isr_p && call_used_regs[regno])))
+- {
+- return reg;
+- }
+-
+- /* Any live register can be used if it is unused after.
+- Prologue/epilogue will care for it as needed. */
+-
+- if (df_regs_ever_live_p (regno)
+- && reg_unused_after (insn, reg))
+- {
+- return reg;
+- }
+- }
+-
+- return NULL_RTX;
+-}
+-
+-
+-/* Helper function for the next function in the case where only restricted
+- version of LPM instruction is available. */
+-
+-static const char*
+-avr_out_lpm_no_lpmx (rtx insn, rtx *xop, int *plen)
+-{
+- rtx dest = xop[0];
+- rtx addr = xop[1];
+- int n_bytes = GET_MODE_SIZE (GET_MODE (dest));
+- int regno_dest;
+-
+- regno_dest = REGNO (dest);
+-
+- /* The implicit target register of LPM. */
+- xop[3] = lpm_reg_rtx;
+-
+- switch (GET_CODE (addr))
+- {
+- default:
+- gcc_unreachable();
+-
+- case REG:
+-
+- gcc_assert (REG_Z == REGNO (addr));
+-
+- switch (n_bytes)
+- {
+- default:
+- gcc_unreachable();
+-
+- case 1:
+- avr_asm_len ("%4lpm", xop, plen, 1);
+-
+- if (regno_dest != LPM_REGNO)
+- avr_asm_len ("mov %0,%3", xop, plen, 1);
+-
+- return "";
+-
+- case 2:
+- if (REGNO (dest) == REG_Z)
+- return avr_asm_len ("%4lpm" CR_TAB
+- "push %3" CR_TAB
+- "adiw %2,1" CR_TAB
+- "%4lpm" CR_TAB
+- "mov %B0,%3" CR_TAB
+- "pop %A0", xop, plen, 6);
+-
+- avr_asm_len ("%4lpm" CR_TAB
+- "mov %A0,%3" CR_TAB
+- "adiw %2,1" CR_TAB
+- "%4lpm" CR_TAB
+- "mov %B0,%3", xop, plen, 5);
+-
+- if (!reg_unused_after (insn, addr))
+- avr_asm_len ("sbiw %2,1", xop, plen, 1);
+-
+- break; /* 2 */
+- }
+-
+- break; /* REG */
+-
+- case POST_INC:
+-
+- gcc_assert (REG_Z == REGNO (XEXP (addr, 0))
+- && n_bytes <= 4);
+-
+- if (regno_dest == LPM_REGNO)
+- avr_asm_len ("%4lpm" CR_TAB
+- "adiw %2,1", xop, plen, 2);
+- else
+- avr_asm_len ("%4lpm" CR_TAB
+- "mov %A0,%3" CR_TAB
+- "adiw %2,1", xop, plen, 3);
+-
+- if (n_bytes >= 2)
+- avr_asm_len ("%4lpm" CR_TAB
+- "mov %B0,%3" CR_TAB
+- "adiw %2,1", xop, plen, 3);
+-
+- if (n_bytes >= 3)
+- avr_asm_len ("%4lpm" CR_TAB
+- "mov %C0,%3" CR_TAB
+- "adiw %2,1", xop, plen, 3);
+-
+- if (n_bytes >= 4)
+- avr_asm_len ("%4lpm" CR_TAB
+- "mov %D0,%3" CR_TAB
+- "adiw %2,1", xop, plen, 3);
+-
+- break; /* POST_INC */
+-
+- } /* switch CODE (addr) */
+-
+- return "";
+-}
+-
+-
+ /* If PLEN == NULL: Ouput instructions to load a value from a memory location
+ OP[1] in AS1 to register OP[0].
+ If PLEN != 0 set *PLEN to the length in words of the instruction sequence.
+@@ -2607,13 +2509,11 @@
+ static const char*
+ avr_out_lpm (rtx insn, rtx *op, int *plen)
{
- int orig_flag_pic = flag_pic;
-+ rtx insn;
-
-- if (TARGET_VXWORKS_RTP)
+- rtx xop[6];
++ rtx xop[3];
+ rtx dest = op[0];
+ rtx src = SET_SRC (single_set (insn));
+ rtx addr;
+ int n_bytes = GET_MODE_SIZE (GET_MODE (dest));
+- int regno_dest;
+- int segment;
+ RTX_CODE code;
+ addr_space_t as = MEM_ADDR_SPACE (src);
+
+@@ -2634,135 +2534,126 @@
+ gcc_assert (REG_P (dest));
+ gcc_assert (REG == code || POST_INC == code);
+
++ /* Only 1-byte moves from __flash are representes as open coded
++ mov insns. All other loads from flash are not handled here but
++ by some UNSPEC instead, see respective FIXME in machine description. */
++
++ gcc_assert (as == ADDR_SPACE_FLASH);
++ gcc_assert (n_bytes == 1);
++
+ xop[0] = dest;
+- xop[1] = addr;
+- xop[2] = lpm_addr_reg_rtx;
+- xop[4] = xstring_empty;
+- xop[5] = tmp_reg_rtx;
++ xop[1] = lpm_addr_reg_rtx;
++ xop[2] = lpm_reg_rtx;
+
+- regno_dest = REGNO (dest);
+-
+- segment = avr_addrspace[as].segment;
+-
+- /* Set RAMPZ as needed. */
+-
+- if (segment)
++ switch (code)
+ {
+- xop[4] = GEN_INT (segment);
+-
+- if (xop[3] = avr_find_unused_d_reg (insn, lpm_addr_reg_rtx),
+- xop[3])
+- {
+- avr_asm_len ("ldi %3,%4" CR_TAB
+- "out __RAMPZ__,%3", xop, plen, 2);
+- }
+- else if (segment == 1)
+- {
+- avr_asm_len ("clr %5" CR_TAB
+- "inc %5" CR_TAB
+- "out __RAMPZ__,%5", xop, plen, 3);
+- }
+- else
+- {
+- avr_asm_len ("mov %5,%2" CR_TAB
+- "ldi %2,%4" CR_TAB
+- "out __RAMPZ__,%2" CR_TAB
+- "mov %2,%5", xop, plen, 4);
+- }
+-
+- xop[4] = xstring_e;
+-
+- if (!AVR_HAVE_ELPMX)
+- return avr_out_lpm_no_lpmx (insn, xop, plen);
+- }
+- else if (!AVR_HAVE_LPMX)
- {
-- emit_insn (gen_vxworks_load_got ());
-- emit_use (pic_offset_table_rtx);
-- return;
+- return avr_out_lpm_no_lpmx (insn, xop, plen);
- }
-+ /* The load_pcrel_sym{si,di} patterns require absolute addressing. */
-+ flag_pic = 0;
-+ if (TARGET_ARCH64)
-+ insn = gen_load_pcrel_symdi (op0, op1, op2, op3);
-+ else
-+ insn = gen_load_pcrel_symsi (op0, op1, op2, op3);
-+ flag_pic = orig_flag_pic;
-
-- /* If we haven't initialized the special PIC symbols, do so now. */
-- if (!pic_helper_needed)
+-
+- /* We have [E]LPMX: Output reading from Flash the comfortable way. */
+-
+- switch (GET_CODE (addr))
- {
-- char name[32];
-+ return insn;
-+}
+ default:
+ gcc_unreachable();
+
+ case REG:
+
+ gcc_assert (REG_Z == REGNO (addr));
++
++ return AVR_HAVE_LPMX
++ ? avr_asm_len ("lpm %0,%a1", xop, plen, 1)
++ : avr_asm_len ("lpm" CR_TAB
++ "mov %0,%2", xop, plen, 2);
++
++ case POST_INC:
++
++ gcc_assert (REG_Z == REGNO (XEXP (addr, 0)));
+
+- switch (n_bytes)
+- {
+- default:
+- gcc_unreachable();
++ return AVR_HAVE_LPMX
++ ? avr_asm_len ("lpm %0,%a1+", xop, plen, 1)
++ : avr_asm_len ("lpm" CR_TAB
++ "adiw %1, 1" CR_TAB
++ "mov %0,%2", xop, plen, 3);
++ }
-- pic_helper_needed = true;
-+/* Emit code to load the GOT register. */
+- case 1:
+- return avr_asm_len ("%4lpm %0,%a2", xop, plen, 1);
++ return "";
++}
-- get_pc_thunk_name (name, REGNO (pic_offset_table_rtx));
-- pic_helper_symbol = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
-+static void
-+load_got_register (void)
+- case 2:
+- if (REGNO (dest) == REG_Z)
+- return avr_asm_len ("%4lpm %5,%a2+" CR_TAB
+- "%4lpm %B0,%a2" CR_TAB
+- "mov %A0,%5", xop, plen, 3);
+- else
+- {
+- avr_asm_len ("%4lpm %A0,%a2+" CR_TAB
+- "%4lpm %B0,%a2", xop, plen, 2);
+-
+- if (!reg_unused_after (insn, addr))
+- avr_asm_len ("sbiw %2,1", xop, plen, 1);
+- }
+-
+- break; /* 2 */
+
+- case 3:
++/* If PLEN == NULL: Ouput instructions to load $0 with a value from
++ flash address $1:Z. If $1 = 0 we can use LPM to read, otherwise
++ use ELPM.
++ If PLEN != 0 set *PLEN to the length in words of the instruction sequence.
++ Return "". */
+
+- avr_asm_len ("%4lpm %A0,%a2+" CR_TAB
+- "%4lpm %B0,%a2+" CR_TAB
+- "%4lpm %C0,%a2", xop, plen, 3);
+-
+- if (!reg_unused_after (insn, addr))
+- avr_asm_len ("sbiw %2,2", xop, plen, 1);
+-
+- break; /* 3 */
++const char*
++avr_load_lpm (rtx insn, rtx *op, int *plen)
+{
-+ /* In PIC mode, this will retrieve pic_offset_table_rtx. */
-+ if (!global_offset_table_rtx)
-+ global_offset_table_rtx = gen_rtx_REG (Pmode, GLOBAL_OFFSET_TABLE_REGNUM);
-
-- global_offset_table = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
-+ if (TARGET_VXWORKS_RTP)
-+ emit_insn (gen_vxworks_load_got ());
-+ else
++ rtx xop[4];
++ int n, n_bytes = GET_MODE_SIZE (GET_MODE (op[0]));
++ rtx xsegment = op[1];
++ bool clobber_z = PARALLEL == GET_CODE (PATTERN (insn));
++ bool r30_in_tmp = false;
++
++ if (plen)
++ *plen = 0;
++
++ xop[1] = lpm_addr_reg_rtx;
++ xop[2] = lpm_reg_rtx;
++ xop[3] = xstring_empty;
++
++ /* Set RAMPZ as needed. */
++
++ if (REG_P (xsegment))
+ {
-+ /* The GOT symbol is subject to a PC-relative relocation so we need a
-+ helper function to add the PC value and thus get the final value. */
-+ if (!got_helper_rtx)
-+ {
-+ char name[32];
-+ get_pc_thunk_name (name, GLOBAL_OFFSET_TABLE_REGNUM);
-+ got_helper_rtx = gen_rtx_SYMBOL_REF (Pmode, ggc_strdup (name));
-+ }
-+
-+ emit_insn (gen_load_pcrel_sym (global_offset_table_rtx, sparc_got (),
-+ got_helper_rtx,
-+ GEN_INT (GLOBAL_OFFSET_TABLE_REGNUM)));
- }
-
-- flag_pic = 0;
-- if (TARGET_ARCH64)
-- emit_insn (gen_load_pcrel_symdi (pic_offset_table_rtx, global_offset_table,
-- pic_helper_symbol));
-- else
-- emit_insn (gen_load_pcrel_symsi (pic_offset_table_rtx, global_offset_table,
-- pic_helper_symbol));
-- flag_pic = orig_flag_pic;
++ avr_asm_len ("out __RAMPZ__,%0", &xsegment, plen, 1);
++ xop[3] = xstring_e;
++ }
++
++ /* Load the individual bytes from LSB to MSB. */
++
++ for (n = 0; n < n_bytes; n++)
++ {
++ xop[0] = all_regs_rtx[REGNO (op[0]) + n];
+
+- case 4:
-
- /* Need to emit this whether or not we obey regdecls,
- since setjmp/longjmp can cause life info to screw up.
- ??? In the case where we don't obey regdecls, this is not sufficient
- since we may not fall out the bottom. */
-- emit_use (pic_offset_table_rtx);
-+ emit_use (global_offset_table_rtx);
- }
+- avr_asm_len ("%4lpm %A0,%a2+" CR_TAB
+- "%4lpm %B0,%a2+", xop, plen, 2);
+-
+- if (REGNO (dest) == REG_Z - 2)
+- return avr_asm_len ("%4lpm %5,%a2+" CR_TAB
+- "%4lpm %C0,%a2" CR_TAB
+- "mov %D0,%5", xop, plen, 3);
+- else
++ if ((CONST_INT_P (xsegment) && AVR_HAVE_LPMX)
++ || (REG_P (xsegment) && AVR_HAVE_ELPMX))
++ {
++ if (n == n_bytes-1)
++ avr_asm_len ("%3lpm %0,%a1", xop, plen, 1);
++ else if (REGNO (xop[0]) == REG_Z)
+ {
+- avr_asm_len ("%4lpm %C0,%a2+" CR_TAB
+- "%4lpm %D0,%a2", xop, plen, 2);
+-
+- if (!reg_unused_after (insn, addr))
+- avr_asm_len ("sbiw %2,3", xop, plen, 1);
++ avr_asm_len ("%3lpm %2,%a1+", xop, plen, 1);
++ r30_in_tmp = true;
+ }
++ else
++ avr_asm_len ("%3lpm %0,%a1+", xop, plen, 1);
++ }
++ else
++ {
++ gcc_assert (clobber_z);
++
++ avr_asm_len ("%3lpm" CR_TAB
++ "mov %0,%2", xop, plen, 2);
+
+- break; /* 4 */
+- } /* n_bytes */
++ if (n != n_bytes-1)
++ avr_asm_len ("adiw %1,1", xop, plen, 1);
++ }
++ }
++
++ if (r30_in_tmp)
++ avr_asm_len ("mov %1,%2", xop, plen, 1);
++
++ if (!clobber_z
++ && n_bytes > 1
++ && !reg_unused_after (insn, lpm_addr_reg_rtx)
++ && !reg_overlap_mentioned_p (op[0], lpm_addr_reg_rtx))
++ {
++ xop[2] = GEN_INT (n_bytes-1);
++ avr_asm_len ("sbiw %1,%2", xop, plen, 1);
++ }
++
++ if (REG_P (xsegment) && AVR_HAVE_RAMPD)
++ {
++ /* Reset RAMPZ to 0 so that EBI devices don't read garbage from RAM */
+
+- break; /* REG */
++ avr_asm_len ("out __RAMPZ__,__zero_reg__", xop, plen, 1);
++ }
- /* Emit a call instruction with the pattern given by PAT. ADDR is the
-@@ -4113,7 +4169,7 @@
-
- /* Expand the function prologue. The prologue is responsible for reserving
- storage for the frame, saving the call-saved registers and loading the
-- PIC register if needed. */
-+ GOT register if needed. */
-
- void
- sparc_expand_prologue (void)
-@@ -4215,9 +4271,9 @@
- if (num_gfregs)
- emit_save_or_restore_regs (SORR_SAVE);
-
-- /* Load the PIC register if needed. */
-- if (flag_pic && crtl->uses_pic_offset_table)
-- load_pic_register ();
-+ /* Load the GOT register if needed. */
-+ if (crtl->uses_pic_offset_table)
-+ load_got_register ();
+- case POST_INC:
+-
+- gcc_assert (REG_Z == REGNO (XEXP (addr, 0))
+- && n_bytes <= 4);
+-
+- avr_asm_len ("%4lpm %A0,%a2+", xop, plen, 1);
+- if (n_bytes >= 2) avr_asm_len ("%4lpm %B0,%a2+", xop, plen, 1);
+- if (n_bytes >= 3) avr_asm_len ("%4lpm %C0,%a2+", xop, plen, 1);
+- if (n_bytes >= 4) avr_asm_len ("%4lpm %D0,%a2+", xop, plen, 1);
+-
+- break; /* POST_INC */
+-
+- } /* switch CODE (addr) */
+-
+ return "";
}
- /* This function generates the assembly code for function entry, which boils
-@@ -8705,7 +8761,7 @@
- /* Emit the sequence of insns SEQ while preserving the registers REG and REG2.
- This is achieved by means of a manual dynamic stack space allocation in
- the current frame. We make the assumption that SEQ doesn't contain any
-- function calls, with the possible exception of calls to the PIC helper. */
-+ function calls, with the possible exception of calls to the GOT helper. */
-
- static void
- emit_and_preserve (rtx seq, rtx reg, rtx reg2)
-@@ -8868,20 +8924,19 @@
- {
- /* The hoops we have to jump through in order to generate a sibcall
- without using delay slots... */
-- rtx spill_reg, spill_reg2, seq, scratch = gen_rtx_REG (Pmode, 1);
-+ rtx spill_reg, seq, scratch = gen_rtx_REG (Pmode, 1);
-
- if (flag_pic)
- {
- spill_reg = gen_rtx_REG (word_mode, 15); /* %o7 */
-- spill_reg2 = gen_rtx_REG (word_mode, PIC_OFFSET_TABLE_REGNUM);
- start_sequence ();
-- /* Delay emitting the PIC helper function because it needs to
-+ /* Delay emitting the GOT helper function because it needs to
- change the section and we are emitting assembly code. */
-- load_pic_register (); /* clobbers %o7 */
-+ load_got_register (); /* clobbers %o7 */
- scratch = legitimize_pic_address (funexp, scratch);
- seq = get_insns ();
- end_sequence ();
-- emit_and_preserve (seq, spill_reg, spill_reg2);
-+ emit_and_preserve (seq, spill_reg, pic_offset_table_rtx);
- }
- else if (TARGET_ARCH32)
- {
-@@ -9032,17 +9087,15 @@
- static void
- sparc_file_end (void)
- {
-- /* If need to emit the special PIC helper function, do so now. */
-- if (pic_helper_needed)
-+ /* If we need to emit the special GOT helper function, do so now. */
-+ if (got_helper_rtx)
- {
-- unsigned int regno = REGNO (pic_offset_table_rtx);
-- const char *pic_name = reg_names[regno];
-- char name[32];
-+ const char *name = XSTR (got_helper_rtx, 0);
-+ const char *reg_name = reg_names[GLOBAL_OFFSET_TABLE_REGNUM];
- #ifdef DWARF2_UNWIND_INFO
- bool do_cfi;
- #endif
-
-- get_pc_thunk_name (name, regno);
- if (USE_HIDDEN_LINKONCE)
- {
- tree decl = build_decl (BUILTINS_LOCATION, FUNCTION_DECL,
-@@ -9055,7 +9108,9 @@
- make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl));
- DECL_VISIBILITY (decl) = VISIBILITY_HIDDEN;
- DECL_VISIBILITY_SPECIFIED (decl) = 1;
-+ resolve_unique_section (decl, 0, flag_function_sections);
- allocate_struct_function (decl, true);
-+ cfun->is_thunk = 1;
- current_function_decl = decl;
- init_varasm_status ();
- assemble_start_function (decl, name);
-@@ -9076,10 +9131,10 @@
- #endif
- if (flag_delayed_branch)
- fprintf (asm_out_file, "\tjmp\t%%o7+8\n\t add\t%%o7, %s, %s\n",
-- pic_name, pic_name);
-+ reg_name, reg_name);
- else
- fprintf (asm_out_file, "\tadd\t%%o7, %s, %s\n\tjmp\t%%o7+8\n\t nop\n",
-- pic_name, pic_name);
-+ reg_name, reg_name);
- #ifdef DWARF2_UNWIND_INFO
- if (do_cfi)
- fprintf (asm_out_file, "\t.cfi_endproc\n");
-Index: gcc/config/sparc/sparc.h
-===================================================================
---- gcc/config/sparc/sparc.h (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/sparc/sparc.h (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -964,10 +964,15 @@
- not be a register used by the prologue. */
- #define STATIC_CHAIN_REGNUM (TARGET_ARCH64 ? 5 : 2)
+@@ -2782,8 +2673,9 @@
+ if (plen)
+ *plen = 0;
-+/* Register which holds the global offset table, if any. */
-+
-+#define GLOBAL_OFFSET_TABLE_REGNUM 23
-+
- /* Register which holds offset table for position-independent
- data references. */
+- avr_asm_len ("ld %3,%a2" CR_TAB
+- "sbrs %1,7", xop, plen, 2);
++ avr_asm_len ("sbrc %1,7" CR_TAB
++ "ld %3,%a2" CR_TAB
++ "sbrs %1,7", xop, plen, 3);
--#define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 23 : INVALID_REGNUM)
-+#define PIC_OFFSET_TABLE_REGNUM \
-+ (flag_pic ? GLOBAL_OFFSET_TABLE_REGNUM : INVALID_REGNUM)
+ avr_asm_len (AVR_HAVE_LPMX ? "lpm %3,%a2" : "lpm", xop, plen, 1);
- /* Pick a default value we can notice from override_options:
- !v9: Default is on.
-Index: gcc/config/i386/i386.md
-===================================================================
---- gcc/config/i386/i386.md (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/i386/i386.md (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -92,6 +92,7 @@
- (UNSPEC_TLS_GD 21)
- (UNSPEC_TLS_LD_BASE 22)
- (UNSPEC_TLSDESC 23)
-+ (UNSPEC_TLS_IE_SUN 24)
-
- ; Other random patterns
- (UNSPEC_SCAS 30)
-@@ -14702,6 +14703,18 @@
- (set_attr "memory" "load")
- (set_attr "imm_disp" "false")])
-
-+;; The Sun linker took the AMD64 TLS spec literally and can only handle
-+;; %rax as destination of the initial executable code sequence.
-+(define_insn "tls_initial_exec_64_sun"
-+ [(set (match_operand:DI 0 "register_operand" "=a")
-+ (unspec:DI
-+ [(match_operand:DI 1 "tls_symbolic_operand" "")]
-+ UNSPEC_TLS_IE_SUN))
-+ (clobber (reg:CC FLAGS_REG))]
-+ "TARGET_64BIT && TARGET_SUN_TLS"
-+ "mov{q}\t{%%fs:0, %0|%0, QWORD PTR fs:0}\n\tadd{q}\t{%a1@gottpoff(%%rip), %0|%0, %a1@gottpoff[rip]}"
-+ [(set_attr "type" "multi")])
-+
- ;; GNU2 TLS patterns can be split.
-
- (define_expand "tls_dynamic_gnu2_32"
-Index: gcc/config/i386/i386.c
-===================================================================
---- gcc/config/i386/i386.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/i386/i386.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -10438,6 +10438,17 @@
- case TLS_MODEL_INITIAL_EXEC:
- if (TARGET_64BIT)
- {
-+ if (TARGET_SUN_TLS)
-+ {
-+ /* The Sun linker took the AMD64 TLS spec literally
-+ and can only handle %rax as destination of the
-+ initial executable code sequence. */
-+
-+ dest = gen_reg_rtx (Pmode);
-+ emit_insn (gen_tls_initial_exec_64_sun (dest, x));
-+ return dest;
-+ }
-+
- pic = NULL;
- type = UNSPEC_GOTNTPOFF;
- }
-Index: gcc/config/arm/arm.c
-===================================================================
---- gcc/config/arm/arm.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/arm/arm.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1114,6 +1114,7 @@
- va_list_type);
- DECL_ARTIFICIAL (va_list_name) = 1;
- TYPE_NAME (va_list_type) = va_list_name;
-+ TYPE_STUB_DECL (va_list_type) = va_list_name;
- /* Create the __ap field. */
- ap_field = build_decl (BUILTINS_LOCATION,
- FIELD_DECL,
-Index: gcc/config/pa/pa.md
-===================================================================
---- gcc/config/pa/pa.md (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/pa/pa.md (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -811,7 +811,7 @@
- (match_operand:DI 3 "arith11_operand" "rI"))
- (match_operand:DI 1 "register_operand" "r")))]
- "TARGET_64BIT"
-- "sub%I3 %3,%2,%%r0\;add,dc %%r0,%1,%0"
-+ "sub%I3,* %3,%2,%%r0\;add,dc %%r0,%1,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -833,7 +833,7 @@
- (match_operand:DI 3 "register_operand" "r"))
- (match_operand:DI 1 "register_operand" "r")))]
- "TARGET_64BIT"
-- "sub %2,%3,%%r0\;add,dc %%r0,%1,%0"
-+ "sub,* %2,%3,%%r0\;add,dc %%r0,%1,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -856,7 +856,7 @@
- (match_operand:DI 3 "int11_operand" "I"))
- (match_operand:DI 1 "register_operand" "r")))]
- "TARGET_64BIT"
-- "addi %k3,%2,%%r0\;add,dc %%r0,%1,%0"
-+ "addi,* %k3,%2,%%r0\;add,dc %%r0,%1,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -902,7 +902,7 @@
- (gtu:DI (match_operand:DI 2 "register_operand" "r")
- (match_operand:DI 3 "arith11_operand" "rI"))))]
- "TARGET_64BIT"
-- "sub%I3 %3,%2,%%r0\;sub,db %1,%%r0,%0"
-+ "sub%I3,* %3,%2,%%r0\;sub,db %1,%%r0,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -924,7 +924,7 @@
- (match_operand:DI 3 "arith11_operand" "rI")))
- (match_operand:DI 4 "register_operand" "r")))]
- "TARGET_64BIT"
-- "sub%I3 %3,%2,%%r0\;sub,db %1,%4,%0"
-+ "sub%I3,* %3,%2,%%r0\;sub,db %1,%4,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -946,7 +946,7 @@
- (ltu:DI (match_operand:DI 2 "register_operand" "r")
- (match_operand:DI 3 "register_operand" "r"))))]
- "TARGET_64BIT"
-- "sub %2,%3,%%r0\;sub,db %1,%%r0,%0"
-+ "sub,* %2,%3,%%r0\;sub,db %1,%%r0,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -968,7 +968,7 @@
- (match_operand:DI 3 "register_operand" "r")))
- (match_operand:DI 4 "register_operand" "r")))]
- "TARGET_64BIT"
-- "sub %2,%3,%%r0\;sub,db %1,%4,%0"
-+ "sub,* %2,%3,%%r0\;sub,db %1,%4,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -991,7 +991,7 @@
- (leu:DI (match_operand:DI 2 "register_operand" "r")
- (match_operand:DI 3 "int11_operand" "I"))))]
- "TARGET_64BIT"
-- "addi %k3,%2,%%r0\;sub,db %1,%%r0,%0"
-+ "addi,* %k3,%2,%%r0\;sub,db %1,%%r0,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-@@ -1013,7 +1013,7 @@
- (match_operand:DI 3 "int11_operand" "I")))
- (match_operand:DI 4 "register_operand" "r")))]
- "TARGET_64BIT"
-- "addi %k3,%2,%%r0\;sub,db %1,%4,%0"
-+ "addi,* %k3,%2,%%r0\;sub,db %1,%4,%0"
- [(set_attr "type" "binary")
- (set_attr "length" "8")])
-
-Index: gcc/config/pa/pa.c
-===================================================================
---- gcc/config/pa/pa.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ gcc/config/pa/pa.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -6097,37 +6097,94 @@
+@@ -2794,13 +2686,11 @@
}
- /* Return TRUE if INSN, a jump insn, has an unfilled delay slot and
-- it branches to the next real instruction. Otherwise, return FALSE. */
-+ it branches into the delay slot. Otherwise, return FALSE. */
- static bool
- branch_to_delay_slot_p (rtx insn)
+-const char *
+-output_movqi (rtx insn, rtx operands[], int *l)
++const char*
++output_movqi (rtx insn, rtx operands[], int *real_l)
{
-+ rtx jump_insn;
-+
- if (dbr_sequence_length ())
- return FALSE;
-
-- return next_real_insn (JUMP_LABEL (insn)) == next_real_insn (insn);
-+ jump_insn = next_active_insn (JUMP_LABEL (insn));
-+ while (insn)
-+ {
-+ insn = next_active_insn (insn);
-+ if (jump_insn == insn)
-+ return TRUE;
-+
-+ /* We can't rely on the length of asms. So, we return FALSE when
-+ the branch is followed by an asm. */
-+ if (!insn
-+ || GET_CODE (PATTERN (insn)) == ASM_INPUT
-+ || extract_asm_operands (PATTERN (insn)) != NULL_RTX
-+ || get_attr_length (insn) > 0)
-+ break;
-+ }
-+
-+ return FALSE;
- }
-
--/* Return TRUE if INSN, a jump insn, needs a nop in its delay slot.
-+/* Return TRUE if INSN, a forward jump insn, needs a nop in its delay slot.
-
- This occurs when INSN has an unfilled delay slot and is followed
-- by an ASM_INPUT. Disaster can occur if the ASM_INPUT is empty and
-- the jump branches into the delay slot. So, we add a nop in the delay
-- slot just to be safe. This messes up our instruction count, but we
-- don't know how big the ASM_INPUT insn is anyway. */
-+ by an asm. Disaster can occur if the asm is empty and the jump
-+ branches into the delay slot. So, we add a nop in the delay slot
-+ when this occurs. */
+- int dummy;
+ rtx dest = operands[0];
+ rtx src = operands[1];
+- int *real_l = l;
+
+ if (avr_mem_flash_p (src)
+ || avr_mem_flash_p (dest))
+@@ -2808,10 +2698,8 @@
+ return avr_out_lpm (insn, operands, real_l);
+ }
+- if (!l)
+- l = &dummy;
+-
+- *l = 1;
++ if (real_l)
++ *real_l = 1;
+
+ if (register_operand (dest, QImode))
+ {
+@@ -2829,10 +2717,10 @@
+ output_reload_in_const (operands, NULL_RTX, real_l, false);
+ return "";
+ }
+- else if (GET_CODE (src) == MEM)
++ else if (MEM_P (src))
+ return out_movqi_r_mr (insn, operands, real_l); /* mov r,m */
+ }
+- else if (GET_CODE (dest) == MEM)
++ else if (MEM_P (dest))
+ {
+ rtx xop[2];
+
+@@ -6533,6 +6421,7 @@
+ case ADJUST_LEN_MOV32: output_movsisf (insn, op, &len); break;
+ case ADJUST_LEN_MOVMEM: avr_out_movmem (insn, op, &len); break;
+ case ADJUST_LEN_XLOAD: avr_out_xload (insn, op, &len); break;
++ case ADJUST_LEN_LOAD_LPM: avr_load_lpm (insn, op, &len); break;
+
+ case ADJUST_LEN_TSTHI: avr_out_tsthi (insn, op, &len); break;
+ case ADJUST_LEN_TSTPSI: avr_out_tstpsi (insn, op, &len); break;
+@@ -8975,7 +8864,7 @@
+
+ /* Implement `MODE_CODE_BASE_REG_CLASS'. */
+
+-reg_class_t
++enum reg_class
+ avr_mode_code_base_reg_class (enum machine_mode mode ATTRIBUTE_UNUSED,
+ addr_space_t as, RTX_CODE outer_code,
+ RTX_CODE index_code ATTRIBUTE_UNUSED)
+@@ -9568,7 +9457,8 @@
static bool
- branch_needs_nop_p (rtx insn)
+ avr_reg_ok_for_pgm_addr (rtx reg, bool strict)
{
-- rtx next_insn;
-+ rtx jump_insn;
+- gcc_assert (REG_P (reg));
++ if (!REG_P (reg))
++ return false;
- if (dbr_sequence_length ())
- return FALSE;
+ if (strict)
+ {
+@@ -9916,7 +9806,7 @@
+ case ADDR_SPACE_FLASH:
-- next_insn = next_real_insn (insn);
-- return GET_CODE (PATTERN (next_insn)) == ASM_INPUT;
-+ jump_insn = next_active_insn (JUMP_LABEL (insn));
-+ while (insn)
-+ {
-+ insn = next_active_insn (insn);
-+ if (!insn || jump_insn == insn)
-+ return TRUE;
-+
-+ if (!(GET_CODE (PATTERN (insn)) == ASM_INPUT
-+ || extract_asm_operands (PATTERN (insn)) != NULL_RTX)
-+ && get_attr_length (insn) > 0)
-+ break;
-+ }
-+
-+ return FALSE;
- }
+ if (AVR_HAVE_LPMX)
+- avr_asm_len ("lpm %2,%Z+", xop, plen, 1);
++ avr_asm_len ("lpm %2,Z+", xop, plen, 1);
+ else
+ avr_asm_len ("lpm" CR_TAB
+ "adiw r30,1", xop, plen, 2);
+@@ -9965,6 +9855,14 @@
+ \f
+ /* Helper for __builtin_avr_delay_cycles */
-+/* Return TRUE if INSN, a forward jump insn, can use nullification
-+ to skip the following instruction. This avoids an extra cycle due
-+ to a mis-predicted branch when we fall through. */
-+
-+static bool
-+use_skip_p (rtx insn)
++static rtx
++avr_mem_clobber (void)
+{
-+ rtx jump_insn = next_active_insn (JUMP_LABEL (insn));
-+
-+ while (insn)
-+ {
-+ insn = next_active_insn (insn);
-+
-+ /* We can't rely on the length of asms, so we can't skip asms. */
-+ if (!insn
-+ || GET_CODE (PATTERN (insn)) == ASM_INPUT
-+ || extract_asm_operands (PATTERN (insn)) != NULL_RTX)
-+ break;
-+ if (get_attr_length (insn) == 4
-+ && jump_insn == next_active_insn (insn))
-+ return TRUE;
-+ if (get_attr_length (insn) > 0)
-+ break;
-+ }
-+
-+ return FALSE;
++ rtx mem = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++ MEM_VOLATILE_P (mem) = 1;
++ return mem;
+}
+
- /* This routine handles all the normal conditional branch sequences we
- might need to generate. It handles compare immediate vs compare
- register, nullification of delay slots, varying length branches,
-@@ -6139,7 +6196,7 @@
- output_cbranch (rtx *operands, int negated, rtx insn)
- {
- static char buf[100];
-- int useskip = 0;
-+ bool useskip;
- int nullify = INSN_ANNULLED_BRANCH_P (insn);
- int length = get_attr_length (insn);
- int xdelay;
-@@ -6177,12 +6234,7 @@
- /* A forward branch over a single nullified insn can be done with a
- comclr instruction. This avoids a single cycle penalty due to
- mis-predicted branch if we fall through (branch not taken). */
-- if (length == 4
-- && next_real_insn (insn) != 0
-- && get_attr_length (next_real_insn (insn)) == 4
-- && JUMP_LABEL (insn) == next_nonnote_insn (next_real_insn (insn))
-- && nullify)
-- useskip = 1;
-+ useskip = (length == 4 && nullify) ? use_skip_p (insn) : FALSE;
-
- switch (length)
- {
-@@ -6470,7 +6522,7 @@
- output_bb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
+ static void
+ avr_expand_delay_cycles (rtx operands0)
{
- static char buf[100];
-- int useskip = 0;
-+ bool useskip;
- int nullify = INSN_ANNULLED_BRANCH_P (insn);
- int length = get_attr_length (insn);
- int xdelay;
-@@ -6496,14 +6548,8 @@
- /* A forward branch over a single nullified insn can be done with a
- extrs instruction. This avoids a single cycle penalty due to
- mis-predicted branch if we fall through (branch not taken). */
-+ useskip = (length == 4 && nullify) ? use_skip_p (insn) : FALSE;
-
-- if (length == 4
-- && next_real_insn (insn) != 0
-- && get_attr_length (next_real_insn (insn)) == 4
-- && JUMP_LABEL (insn) == next_nonnote_insn (next_real_insn (insn))
-- && nullify)
-- useskip = 1;
--
- switch (length)
+@@ -9976,7 +9874,8 @@
{
+ loop_count = ((cycles - 9) / 6) + 1;
+ cycles_used = ((loop_count - 1) * 6) + 9;
+- emit_insn (gen_delay_cycles_4 (gen_int_mode (loop_count, SImode)));
++ emit_insn (gen_delay_cycles_4 (gen_int_mode (loop_count, SImode),
++ avr_mem_clobber()));
+ cycles -= cycles_used;
+ }
+
+@@ -9986,7 +9885,8 @@
+ if (loop_count > 0xFFFFFF)
+ loop_count = 0xFFFFFF;
+ cycles_used = ((loop_count - 1) * 5) + 7;
+- emit_insn (gen_delay_cycles_3 (gen_int_mode (loop_count, SImode)));
++ emit_insn (gen_delay_cycles_3 (gen_int_mode (loop_count, SImode),
++ avr_mem_clobber()));
+ cycles -= cycles_used;
+ }
+
+@@ -9996,7 +9896,8 @@
+ if (loop_count > 0xFFFF)
+ loop_count = 0xFFFF;
+ cycles_used = ((loop_count - 1) * 4) + 5;
+- emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode)));
++ emit_insn (gen_delay_cycles_2 (gen_int_mode (loop_count, HImode),
++ avr_mem_clobber()));
+ cycles -= cycles_used;
+ }
+
+@@ -10006,7 +9907,8 @@
+ if (loop_count > 255)
+ loop_count = 255;
+ cycles_used = loop_count * 3;
+- emit_insn (gen_delay_cycles_1 (gen_int_mode (loop_count, QImode)));
++ emit_insn (gen_delay_cycles_1 (gen_int_mode (loop_count, QImode),
++ avr_mem_clobber()));
+ cycles -= cycles_used;
+ }
+
+@@ -11007,6 +10909,9 @@
+ #undef TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS
+ #define TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS avr_addr_space_legitimize_address
+
++#undef TARGET_MODE_DEPENDENT_ADDRESS_P
++#define TARGET_MODE_DEPENDENT_ADDRESS_P avr_mode_dependent_address_p
++
+ #undef TARGET_PRINT_OPERAND
+ #define TARGET_PRINT_OPERAND avr_print_operand
+ #undef TARGET_PRINT_OPERAND_ADDRESS
+Index: gcc/config/epiphany/epiphany.c
+===================================================================
+--- gcc/config/epiphany/epiphany.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/epiphany/epiphany.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1417,7 +1417,7 @@
+ return gen_rtx_REG (mode, 0);
+ }
-@@ -6661,7 +6707,7 @@
- output_bvb (rtx *operands ATTRIBUTE_UNUSED, int negated, rtx insn, int which)
+-bool
++static bool
+ epiphany_function_value_regno_p (const unsigned int regno ATTRIBUTE_UNUSED)
{
- static char buf[100];
-- int useskip = 0;
-+ bool useskip;
- int nullify = INSN_ANNULLED_BRANCH_P (insn);
- int length = get_attr_length (insn);
- int xdelay;
-@@ -6687,14 +6733,8 @@
- /* A forward branch over a single nullified insn can be done with a
- extrs instruction. This avoids a single cycle penalty due to
- mis-predicted branch if we fall through (branch not taken). */
-+ useskip = (length == 4 && nullify) ? use_skip_p (insn) : FALSE;
-
-- if (length == 4
-- && next_real_insn (insn) != 0
-- && get_attr_length (next_real_insn (insn)) == 4
-- && JUMP_LABEL (insn) == next_nonnote_insn (next_real_insn (insn))
-- && nullify)
-- useskip = 1;
--
- switch (length)
- {
-
-Index: libstdc++-v3/ChangeLog
+ return regno == 0;
+Index: gcc/config/rs6000/vector.md
===================================================================
---- libstdc++-v3/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libstdc++-v3/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,11 @@
-+2010-12-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
-+
-+ Backport from mainline:
-+ 2010-12-10 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
-+
-+ * testsuite/lib/libstdc++.exp (v3-build_support): Delete
-+ libtestc++.a before creation.
-+
- 2010-12-16 Release Manager
-
- * GCC 4.5.2 released.
-Index: libstdc++-v3/testsuite/lib/libstdc++.exp
+--- gcc/config/rs6000/vector.md (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/rs6000/vector.md (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -516,6 +516,94 @@
+ "VECTOR_UNIT_ALTIVEC_P (<MODE>mode)"
+ "")
+
++(define_insn_and_split "*vector_uneq<mode>"
++ [(set (match_operand:VEC_F 0 "vfloat_operand" "")
++ (uneq:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
++ (match_operand:VEC_F 2 "vfloat_operand" "")))]
++ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
++ "#"
++ ""
++ [(set (match_dup 3)
++ (gt:VEC_F (match_dup 1)
++ (match_dup 2)))
++ (set (match_dup 4)
++ (gt:VEC_F (match_dup 2)
++ (match_dup 1)))
++ (set (match_dup 0)
++ (not:VEC_F (ior:VEC_F (match_dup 3)
++ (match_dup 4))))]
++ "
++{
++ operands[3] = gen_reg_rtx (<MODE>mode);
++ operands[4] = gen_reg_rtx (<MODE>mode);
++}")
++
++(define_insn_and_split "*vector_ltgt<mode>"
++ [(set (match_operand:VEC_F 0 "vfloat_operand" "")
++ (ltgt:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
++ (match_operand:VEC_F 2 "vfloat_operand" "")))]
++ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
++ "#"
++ ""
++ [(set (match_dup 3)
++ (gt:VEC_F (match_dup 1)
++ (match_dup 2)))
++ (set (match_dup 4)
++ (gt:VEC_F (match_dup 2)
++ (match_dup 1)))
++ (set (match_dup 0)
++ (ior:VEC_F (match_dup 3)
++ (match_dup 4)))]
++ "
++{
++ operands[3] = gen_reg_rtx (<MODE>mode);
++ operands[4] = gen_reg_rtx (<MODE>mode);
++}")
++
++(define_insn_and_split "*vector_ordered<mode>"
++ [(set (match_operand:VEC_F 0 "vfloat_operand" "")
++ (ordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
++ (match_operand:VEC_F 2 "vfloat_operand" "")))]
++ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
++ "#"
++ ""
++ [(set (match_dup 3)
++ (ge:VEC_F (match_dup 1)
++ (match_dup 2)))
++ (set (match_dup 4)
++ (ge:VEC_F (match_dup 2)
++ (match_dup 1)))
++ (set (match_dup 0)
++ (ior:VEC_F (match_dup 3)
++ (match_dup 4)))]
++ "
++{
++ operands[3] = gen_reg_rtx (<MODE>mode);
++ operands[4] = gen_reg_rtx (<MODE>mode);
++}")
++
++(define_insn_and_split "*vector_unordered<mode>"
++ [(set (match_operand:VEC_F 0 "vfloat_operand" "")
++ (unordered:VEC_F (match_operand:VEC_F 1 "vfloat_operand" "")
++ (match_operand:VEC_F 2 "vfloat_operand" "")))]
++ "VECTOR_UNIT_ALTIVEC_OR_VSX_P (<MODE>mode)"
++ "#"
++ ""
++ [(set (match_dup 3)
++ (ge:VEC_F (match_dup 1)
++ (match_dup 2)))
++ (set (match_dup 4)
++ (ge:VEC_F (match_dup 2)
++ (match_dup 1)))
++ (set (match_dup 0)
++ (not:VEC_F (ior:VEC_F (match_dup 3)
++ (match_dup 4))))]
++ "
++{
++ operands[3] = gen_reg_rtx (<MODE>mode);
++ operands[4] = gen_reg_rtx (<MODE>mode);
++}")
++
+ ;; Note the arguments for __builtin_altivec_vsel are op2, op1, mask
+ ;; which is in the reverse order that we want
+ (define_expand "vector_select_<mode>"
+Index: gcc/config/rs6000/rs6000.c
===================================================================
---- libstdc++-v3/testsuite/lib/libstdc++.exp (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libstdc++-v3/testsuite/lib/libstdc++.exp (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -586,6 +586,15 @@
- }
-
- # Collect into libtestc++.a
-+ # Delete libtestc++.a first. Mixed 32 and 64-bit archives cannot be
-+ # linked on IRIX 6.
-+ # Use same procedure as gcc-dg.exp (remove-build-file).
-+ if [is_remote host] {
-+ # Ensure the host knows the file is gone by deleting there
-+ # first.
-+ remote_file host delete "./libtestc++.a"
-+ }
-+ remote_file build delete "./libtestc++.a"
- if [info exists env(AR)] {
- set ar $env(AR)
- } else {
-Index: libffi/ChangeLog
+--- gcc/config/rs6000/rs6000.c (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ gcc/config/rs6000/rs6000.c (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -16137,6 +16137,10 @@
+ case EQ:
+ case GT:
+ case GTU:
++ case ORDERED:
++ case UNORDERED:
++ case UNEQ:
++ case LTGT:
+ mask = gen_reg_rtx (mode);
+ emit_insn (gen_rtx_SET (VOIDmode,
+ mask,
+Index: libgo/go/syscall/syscall_unix.go
===================================================================
---- libffi/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libffi/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,11 @@
-+2010-12-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
-+
-+ Backport from mainline:
-+ 2010-12-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
-+
-+ * testsuite/libffi.call/ffitest.h [__sgi] (PRId64, PRIu64): Define.
-+ (PRIuPTR): Define.
-+
- 2010-12-16 Release Manager
-
- * GCC 4.5.2 released.
-Index: libffi/testsuite/libffi.call/ffitest.h
+--- libgo/go/syscall/syscall_unix.go (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libgo/go/syscall/syscall_unix.go (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -31,6 +31,7 @@
+ // expects a 32-bit one.
+ func Syscall(trap, a1, a2, a3 uintptr) (r1, r2 uintptr, err Errno) {
+ Entersyscall()
++ SetErrno(0)
+ var r uintptr
+ if unsafe.Sizeof(r) == 4 {
+ r1 := c_syscall32(int32(trap), int32(a1), int32(a2), int32(a3), 0, 0, 0)
+@@ -46,6 +47,7 @@
+
+ func Syscall6(trap, a1, a2, a3, a4, a5, a6 uintptr) (r1, r2 uintptr, err Errno) {
+ Entersyscall()
++ SetErrno(0)
+ var r uintptr
+ if unsafe.Sizeof(r) == 4 {
+ r1 := c_syscall32(int32(trap), int32(a1), int32(a2), int32(a3),
+@@ -63,6 +65,7 @@
+
+ func RawSyscall(trap, a1, a2, a3 uintptr) (r1, r2 uintptr, err Errno) {
+ var r uintptr
++ SetErrno(0)
+ if unsafe.Sizeof(r) == 4 {
+ r1 := c_syscall32(int32(trap), int32(a1), int32(a2), int32(a3), 0, 0, 0)
+ r = uintptr(r1)
+@@ -76,6 +79,7 @@
+
+ func RawSyscall6(trap, a1, a2, a3, a4, a5, a6 uintptr) (r1, r2 uintptr, err Errno) {
+ var r uintptr
++ SetErrno(0)
+ if unsafe.Sizeof(r) == 4 {
+ r1 := c_syscall32(int32(trap), int32(a1), int32(a2), int32(a3),
+ int32(a4), int32(a5), int32(a6))
+Index: libffi/src/powerpc/aix.S
===================================================================
---- libffi/testsuite/libffi.call/ffitest.h (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libffi/testsuite/libffi.call/ffitest.h (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -77,6 +77,26 @@
- #define PRIuPTR "lu"
- #endif
-
-+/* IRIX kludge. */
-+#if defined(__sgi)
-+/* IRIX 6.5 <inttypes.h> provides all definitions, but only for C99
-+ compilations. */
-+#if (_MIPS_SZLONG == 32)
-+#define PRId64 "lld"
-+#define PRIu64 "llu"
-+#endif
-+/* This doesn't match <inttypes.h>, which always has "lld" here, but the
-+ arguments are uint64_t, int64_t, which are unsigned long, long for
-+ 64-bit in <sgidefs.h>. */
-+#if (_MIPS_SZLONG == 64)
-+#define PRId64 "ld"
-+#define PRIu64 "lu"
-+#endif
-+/* This doesn't match <inttypes.h>, which has "u" here, but the arguments
-+ are uintptr_t, which is always unsigned long. */
-+#define PRIuPTR "lu"
-+#endif
-+
- /* Solaris < 10 kludge. */
- #if defined(__sun__) && defined(__svr4__) && !defined(PRIuPTR)
- #if defined(__arch64__) || defined (__x86_64__)
-Index: libjava/classpath/lib/java/security/VMAccessController.class
+--- libffi/src/powerpc/aix.S (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libffi/src/powerpc/aix.S (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,5 +1,5 @@
+ /* -----------------------------------------------------------------------
+- aix.S - Copyright (c) 2002,2009 Free Software Foundation, Inc.
++ aix.S - Copyright (c) 2002, 2009 Free Software Foundation, Inc.
+ based on darwin.S by John Hornkvist
+
+ PowerPC Assembly glue.
+@@ -79,6 +79,8 @@
+ .set f20,20
+ .set f21,21
+
++ .extern .ffi_prep_args
++
+ #define LIBFFI_ASM
+ #include <fficonfig.h>
+ #include <ffi.h>
+@@ -125,6 +127,7 @@
+ /* Call ffi_prep_args. */
+ mr r4, r1
+ bl .ffi_prep_args
++ nop
+
+ /* Now do the call. */
+ ld r0, 0(r29)
+@@ -226,6 +229,7 @@
+ /* Call ffi_prep_args. */
+ mr r4, r1
+ bl .ffi_prep_args
++ nop
+
+ /* Now do the call. */
+ lwz r0, 0(r29)
+Index: libffi/src/powerpc/aix_closure.S
===================================================================
-Nie można wyświetlić: plik binarny.
-svn:mime-type = application/octet-stream
-Index: libjava/ChangeLog
+--- libffi/src/powerpc/aix_closure.S (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libffi/src/powerpc/aix_closure.S (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -79,6 +79,8 @@
+ .set f20,20
+ .set f21,21
+
++ .extern .ffi_closure_helper_DARWIN
++
+ #define LIBFFI_ASM
+ #define JUMPTARGET(name) name
+ #define L(x) x
+@@ -165,6 +167,7 @@
+
+ /* look up the proper starting point in table */
+ /* by using return type as offset */
++ lhz r3, 10(r3) /* load type from return type */
+ ld r4, LC..60(2) /* get address of jump table */
+ sldi r3, r3, 4 /* now multiply return type by 16 */
+ ld r0, 240+16(r1) /* load return address */
+@@ -337,8 +340,9 @@
+
+ /* look up the proper starting point in table */
+ /* by using return type as offset */
++ lhz r3, 6(r3) /* load type from return type */
+ lwz r4, LC..60(2) /* get address of jump table */
+- slwi r3, r3, 4 /* now multiply return type by 4 */
++ slwi r3, r3, 4 /* now multiply return type by 16 */
+ lwz r0, 176+8(r1) /* load return address */
+ add r3, r3, r4 /* add contents of table to table address */
+ mtctr r3
+Index: libffi/ChangeLog
===================================================================
---- libjava/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libjava/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,24 @@
-+2011-01-07 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+--- libffi/ChangeLog (.../tags/gcc_4_7_0_release) (wersja 185750)
++++ libffi/ChangeLog (.../branches/gcc-4_7-branch) (wersja 185750)
+@@ -1,3 +1,17 @@
++2012-03-22 David Edelsohn <dje.gcc@gmail.com>
+
+ Backport from mainline:
-+ 2011-01-06 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
++ 2012-03-09 David Edelsohn <dje.gcc@gmail.com>
+
-+ * testsuite/libjava.jni/jni.exp (gcj_jni_get_cxxflags_invocation):
-+ Add -shared-libgcc to cxxflags for *-*-solaris*.
-+ Remove -lsocket.
-+
-+2010-12-13 Andrew John Hughes <ahughes@redhat.com>
-+
-+ PR libgcj/46774
-+ * libjava/java/security/VMAccessController.java:
-+ (DEFAULT_CONTEXT): Create ProtectionDomain with
-+ four argument constructor (arguments are the same
-+ as those implied by the two argument constructor).
-+ (getContext()): Create ProtectionDomain instances
-+ with four argument constructor using a null Principal
-+ array (as before) but including the classloader, which
-+ was always null before.
-+
- 2010-12-16 Release Manager
-
- * GCC 4.5.2 released.
-Index: libjava/testsuite/libjava.jni/jni.exp
-===================================================================
---- libjava/testsuite/libjava.jni/jni.exp (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libjava/testsuite/libjava.jni/jni.exp (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -274,8 +274,10 @@
- eval lappend cxxflags "-shared-libgcc -lgcj $libiconv"
- }
-
-+ # Make sure libgcc unwinder is used on 64-bit Solaris 10+/x86 rather than
-+ # the libc one.
- if { [istarget "*-*-solaris*"] } {
-- lappend cxxflags "-lsocket"
-+ lappend cxxflags "-shared-libgcc"
- }
-
- return $cxxflags
-Index: libjava/java/security/VMAccessController.java
-===================================================================
---- libjava/java/security/VMAccessController.java (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libjava/java/security/VMAccessController.java (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -56,7 +56,7 @@
- Permissions permissions = new Permissions();
- permissions.add(new AllPermission());
- ProtectionDomain[] domain = new ProtectionDomain[] {
-- new ProtectionDomain(source, permissions)
-+ new ProtectionDomain(source, permissions, null, null)
- };
- DEFAULT_CONTEXT = new AccessControlContext(domain);
- }
-@@ -178,12 +178,13 @@
- for (int i = 3; i < classes.length; i++)
- {
- Class clazz = classes[i];
-+ ClassLoader loader = clazz.getClassLoader();
-
- if (DEBUG)
- {
- debug("checking " + clazz);
- // subject to getClassLoader RuntimePermission
-- debug("loader = " + clazz.getClassLoader());
-+ debug("loader = " + loader);
- }
-
- if (privileged && i == classes.length - 2)
-@@ -208,7 +209,8 @@
- // Create a static snapshot of this domain, which may change over time
- // if the current policy changes.
- domains.add(new ProtectionDomain(domain.getCodeSource(),
-- domain.getPermissions()));
-+ domain.getPermissions(),
-+ loader, null));
- }
-
- if (DEBUG)
-Index: libcpp/directives.c
-===================================================================
---- libcpp/directives.c (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libcpp/directives.c (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -280,16 +280,17 @@
- static void
- end_directive (cpp_reader *pfile, int skip_line)
- {
-- if (pfile->state.in_deferred_pragma)
-- ;
-- else if (CPP_OPTION (pfile, traditional))
-+ if (CPP_OPTION (pfile, traditional))
- {
- /* Revert change of prepare_directive_trad. */
-- pfile->state.prevent_expansion--;
-+ if (!pfile->state.in_deferred_pragma)
-+ pfile->state.prevent_expansion--;
-
- if (pfile->directive != &dtable[T_DEFINE])
- _cpp_remove_overlay (pfile);
- }
-+ else if (pfile->state.in_deferred_pragma)
-+ ;
- /* We don't skip for an assembler #. */
- else if (skip_line)
- {
-Index: libcpp/ChangeLog
-===================================================================
---- libcpp/ChangeLog (.../tags/gcc_4_5_2_release) (wersja 168599)
-+++ libcpp/ChangeLog (.../branches/gcc-4_5-branch) (wersja 168599)
-@@ -1,3 +1,10 @@
-+2011-11-04 Eric Botcazou <ebotcazou@adacore.com>
-+ Jakub Jelinek <jakub@redhat.com>
++ * src/powerpc/aix_closure.S (ffi_closure_ASM): Adjust for Darwin64
++ change to return value of ffi_closure_helper_DARWIN and load type
++ from return type.
+
-+ PR preprocessor/39213
-+ * directives.c (end_directive): Call _cpp_remove_overlay for deferred
-+ pragmas as well in traditional mode.
++ From Tom Honermann <tom.honermann@oracle.com>:
++ * src/powerpc/aix.S: Declare .ffi_prep_args. Insert nops after
++ branch instructions.
++ * src/powerpc/aix_closure.S: Declare .ffi_closure_helper_DARWIN.
+
- 2010-12-16 Release Manager
+ 2012-03-22 Release Manager
- * GCC 4.5.2 released.
+ * GCC 4.7.0 released.
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