diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
---- gcc/config/avr/avr.c 2011-09-02 11:40:55.000000000 +0300
-+++ gcc/config/avr/avr.c 2011-09-02 11:40:01.000000000 +0300
-@@ -52,6 +52,7 @@
+--- gcc/config/avr/avr.c 2011-10-27 16:55:55.000000000 +0530
++++ gcc/config/avr/avr.c 2011-10-27 17:00:24.000000000 +0530
+@@ -52,6 +52,7 @@ static void avr_option_override (void);
static int avr_naked_function_p (tree);
static int interrupt_function_p (tree);
static int signal_function_p (tree);
static int avr_OS_task_function_p (tree);
static int avr_OS_main_function_p (tree);
static int avr_regs_to_save (HARD_REG_SET *);
-@@ -122,6 +123,7 @@ static const struct attribute_spec avr_a
+@@ -131,6 +132,7 @@ static const struct attribute_spec avr_a
{ "progmem", 0, 0, false, false, false, avr_handle_progmem_attribute },
{ "signal", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "interrupt", 0, 0, true, false, false, avr_handle_fndecl_attribute },
{ "naked", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_task", 0, 0, false, true, true, avr_handle_fntype_attribute },
{ "OS_main", 0, 0, false, true, true, avr_handle_fntype_attribute },
-@@ -314,6 +316,21 @@ signal_function_p (tree func)
+@@ -391,6 +393,21 @@ signal_function_p (tree func)
return a != NULL_TREE;
}
/* Return nonzero if FUNC is a OS_task function. */
static int
-@@ -543,6 +560,7 @@ expand_prologue (void)
+@@ -655,6 +672,7 @@ expand_prologue (void)
cfun->machine->is_naked = avr_naked_function_p (current_function_decl);
cfun->machine->is_interrupt = interrupt_function_p (current_function_decl);
cfun->machine->is_signal = signal_function_p (current_function_decl);
cfun->machine->is_OS_task = avr_OS_task_function_p (current_function_decl);
cfun->machine->is_OS_main = avr_OS_main_function_p (current_function_decl);
cfun->machine->stack_usage = 0;
-@@ -583,18 +601,49 @@ expand_prologue (void)
+@@ -688,9 +706,40 @@ expand_prologue (void)
/* Push SREG. */
- insn = emit_move_insn (tmp_reg_rtx,
-- gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)));
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
- RTX_FRAME_RELATED_P (insn) = 1;
- insn = emit_move_insn (pushbyte, tmp_reg_rtx);
- RTX_FRAME_RELATED_P (insn) = 1;
- cfun->machine->stack_usage++;
+ /* ??? There's no dwarf2 column reserved for SREG. */
+- emit_move_insn (tmp_reg_rtx, gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)));
++ emit_move_insn (tmp_reg_rtx, gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)));
+ emit_push_byte (TMP_REGNO, false);
+ /* Push RAMPD, RAMPX, RAMPY. */
-+ if (AVR_HAVE_RAMPX_Y_D)
-+ {
-+ /* Push RAMPD. */
-+ insn = emit_move_insn (tmp_reg_rtx,
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)));
-+ RTX_FRAME_RELATED_P (insn) = 1;
-+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
-+ RTX_FRAME_RELATED_P (insn) = 1;
++ /*
++ Clear RAMP? registers if used for data access in the interrupt/signal
++ context. Do this after the zero register has been explictly cleared.
++ */
++ if (AVR_HAVE_RAMPX_Y_D)
++ {
++ /* Push RAMPD. */
++ emit_move_insn (tmp_reg_rtx,
++ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)));
++ emit_push_byte (TMP_REGNO, false);
+
+ /* Push RAMPX. */
+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
+ {
-+ insn = emit_move_insn (tmp_reg_rtx,
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)));
-+ RTX_FRAME_RELATED_P (insn) = 1;
-+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
-+ RTX_FRAME_RELATED_P (insn) = 1;
++ emit_move_insn (tmp_reg_rtx,
++ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)));
++ emit_push_byte (TMP_REGNO, false);
+ }
+
+ /* Push RAMPY. */
+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
+ {
-+ insn = emit_move_insn (tmp_reg_rtx,
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)));
-+ RTX_FRAME_RELATED_P (insn) = 1;
-+ insn = emit_move_insn (pushbyte, tmp_reg_rtx);
-+ RTX_FRAME_RELATED_P (insn) = 1;
++ emit_move_insn (tmp_reg_rtx,
++ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)));
++ emit_push_byte (TMP_REGNO, false);
+ }
-+ }
++
++ }
++
+
/* Push RAMPZ. */
- if(AVR_HAVE_RAMPZ
- && (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
+ /* ??? There's no dwarf2 column reserved for RAMPZ. */
+ if (AVR_HAVE_RAMPZ
+@@ -698,7 +747,7 @@ expand_prologue (void)
+ && TEST_HARD_REG_BIT (set, REG_Z + 1))
{
- insn = emit_move_insn (tmp_reg_rtx,
-- gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)));
-+ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)));
- RTX_FRAME_RELATED_P (insn) = 1;
- insn = emit_move_insn (pushbyte, tmp_reg_rtx);
- RTX_FRAME_RELATED_P (insn) = 1;
-@@ -607,6 +656,41 @@ expand_prologue (void)
+ emit_move_insn (tmp_reg_rtx,
+- gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)));
++ gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)));
+ emit_push_byte (TMP_REGNO, false);
+ }
+
+@@ -707,6 +756,8 @@ expand_prologue (void)
/* Prevent any attempt to delete the setting of ZERO_REG! */
emit_use (zero_reg_rtx);
+
-+
-+ /*
-+ Clear RAMP? registers if used for data access in the interrupt/signal
-+ context. Do this after the zero register has been explictly cleared.
-+ */
-+ if (AVR_HAVE_RAMPX_Y_D)
-+ {
-+ /* Set RAMPD to 0. */
-+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)), const0_rtx);
-+ RTX_FRAME_RELATED_P (insn) = 1;
-+
-+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
-+ {
-+ /* Set RAMPX to 0. */
-+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)), const0_rtx);
-+ RTX_FRAME_RELATED_P (insn) = 1;
-+ }
-+
-+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
-+ {
-+ /* Set RAMPY to 0. */
-+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)), const0_rtx);
-+ RTX_FRAME_RELATED_P (insn) = 1;
-+ }
-+
-+ if(AVR_HAVE_RAMPZ
-+ && (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
-+ {
-+ /* Set RAMPZ to 0. */
-+ insn = emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)), const0_rtx);
-+ RTX_FRAME_RELATED_P (insn) = 1;
-+ }
-+ }
+
}
if (minimize && (frame_pointer_needed
|| (AVR_2_BYTE_PC && live_seq > 6)
-@@ -698,16 +782,16 @@ expand_prologue (void)
- insn = emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
- RTX_FRAME_RELATED_P (insn) = 1;
+@@ -829,14 +880,14 @@ expand_prologue (void)
+ {
+ emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
- else if (TARGET_NO_INTERRUPTS
-- || cfun->machine->is_signal
-- || cfun->machine->is_OS_main)
-+ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS)
-+ || (!AVR_XMEGA && cfun->machine->is_signal)
-+ || (!AVR_XMEGA && cfun->machine->is_OS_main))
++ else if ((!AVR_XMEGA && TARGET_NO_INTERRUPTS )
+ || cfun->machine->is_signal
+ || cfun->machine->is_OS_main)
{
- insn =
- emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
- frame_pointer_rtx));
- RTX_FRAME_RELATED_P (insn) = 1;
+ emit_insn (gen_movhi_sp_r_irq_off (stack_pointer_rtx,
+ frame_pointer_rtx));
}
- else if (cfun->machine->is_interrupt)
+ else if (!AVR_XMEGA && cfun->machine->is_interrupt)
{
- insn = emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
- frame_pointer_rtx));
-@@ -878,13 +962,13 @@ expand_epilogue (void)
+ emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
+ frame_pointer_rtx));
+@@ -1018,13 +1069,13 @@ expand_epilogue (void)
{
emit_move_insn (stack_pointer_rtx, frame_pointer_rtx);
}
{
emit_insn (gen_movhi_sp_r_irq_on (stack_pointer_rtx,
frame_pointer_rtx));
-@@ -937,14 +1021,39 @@ expand_epilogue (void)
- && (TEST_HARD_REG_BIT (set, REG_Z) && TEST_HARD_REG_BIT (set, REG_Z + 1)))
+@@ -1082,14 +1133,38 @@ expand_epilogue (void)
+ && TEST_HARD_REG_BIT (set, REG_Z + 1))
{
- emit_insn (gen_popqi (tmp_reg_rtx));
-- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(RAMPZ_ADDR)),
-+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_RAMPZ_ADDR)),
-+ tmp_reg_rtx);
-+ }
-+
-+ /* Restore RAMPY, RAMPX, RAMPD using tmp reg as scratch. */
-+ if (AVR_HAVE_RAMPX_Y_D)
-+ {
-+ /* Pop RAMPY. */
-+ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
-+ {
-+ emit_insn (gen_popqi (tmp_reg_rtx));
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)),
-+ tmp_reg_rtx);
-+ }
-+
-+ /* Pop RAMPX. */
-+ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
-+ {
-+ emit_insn (gen_popqi (tmp_reg_rtx));
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)),
-+ tmp_reg_rtx);
-+ }
-+
-+ /* Pop RAMPD. */
-+ emit_insn (gen_popqi (tmp_reg_rtx));
-+ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)),
+ emit_pop_byte (TMP_REGNO);
+- emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (RAMPZ_ADDR)),
++ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPZ_ADDR)),
tmp_reg_rtx);
}
++ /* Restore RAMPY, RAMPX, RAMPD using tmp reg as scratch. */
++ if (AVR_HAVE_RAMPX_Y_D)
++ {
++ /* Pop RAMPY. */
++ if (TEST_HARD_REG_BIT (set, REG_Y) && TEST_HARD_REG_BIT (set, REG_Y + 1))
++ {
++ emit_insn (gen_popqi (tmp_reg_rtx));
++ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPY_ADDR)),
++ tmp_reg_rtx);
++ }
++
++ /* Pop RAMPX. */
++ if (TEST_HARD_REG_BIT (set, REG_X) && TEST_HARD_REG_BIT (set, REG_X + 1))
++ {
++ emit_insn (gen_popqi (tmp_reg_rtx));
++ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPX_ADDR)),
++ tmp_reg_rtx);
++ }
++ /* Pop RAMPD. */
++ emit_insn (gen_popqi (tmp_reg_rtx));
++ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_RAMPD_ADDR)),
++ tmp_reg_rtx);
++
++ }
/* Restore SREG using tmp reg as scratch. */
- emit_insn (gen_popqi (tmp_reg_rtx));
+ emit_pop_byte (TMP_REGNO);
-- emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(SREG_ADDR)),
-+ emit_move_insn (gen_rtx_MEM(QImode, GEN_INT(AVR_SREG_ADDR)),
+- emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (SREG_ADDR)),
++ emit_move_insn (gen_rtx_MEM (QImode, GEN_INT (AVR_SREG_ADDR)),
tmp_reg_rtx);
/* Restore tmp REG. */
-@@ -1722,9 +1831,17 @@ output_movhi (rtx insn, rtx operands[],
+@@ -1880,9 +1955,17 @@ output_movhi (rtx insn, rtx operands[],
return *l = 1, AS2 (out,__SP_L__,%A1);
/* Use simple load of stack pointer if no interrupts are
used. */
*l = 5;
return (AS2 (in,__tmp_reg__,__SREG__) CR_TAB
"cli" CR_TAB
-@@ -1732,6 +1849,7 @@ output_movhi (rtx insn, rtx operands[],
+@@ -1890,6 +1973,7 @@ output_movhi (rtx insn, rtx operands[],
AS2 (out,__SREG__,__tmp_reg__) CR_TAB
AS2 (out,__SP_L__,%A1));
}
else if (test_hard_reg_class (STACK_REG, src))
{
*l = 2;
-@@ -1865,7 +1983,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int
+@@ -2023,7 +2107,7 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
{
*l = 1;
return AS2 (in,%0,__SREG__);
-@@ -1873,7 +1991,8 @@ out_movqi_r_mr (rtx insn, rtx op[], int
+@@ -2031,7 +2115,8 @@ out_movqi_r_mr (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (x, QImode))
{
*l = 1;
}
*l = 2;
return AS2 (lds,%0,%m1);
-@@ -2061,8 +2180,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
+@@ -2219,8 +2304,9 @@ out_movhi_r_mr (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (base, HImode))
{
*l = 2;
}
*l = 4;
return (AS2 (lds,%A0,%m1) CR_TAB
-@@ -2561,7 +2681,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int
+@@ -2719,7 +2805,7 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (CONSTANT_ADDRESS_P (x))
{
{
*l = 1;
return AS2 (out,__SREG__,%1);
-@@ -2569,7 +2689,8 @@ out_movqi_mr_r (rtx insn, rtx op[], int
+@@ -2727,7 +2813,8 @@ out_movqi_mr_r (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (x, QImode))
{
*l = 1;
}
*l = 2;
return AS2 (sts,%m0,%1);
-@@ -2648,9 +2769,18 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+@@ -2806,9 +2893,18 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (optimize > 0 && io_address_operand (base, HImode))
{
*l = 2;
return *l = 4, (AS2 (sts,%m0+1,%B1) CR_TAB
AS2 (sts,%m0,%A1));
}
-@@ -2667,11 +2797,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+@@ -2825,11 +2921,20 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (adiw,r26,1) CR_TAB
AS2 (st,X,__tmp_reg__));
else
}
else
{
-@@ -2679,14 +2818,27 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+@@ -2837,14 +2942,27 @@ out_movhi_mr_r (rtx insn, rtx op[], int
return *l=2, (AS2 (st,X+,%A1) CR_TAB
AS2 (st,X,%B1));
else
}
else if (GET_CODE (base) == PLUS)
{
-@@ -2697,6 +2849,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+@@ -2855,6 +2973,8 @@ out_movhi_mr_r (rtx insn, rtx op[], int
if (reg_base != REG_Y)
fatal_insn ("incorrect insn:",insn);
if (disp <= 63 + MAX_LD_OFFSET (GET_MODE (dest)))
return *l = 4, (AS2 (adiw,r28,%o0-62) CR_TAB
AS2 (std,Y+63,%B1) CR_TAB
-@@ -2710,11 +2864,29 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+@@ -2868,11 +2988,29 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS2 (subi,r28,lo8(%o0)) CR_TAB
AS2 (sbci,r29,hi8(%o0)));
}
*l = 7;
return (AS2 (mov,__tmp_reg__,r26) CR_TAB
AS2 (mov,__zero_reg__,r27) CR_TAB
-@@ -2724,21 +2896,57 @@ out_movhi_mr_r (rtx insn, rtx op[], int
+@@ -2882,21 +3020,57 @@ out_movhi_mr_r (rtx insn, rtx op[], int
AS1 (clr,__zero_reg__) CR_TAB
AS2 (sbiw,r26,%o0));
}
{
if (REGNO (XEXP (base, 0)) == REG_X)
{
-@@ -4874,6 +5082,16 @@ avr_asm_declare_function_name (FILE *fil
+@@ -5047,6 +5221,16 @@ avr_asm_declare_function_name (FILE *fil
}
}
ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
ASM_OUTPUT_LABEL (file, name);
}
-@@ -5174,7 +5392,8 @@ avr_file_start (void)
+@@ -5387,7 +5571,8 @@ avr_file_start (void)
/* fprintf (asm_out_file, "\t.arch %s\n", avr_mcu_name);*/
fputs ("__SREG__ = 0x3f\n"
"__SP_H__ = 0x3e\n"
fputs ("__tmp_reg__ = 0\n"
"__zero_reg__ = 1\n", asm_out_file);
-@@ -6273,16 +6492,17 @@ avr_out_sbxx_branch (rtx insn, rtx opera
+@@ -6527,16 +6712,17 @@ avr_out_sbxx_branch (rtx insn, rtx opera
if (GET_CODE (operands[1]) == CONST_INT)
{
output_asm_insn (AS2 (sbrs,__tmp_reg__,%2), operands);
else
diff -Naurp gcc/config/avr/avr-c.c gcc/config/avr/avr-c.c
---- gcc/config/avr/avr-c.c 2009-12-24 23:32:38.000000000 +0300
-+++ gcc/config/avr/avr-c.c 2011-09-02 11:40:01.000000000 +0300
+--- gcc/config/avr/avr-c.c 2011-10-27 16:55:06.000000000 +0530
++++ gcc/config/avr/avr-c.c 2011-10-27 17:00:24.000000000 +0530
@@ -81,5 +81,18 @@ avr_cpu_cpp_builtins (struct cpp_reader
if (TARGET_NO_INTERRUPTS)
}
diff -Naurp gcc/config/avr/avr-devices.c gcc/config/avr/avr-devices.c
---- gcc/config/avr/avr-devices.c 2009-07-17 21:49:03.000000000 +0300
-+++ gcc/config/avr/avr-devices.c 2011-09-02 11:42:48.000000000 +0300
+--- gcc/config/avr/avr-devices.c 2011-10-27 16:55:06.000000000 +0530
++++ gcc/config/avr/avr-devices.c 2011-10-27 17:00:24.000000000 +0530
@@ -36,7 +36,14 @@ const struct base_arch_s avr_arch_types[
{ 0, 1, 0, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=4", "avr4" },
{ 0, 1, 1, 1, 0, 0, 0, 0, 0, 0x0060, "__AVR_ARCH__=5", "avr5" },
};
/* List of all known AVR MCU types - if updated, it has to be kept
-@@ -189,6 +196,38 @@ const struct mcu_type_s avr_mcu_types[]
+@@ -216,6 +223,38 @@ const struct mcu_type_s avr_mcu_types[]
{ "avr6", ARCH_AVR6, NULL, 0, 0x0200, "m2561" },
- { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2561" },
+ { "atmega2560", ARCH_AVR6, "__AVR_ATmega2560__", 0, 0x0200, "m2560" },
{ "atmega2561", ARCH_AVR6, "__AVR_ATmega2561__", 0, 0x0200, "m2561" },
+ /* Enhanced, == 256K. */
+ /* Xmega, <= 8K FLASH. */
+ { "avrxmega2", ARCH_AVRXMEGA2, NULL, 0, 0x2000, "x32a4" },
+ { "atxmega16a4", ARCH_AVRXMEGA2, "__AVR_ATxmega16A4__", 0, 0x2000, "x16a4" },
+ { "atxmega16d4", ARCH_AVRXMEGA2, "__AVR_ATxmega16D4__", 0, 0x2000, "x16d4" },
-+ { "atxmega16x1", ARCH_AVRXMEGA2, "__AVR_ATxmega16X1__", 0, 0x2000, "x16x1" },
+ { "atxmega32a4", ARCH_AVRXMEGA2, "__AVR_ATxmega32A4__", 0, 0x2000, "x32a4" },
+ { "atxmega32d4", ARCH_AVRXMEGA2, "__AVR_ATxmega32D4__", 0, 0x2000, "x32d4" },
++ { "atxmega32x1", ARCH_AVRXMEGA2, "__AVR_ATxmega32X1__", 0, 0x2000, "x32x1" },
+ /* Xmega, > 8K, <= 64K FLASH, > 64K RAM. */
+ /* { "avrxmega3", ARCH_AVRXMEGA3, NULL }, */
+ /* Xmega, > 64K, <= 128K FLASH, <= 64K RAM. */
{ "avr1", ARCH_AVR1, NULL, 0, 0x0060, "s1200" },
{ "at90s1200", ARCH_AVR1, "__AVR_AT90S1200__", 0, 0x0060, "s1200" },
diff -Naurp gcc/config/avr/avr.h gcc/config/avr/avr.h
---- gcc/config/avr/avr.h 2010-01-12 02:12:14.000000000 +0300
-+++ gcc/config/avr/avr.h 2011-09-02 11:40:01.000000000 +0300
+--- gcc/config/avr/avr.h 2011-10-27 16:55:06.000000000 +0530
++++ gcc/config/avr/avr.h 2011-10-27 17:00:24.000000000 +0530
@@ -45,11 +45,11 @@ struct base_arch_s {
/* Core have 'EICALL' and 'EIJMP' instructions. */
int have_eijmp_eicall;
+#define AVR_SREG_ADDR (AVR_XMEGA ? 0x3F: 0x5F)
#define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
- #define OVERRIDE_OPTIONS avr_override_options ()
-@@ -842,6 +857,10 @@ struct GTY(()) machine_function
+ #define BITS_BIG_ENDIAN 0
+@@ -822,6 +837,10 @@ struct GTY(()) machine_function
as specified by the "signal" attribute. */
int is_signal;
as specified by the "OS_task" attribute. */
int is_OS_task;
diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
---- gcc/config/avr/avr.md 2011-09-02 11:40:55.000000000 +0300
-+++ gcc/config/avr/avr.md 2011-09-02 11:40:01.000000000 +0300
-@@ -49,9 +49,6 @@
+--- gcc/config/avr/avr.md 2011-10-27 16:55:55.000000000 +0530
++++ gcc/config/avr/avr.md 2011-10-27 17:00:24.000000000 +0530
+@@ -48,9 +48,6 @@
(TMP_REGNO 0) ; temporary register r0
(ZERO_REGNO 1) ; zero register r1
(UNSPEC_STRLEN 0)
(UNSPEC_INDEX_JMP 1)
(UNSPEC_SEI 2)
-@@ -2962,7 +2959,8 @@
+@@ -2969,7 +2966,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (~INTVAL (operands[1]) & 0xff));
}
[(set_attr "length" "1")
(set_attr "cc" "none")])
-@@ -2974,7 +2972,8 @@
+@@ -2981,7 +2979,8 @@
"(optimize > 0)"
{
operands[2] = GEN_INT (exact_log2 (INTVAL (operands[1]) & 0xff));
[(set_attr "length" "1")
(set_attr "cc" "none")])
diff -Naurp gcc/config/avr/libgcc.S gcc/config/avr/libgcc.S
---- gcc/config/avr/libgcc.S 2011-09-02 11:40:55.000000000 +0300
-+++ gcc/config/avr/libgcc.S 2011-09-02 11:40:01.000000000 +0300
-@@ -637,11 +637,19 @@ __prologue_saves__:
+--- gcc/config/avr/libgcc.S 2011-10-27 16:55:55.000000000 +0530
++++ gcc/config/avr/libgcc.S 2011-10-27 17:00:24.000000000 +0530
+@@ -638,11 +638,19 @@ __prologue_saves__:
in r29,__SP_H__
sub r28,r26
sbc r29,r27
#if defined (__AVR_HAVE_EIJMP_EICALL__)
eijmp
#else
-@@ -679,11 +687,18 @@ __epilogue_restores__:
+@@ -680,11 +688,18 @@ __epilogue_restores__:
ldd r27,Y+1
add r28,r30
adc r29,__zero_reg__
mov_h r29, r27
ret
diff -Naurp gcc/config/avr/predicates.md gcc/config/avr/predicates.md
---- gcc/config/avr/predicates.md 2009-12-24 22:53:57.000000000 +0300
-+++ gcc/config/avr/predicates.md 2011-09-02 11:40:01.000000000 +0300
+--- gcc/config/avr/predicates.md 2011-10-27 16:55:06.000000000 +0530
++++ gcc/config/avr/predicates.md 2011-10-27 17:00:24.000000000 +0530
@@ -45,17 +45,23 @@
;; Return true if OP is a valid address for lower half of I/O space.
(define_predicate "low_io_address_operand"
;; Return 1 if OP is the zero constant for MODE.
(define_predicate "const0_operand"
diff -Naurp gcc/config/avr/t-avr gcc/config/avr/t-avr
---- gcc/config/avr/t-avr 2011-09-02 11:40:55.000000000 +0300
-+++ gcc/config/avr/t-avr 2011-09-02 11:41:56.000000000 +0300
+--- gcc/config/avr/t-avr 2011-10-27 16:55:55.000000000 +0530
++++ gcc/config/avr/t-avr 2011-10-27 17:00:24.000000000 +0530
@@ -107,8 +107,8 @@ fp-bit.c: $(srcdir)/config/fp-bit.c $(sr
FPBIT = fp-bit.c
# The many avr2 matches are not listed here - this is the default.
MULTILIB_MATCHES = \
-@@ -223,7 +223,25 @@ MULTILIB_MATCHES = \
- mmcu?avr51=mmcu?m3000s \
- mmcu?avr51=mmcu?m3001b \
+@@ -252,7 +252,25 @@ MULTILIB_MATCHES = \
+ mmcu?avr51=mmcu?at90usb1286 \
+ mmcu?avr51=mmcu?at90usb1287 \
mmcu?avr6=mmcu?atmega2560 \
- mmcu?avr6=mmcu?atmega2561
+ mmcu?avr6=mmcu?atmega2561 \
+ mmcu?avrxmega2=mmcu?atxmega16a4 \
+ mmcu?avrxmega2=mmcu?atxmega16d4 \
-+ mmcu?avrxmega2=mmcu?atxmega16x1 \
+ mmcu?avrxmega2=mmcu?atxmega32d4 \
+ mmcu?avrxmega2=mmcu?atxmega32a4 \
++ mmcu?avrxmega2=mmcu?atxmega32x1 \
+ mmcu?avrxmega4=mmcu?atxmega64a3 \
+ mmcu?avrxmega4=mmcu?atxmega64d3 \
+ mmcu?avrxmega5=mmcu?atxmega64a1 \
projects / packages / crossavr-gcc.git / blobdiff