1 Patch carried over from the prior iasl package and updated. This allows
2 for builds on systems requiring aligned memory access. Please see
3 http://lists.acpica.org/pipermail/devel/2010-July/000159.html. Resolves
4 BZ#865013 and BZ#856856.
7 Add more platforms to the list of the ones requiring aligned memory access.
8 Also fix callsites where wrong assumptions where made in terms of aligment.
10 Signed-off-by: Mattia Dongili <malattia@linux.it>
11 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
13 source/compiler/asltree.c | 15 ++++++++++-----
14 source/components/executer/exoparg2.c | 12 +++++++++---
15 source/include/actypes.h | 26 +++++++++++++-------------
16 3 file modificati, 32 inserzioni(+), 21 rimozioni(-)
18 diff --git a/source/compiler/asltree.c b/source/compiler/asltree.c
19 index ebf87f3..fd859d7 100644
20 --- a/source/compiler/asltree.c
21 +++ b/source/compiler/asltree.c
22 @@ -782,28 +592,31 @@ TrCreateValuedLeafNode (
23 "\nCreateValuedLeafNode Ln/Col %u/%u NewNode %p Op %s Value %8.8X%8.8X ",
24 Op->Asl.LineNumber, Op->Asl.Column, Op, UtGetOpName(ParseOpcode),
25 ACPI_FORMAT_UINT64 (Value));
26 - Op->Asl.Value.Integer = Value;
30 case PARSEOP_STRING_LITERAL:
32 - DbgPrint (ASL_PARSE_OUTPUT, "STRING->%s", Value);
33 + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
34 + DbgPrint (ASL_PARSE_OUTPUT, "STRING->%s", Op->Asl.Value.String);
39 - DbgPrint (ASL_PARSE_OUTPUT, "NAMESEG->%s", Value);
40 + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
41 + DbgPrint (ASL_PARSE_OUTPUT, "NAMESEG->%s", Op->Asl.Value.String);
44 case PARSEOP_NAMESTRING:
46 - DbgPrint (ASL_PARSE_OUTPUT, "NAMESTRING->%s", Value);
47 + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
48 + DbgPrint (ASL_PARSE_OUTPUT, "NAMESTRING->%s", Op->Asl.Value.String);
53 - DbgPrint (ASL_PARSE_OUTPUT, "EISAID->%s", Value);
54 + Op->Asl.Value.String = (ACPI_STRING) (ACPI_SIZE) Value;
55 + DbgPrint (ASL_PARSE_OUTPUT, "EISAID->%s", Op->Asl.Value.String);
59 @@ -813,11 +622,13 @@ TrCreateValuedLeafNode (
63 + Op->Asl.Value.Integer = Value;
64 DbgPrint (ASL_PARSE_OUTPUT, "INTEGER");
69 + Op->Asl.Value.Integer = Value;
73 diff --git a/source/components/executer/exoparg2.c b/source/components/executer/exoparg2.c
74 index e55f40c..ed5b1fd 100644
75 --- a/source/components/executer/exoparg2.c
76 +++ b/source/components/executer/exoparg2.c
77 @@ -172,6 +176,8 @@ AcpiExOpcode_2A_2T_1R (
78 ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
79 ACPI_OPERAND_OBJECT *ReturnDesc1 = NULL;
80 ACPI_OPERAND_OBJECT *ReturnDesc2 = NULL;
81 + UINT64 ReturnValue1 = 0;
82 + UINT64 ReturnValue2 = 0;
86 @@ -205,8 +211,10 @@ AcpiExOpcode_2A_2T_1R (
88 Status = AcpiUtDivide (Operand[0]->Integer.Value,
89 Operand[1]->Integer.Value,
90 - &ReturnDesc1->Integer.Value,
91 - &ReturnDesc2->Integer.Value);
92 + &ReturnValue1, &ReturnValue2);
93 + ReturnDesc1->Integer.Value = ReturnValue1;
94 + ReturnDesc2->Integer.Value = ReturnValue2;
96 if (ACPI_FAILURE (Status))
99 @@ -280,6 +285,7 @@ AcpiExOpcode_2A_1T_1R (
100 ACPI_OPERAND_OBJECT **Operand = &WalkState->Operands[0];
101 ACPI_OPERAND_OBJECT *ReturnDesc = NULL;
103 + UINT64 ReturnValue = 0;
104 ACPI_STATUS Status = AE_OK;
105 ACPI_SIZE Length = 0;
107 @@ -323,7 +333,8 @@ AcpiExOpcode_2A_1T_1R (
108 Status = AcpiUtDivide (Operand[0]->Integer.Value,
109 Operand[1]->Integer.Value,
111 - &ReturnDesc->Integer.Value);
113 + ReturnDesc->Integer.Value = ReturnValue;
116 case AML_CONCAT_OP: /* Concatenate (Data1, Data2, Result) */
117 diff --git a/source/include/actypes.h b/source/include/actypes.h
118 index 07fb7d5..08bdf2f 100644
119 --- a/source/include/actypes.h
120 +++ b/source/include/actypes.h
121 @@ -143,6 +156,19 @@ typedef COMPILER_DEPENDENT_INT64 INT64;
123 #define ACPI_THREAD_ID UINT64
126 + * In the case of the Itanium Processor Family (IPF), the hardware does not
127 + * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag
128 + * to indicate that special precautions must be taken to avoid alignment faults.
129 + * (IA64 or ia64 is currently used by existing compilers to indicate IPF.)
131 + * Note: EM64T and other X86-64 processors support misaligned transfers,
132 + * so there is no need to define this flag.
134 +#if defined (__IA64__) || defined (__ia64__) || defined(__alpha__) || defined(__sparc__) || defined(__hppa__) || defined(__arm__)
135 +#define ACPI_MISALIGNMENT_NOT_SUPPORTED
139 /*******************************************************************************
141 @@ -169,19 +182,6 @@ typedef UINT64 ACPI_PHYSICAL_ADDRESS;
142 #define ACPI_SIZE_MAX ACPI_UINT64_MAX
143 #define ACPI_USE_NATIVE_DIVIDE /* Has native 64-bit integer support */
146 - * In the case of the Itanium Processor Family (IPF), the hardware does not
147 - * support misaligned memory transfers. Set the MISALIGNMENT_NOT_SUPPORTED flag
148 - * to indicate that special precautions must be taken to avoid alignment faults.
149 - * (IA64 or ia64 is currently used by existing compilers to indicate IPF.)
151 - * Note: EM64T and other X86-64 processors support misaligned transfers,
152 - * so there is no need to define this flag.
154 -#if defined (__IA64__) || defined (__ia64__)
155 -#define ACPI_MISALIGNMENT_NOT_SUPPORTED
159 /*******************************************************************************