- up to 3.9.0

[packages/valgrind.git] / valgrind-native-cpuid.patch

diff --git a/valgrind-native-cpuid.patch b/valgrind-native-cpuid.patch
index df4bf8d21eeef386b58dea9428fad484c933f5af..4e92dfea6835f31c73a648b6dca96c1d2cd4fdbc 100644 (file)
--- a/valgrind-native-cpuid.patch
+++ b/valgrind-native-cpuid.patch
@@ -13,10 +13,11 @@ diff -uNr valgrind-3.6.0.orig/coregrind/m_main.c valgrind-3.6.0/coregrind/m_main
 diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_defs.h valgrind-3.6.0/VEX/priv/guest_amd64_defs.h
 --- valgrind-3.6.0.orig/VEX/priv/guest_amd64_defs.h    2010-10-20 22:19:51.000000000 +0200
 +++ valgrind-3.6.0/VEX/priv/guest_amd64_defs.h 2011-01-17 20:38:57.815124615 +0100
-@@ -147,6 +147,7 @@
+@@ -161,7 +161,8 @@
  extern void  amd64g_dirtyhelper_CPUID_baseline ( VexGuestAMD64State* st );
  extern void  amd64g_dirtyhelper_CPUID_sse3_and_cx16 ( VexGuestAMD64State* st );
  extern void  amd64g_dirtyhelper_CPUID_sse42_and_cx16 ( VexGuestAMD64State* st );
+ extern void  amd64g_dirtyhelper_CPUID_avx_and_cx16 ( VexGuestAMD64State* st );
 +extern void  amd64g_dirtyhelper_CPUID_native ( VexGuestAMD64State* st );
  
  extern void  amd64g_dirtyhelper_FINIT ( VexGuestAMD64State* );
@@ -48,19 +49,17 @@ diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_helpers.c valgrind-3.6.0/VEX/
 diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_toIR.c valgrind-3.6.0/VEX/priv/guest_amd64_toIR.c
 --- valgrind-3.6.0.orig/VEX/priv/guest_amd64_toIR.c    2011-01-17 20:35:34.380376775 +0100
 +++ valgrind-3.6.0/VEX/priv/guest_amd64_toIR.c 2011-01-17 20:36:00.891571709 +0100
-@@ -17620,7 +17620,11 @@
-          HChar*   fName = NULL;
-          void*    fAddr = NULL;
-          if (haveF2orF3(pfx)) goto decode_failure;
--         if (archinfo->hwcaps == (VEX_HWCAPS_AMD64_SSE3
-+         if (vex_control.iropt_native_cpuid) {
-+            fName = "amd64g_dirtyhelper_CPUID_native";
-+            fAddr = &amd64g_dirtyhelper_CPUID_native; 
-+         }
-+         else if (archinfo->hwcaps == (VEX_HWCAPS_AMD64_SSE3
-                                   |VEX_HWCAPS_AMD64_CX16)) {
-             //fName = "amd64g_dirtyhelper_CPUID_sse3_and_cx16";
-             //fAddr = &amd64g_dirtyhelper_CPUID_sse3_and_cx16; 
+@@ -21165,6 +21165,10 @@ Long dis_ESC_0F (
+       const HChar*   fName = NULL;
+       void*    fAddr = NULL;
+       if (haveF2orF3(pfx)) goto decode_failure;
++      if (vex_control.iropt_native_cpuid) {
++         fName = "amd64g_dirtyhelper_CPUID_native";
++         fAddr = &amd64g_dirtyhelper_CPUID_native;
++      } else
+       /* This isn't entirely correct, CPUID should depend on the VEX
+          capabilities, not on the underlying CPU. See bug #324882. */
+       if ((archinfo->hwcaps & VEX_HWCAPS_AMD64_SSE3) &&
 diff -uNr valgrind-3.6.0.orig/VEX/pub/libvex.h valgrind-3.6.0/VEX/pub/libvex.h
 --- valgrind-3.6.0.orig/VEX/pub/libvex.h       2010-10-20 22:19:52.000000000 +0200
 +++ valgrind-3.6.0/VEX/pub/libvex.h    2011-01-17 20:41:02.906490947 +0100