--- valgrind-3.6.0.orig/coregrind/m_main.c 2010-10-20 22:19:45.000000000 +0200
+++ valgrind-3.6.0/coregrind/m_main.c 2011-01-17 20:38:26.676472616 +0100
@@ -519,6 +519,8 @@
- VG_(clo_vex_control).guest_chase_thresh, 0, 99) {}
- else if VG_BOOL_CLO(arg, "--vex-guest-chase-cond",
- VG_(clo_vex_control).guest_chase_cond) {}
+ VG_(clo_vex_control).guest_max_insns, 1, 100) {}
+ else if VG_BOOL_CLO(arg, "--vex-guest-chase",
+ VG_(clo_vex_control).guest_chase) {}
+ else if VG_BOOL_CLO(arg, "--vex-native-cpuid",
+ VG_(clo_vex_control).iropt_native_cpuid) {}
- else if VG_INT_CLO(arg, "--log-fd", tmp_log_fd) {
- log_to = VgLogTo_Fd;
+ else if VG_INT_CLO(arg, "--log-fd", pos->tmp_log_fd) {
+ pos->log_to = VgLogTo_Fd;
--- valgrind-3.11.0/VEX/priv/guest_amd64_defs.h.orig 2015-11-15 19:07:11.062949101 +0100
+++ valgrind-3.11.0/VEX/priv/guest_amd64_defs.h 2015-11-15 19:09:09.992944110 +0100
-@@ -169,6 +169,7 @@
- extern void amd64g_dirtyhelper_CPUID_sse42_and_cx16 ( VexGuestAMD64State* st );
- extern void amd64g_dirtyhelper_CPUID_avx_and_cx16 ( VexGuestAMD64State* st );
- extern void amd64g_dirtyhelper_CPUID_avx2 ( VexGuestAMD64State* st );
+@@ -170,6 +170,7 @@ extern void amd64g_dirtyhelper_CPUID_ss
+ extern void amd64g_dirtyhelper_CPUID_avx2 ( VexGuestAMD64State* st,
+ ULong hasF16C, ULong hasRDRAND,
+ ULong hasRDSEED );
+extern void amd64g_dirtyhelper_CPUID_native ( VexGuestAMD64State* st );
- extern void amd64g_dirtyhelper_FINIT ( VexGuestAMD64State* );
+ extern void amd64g_dirtyhelper_FINIT ( VexGuestAMD64State* );
diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_helpers.c valgrind-3.6.0/VEX/priv/guest_amd64_helpers.c
--- valgrind-3.6.0.orig/VEX/priv/guest_amd64_helpers.c 2010-10-20 22:19:51.000000000 +0200
+++ valgrind-3.6.0/VEX/priv/guest_amd64_helpers.c 2011-01-17 20:36:00.884903903 +0100
+}
+
+
- ULong amd64g_calculate_RCR ( ULong arg,
- ULong rot_amt,
- ULong rflags_in,
+ /*---------------------------------------------------------------*/
+ /*--- Misc integer helpers, including rotates and crypto. ---*/
+ /*---------------------------------------------------------------*/
--- valgrind-3.11.0/VEX/priv/guest_amd64_toIR.c.orig 2015-11-15 19:07:11.129615765 +0100
+++ valgrind-3.11.0/VEX/priv/guest_amd64_toIR.c 2015-11-15 19:13:47.379599136 +0100
@@ -21920,6 +21920,10 @@
+ } else
/* This isn't entirely correct, CPUID should depend on the VEX
capabilities, not on the underlying CPU. See bug #324882. */
- if ((archinfo->hwcaps & VEX_HWCAPS_AMD64_SSE3) &&
-diff -uNr valgrind-3.6.0.orig/VEX/pub/libvex.h valgrind-3.6.0/VEX/pub/libvex.h
---- valgrind-3.6.0.orig/VEX/pub/libvex.h 2010-10-20 22:19:52.000000000 +0200
-+++ valgrind-3.6.0/VEX/pub/libvex.h 2011-01-17 20:41:02.906490947 +0100
-@@ -60,7 +60,6 @@
- }
- VexArch;
-
--
- /* For a given architecture, these specify extra capabilities beyond
- the minimum supported (baseline) capabilities. They may be OR'd
- together, although some combinations don't make sense. (eg, SSE2
-@@ -270,6 +269,8 @@
- /* EXPERIMENTAL: chase across conditional branches? Not all
- front ends honour this. Default: NO. */
- Bool guest_chase_cond;
+ if ((archinfo->hwcaps & VEX_HWCAPS_AMD64_SSSE3) &&
+--- valgrind-3.14.0/VEX/pub/libvex.h~ 2018-10-12 20:12:49.000000000 +0200
++++ valgrind-3.14.0/VEX/pub/libvex.h 2018-10-12 20:13:55.990940300 +0200
+@@ -519,6 +519,8 @@ typedef
+ - '3': current, faster implementation; perhaps producing slightly worse
+ spilling decisions. */
+ UInt regalloc_version;
+ /* For x86 and amd64 allow the use of native cpuid inst */
+ Int iropt_native_cpuid;
}
VexControl;
+