- up to 3.9.0
[packages/valgrind.git] / valgrind-native-cpuid.patch
1 diff -uNr valgrind-3.6.0.orig/coregrind/m_main.c valgrind-3.6.0/coregrind/m_main.c
2 --- valgrind-3.6.0.orig/coregrind/m_main.c      2010-10-20 22:19:45.000000000 +0200
3 +++ valgrind-3.6.0/coregrind/m_main.c   2011-01-17 20:38:26.676472616 +0100
4 @@ -519,6 +519,8 @@
5                         VG_(clo_vex_control).guest_chase_thresh, 0, 99) {}
6        else if VG_BOOL_CLO(arg, "--vex-guest-chase-cond",
7                         VG_(clo_vex_control).guest_chase_cond) {}
8 +      else if VG_BOOL_CLO(arg, "--vex-native-cpuid",
9 +                       VG_(clo_vex_control).iropt_native_cpuid) {}
10  
11        else if VG_INT_CLO(arg, "--log-fd", tmp_log_fd) {
12           log_to = VgLogTo_Fd;
13 diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_defs.h valgrind-3.6.0/VEX/priv/guest_amd64_defs.h
14 --- valgrind-3.6.0.orig/VEX/priv/guest_amd64_defs.h     2010-10-20 22:19:51.000000000 +0200
15 +++ valgrind-3.6.0/VEX/priv/guest_amd64_defs.h  2011-01-17 20:38:57.815124615 +0100
16 @@ -161,7 +161,8 @@
17  extern void  amd64g_dirtyhelper_CPUID_baseline ( VexGuestAMD64State* st );
18  extern void  amd64g_dirtyhelper_CPUID_sse3_and_cx16 ( VexGuestAMD64State* st );
19  extern void  amd64g_dirtyhelper_CPUID_sse42_and_cx16 ( VexGuestAMD64State* st );
20  extern void  amd64g_dirtyhelper_CPUID_avx_and_cx16 ( VexGuestAMD64State* st );
21 +extern void  amd64g_dirtyhelper_CPUID_native ( VexGuestAMD64State* st );
22  
23  extern void  amd64g_dirtyhelper_FINIT ( VexGuestAMD64State* );
24  
25 diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_helpers.c valgrind-3.6.0/VEX/priv/guest_amd64_helpers.c
26 --- valgrind-3.6.0.orig/VEX/priv/guest_amd64_helpers.c  2010-10-20 22:19:51.000000000 +0200
27 +++ valgrind-3.6.0/VEX/priv/guest_amd64_helpers.c       2011-01-17 20:36:00.884903903 +0100
28 @@ -2170,6 +2170,20 @@
29  }
30  
31  
32 +void amd64g_dirtyhelper_CPUID_native ( VexGuestAMD64State* st )
33 +{
34 +#  if defined(__x86_64__)
35 +   __asm__ __volatile__ ("cpuid" : "=a" (st->guest_RAX),
36 +                        "=b" (st->guest_RBX),
37 +                        "=c" (st->guest_RCX),
38 +                        "=d" (st->guest_RDX)
39 +                        : "0" (st->guest_RAX), "2" (st->guest_RCX));
40 +#  else
41 +/* do nothing */
42 +#  endif
43 +}
44 +
45 +
46  ULong amd64g_calculate_RCR ( ULong arg, 
47                               ULong rot_amt, 
48                               ULong rflags_in, 
49 diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_toIR.c valgrind-3.6.0/VEX/priv/guest_amd64_toIR.c
50 --- valgrind-3.6.0.orig/VEX/priv/guest_amd64_toIR.c     2011-01-17 20:35:34.380376775 +0100
51 +++ valgrind-3.6.0/VEX/priv/guest_amd64_toIR.c  2011-01-17 20:36:00.891571709 +0100
52 @@ -21165,6 +21165,10 @@ Long dis_ESC_0F (
53        const HChar*   fName = NULL;
54        void*    fAddr = NULL;
55        if (haveF2orF3(pfx)) goto decode_failure;
56 +      if (vex_control.iropt_native_cpuid) {
57 +         fName = "amd64g_dirtyhelper_CPUID_native";
58 +         fAddr = &amd64g_dirtyhelper_CPUID_native;
59 +      } else
60        /* This isn't entirely correct, CPUID should depend on the VEX
61           capabilities, not on the underlying CPU. See bug #324882. */
62        if ((archinfo->hwcaps & VEX_HWCAPS_AMD64_SSE3) &&
63 diff -uNr valgrind-3.6.0.orig/VEX/pub/libvex.h valgrind-3.6.0/VEX/pub/libvex.h
64 --- valgrind-3.6.0.orig/VEX/pub/libvex.h        2010-10-20 22:19:52.000000000 +0200
65 +++ valgrind-3.6.0/VEX/pub/libvex.h     2011-01-17 20:41:02.906490947 +0100
66 @@ -60,7 +60,6 @@
67     }
68     VexArch;
69  
70 -
71  /* For a given architecture, these specify extra capabilities beyond
72     the minimum supported (baseline) capabilities.  They may be OR'd
73     together, although some combinations don't make sense.  (eg, SSE2
74 @@ -270,6 +269,8 @@
75        /* EXPERIMENTAL: chase across conditional branches?  Not all
76           front ends honour this.  Default: NO. */
77        Bool guest_chase_cond;
78 +      /* For x86 and amd64 allow the use of native cpuid inst */
79 +      Int iropt_native_cpuid;
80     }
81     VexControl;
82  
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