1 Index: coregrind/vg_to_ucode.c
2 ===================================================================
3 RCS file: /home/kde/valgrind/coregrind/vg_to_ucode.c,v
4 retrieving revision 1.129
5 diff -u -u -r1.129 vg_to_ucode.c
6 --- coregrind/vg_to_ucode.c 11 Feb 2004 23:33:27 -0000 1.129
7 +++ coregrind/vg_to_ucode.c 17 Feb 2004 19:23:07 -0000
9 DIP("pop %s\n", VG_(name_of_seg_reg)(sreg));
13 +void dis_ret ( UCodeBlock* cb, UInt d32 )
15 + Int t1 = newTemp(cb), t2 = newTemp(cb);
16 + uInstr2(cb, GET, 4, ArchReg, R_ESP, TempReg, t1);
17 + uInstr2(cb, LOAD, 4, TempReg, t1, TempReg, t2);
18 + uInstr2(cb, ADD, 4, Literal, 0, TempReg, t1);
19 + uLiteral(cb, 4+d32);
20 + uInstr2(cb, PUT, 4, TempReg, t1, ArchReg, R_ESP);
22 + LAST_UINSTR(cb).jmpkind = JmpRet;
25 /*------------------------------------------------------------*/
26 /*--- Disassembling entire basic blocks ---*/
27 /*------------------------------------------------------------*/
28 @@ -5187,24 +5200,14 @@
30 case 0xC2: /* RET imm16 */
31 d32 = getUDisp16(eip); eip += 2;
35 + DIP("ret %d\n", d32);
41 - t1 = newTemp(cb); t2 = newTemp(cb);
42 - uInstr2(cb, GET, 4, ArchReg, R_ESP, TempReg, t1);
43 - uInstr2(cb, LOAD, 4, TempReg, t1, TempReg, t2);
44 - uInstr2(cb, ADD, 4, Literal, 0, TempReg, t1);
45 - uLiteral(cb, 4+d32);
46 - uInstr2(cb, PUT, 4, TempReg, t1, ArchReg, R_ESP);
48 - LAST_UINSTR(cb).jmpkind = JmpRet;
52 - if (d32 == 0) { DIP("ret\n"); }
53 - else { DIP("ret %d\n", d32); }
58 case 0xE8: /* CALL J4 */
59 @@ -6216,7 +6219,14 @@
61 LAST_UINSTR(cb).jmpkind = JmpYield;
66 + if (abyte == 0xC3) { /* REP RET */
67 + /* an Athlon specific optimisation */