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Commit | Line | Data |
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1 | diff -uNr valgrind-3.6.0.orig/coregrind/m_main.c valgrind-3.6.0/coregrind/m_main.c | |
2 | --- valgrind-3.6.0.orig/coregrind/m_main.c 2010-10-20 22:19:45.000000000 +0200 | |
3 | +++ valgrind-3.6.0/coregrind/m_main.c 2011-01-17 20:38:26.676472616 +0100 | |
4 | @@ -519,6 +519,8 @@ | |
5 | VG_(clo_vex_control).guest_chase_thresh, 0, 99) {} | |
6 | else if VG_BOOL_CLO(arg, "--vex-guest-chase-cond", | |
7 | VG_(clo_vex_control).guest_chase_cond) {} | |
8 | + else if VG_BOOL_CLO(arg, "--vex-native-cpuid", | |
9 | + VG_(clo_vex_control).iropt_native_cpuid) {} | |
10 | ||
11 | else if VG_INT_CLO(arg, "--log-fd", tmp_log_fd) { | |
12 | log_to = VgLogTo_Fd; | |
13 | --- valgrind-3.11.0/VEX/priv/guest_amd64_defs.h.orig 2015-11-15 19:07:11.062949101 +0100 | |
14 | +++ valgrind-3.11.0/VEX/priv/guest_amd64_defs.h 2015-11-15 19:09:09.992944110 +0100 | |
15 | @@ -169,6 +169,7 @@ | |
16 | extern void amd64g_dirtyhelper_CPUID_sse42_and_cx16 ( VexGuestAMD64State* st ); | |
17 | extern void amd64g_dirtyhelper_CPUID_avx_and_cx16 ( VexGuestAMD64State* st ); | |
18 | extern void amd64g_dirtyhelper_CPUID_avx2 ( VexGuestAMD64State* st ); | |
19 | +extern void amd64g_dirtyhelper_CPUID_native ( VexGuestAMD64State* st ); | |
20 | ||
21 | extern void amd64g_dirtyhelper_FINIT ( VexGuestAMD64State* ); | |
22 | ||
23 | diff -uNr valgrind-3.6.0.orig/VEX/priv/guest_amd64_helpers.c valgrind-3.6.0/VEX/priv/guest_amd64_helpers.c | |
24 | --- valgrind-3.6.0.orig/VEX/priv/guest_amd64_helpers.c 2010-10-20 22:19:51.000000000 +0200 | |
25 | +++ valgrind-3.6.0/VEX/priv/guest_amd64_helpers.c 2011-01-17 20:36:00.884903903 +0100 | |
26 | @@ -2170,6 +2170,20 @@ | |
27 | } | |
28 | ||
29 | ||
30 | +void amd64g_dirtyhelper_CPUID_native ( VexGuestAMD64State* st ) | |
31 | +{ | |
32 | +# if defined(__x86_64__) | |
33 | + __asm__ __volatile__ ("cpuid" : "=a" (st->guest_RAX), | |
34 | + "=b" (st->guest_RBX), | |
35 | + "=c" (st->guest_RCX), | |
36 | + "=d" (st->guest_RDX) | |
37 | + : "0" (st->guest_RAX), "2" (st->guest_RCX)); | |
38 | +# else | |
39 | +/* do nothing */ | |
40 | +# endif | |
41 | +} | |
42 | + | |
43 | + | |
44 | ULong amd64g_calculate_RCR ( ULong arg, | |
45 | ULong rot_amt, | |
46 | ULong rflags_in, | |
47 | --- valgrind-3.11.0/VEX/priv/guest_amd64_toIR.c.orig 2015-11-15 19:07:11.129615765 +0100 | |
48 | +++ valgrind-3.11.0/VEX/priv/guest_amd64_toIR.c 2015-11-15 19:13:47.379599136 +0100 | |
49 | @@ -21920,6 +21920,10 @@ | |
50 | ||
51 | if (haveF2orF3(pfx)) goto decode_failure; | |
52 | ||
53 | + if (vex_control.iropt_native_cpuid) { | |
54 | + fName = "amd64g_dirtyhelper_CPUID_native"; | |
55 | + fAddr = &amd64g_dirtyhelper_CPUID_native; | |
56 | + } else | |
57 | /* This isn't entirely correct, CPUID should depend on the VEX | |
58 | capabilities, not on the underlying CPU. See bug #324882. */ | |
59 | if ((archinfo->hwcaps & VEX_HWCAPS_AMD64_SSE3) && | |
60 | --- valgrind-3.14.0/VEX/pub/libvex.h~ 2018-10-12 20:12:49.000000000 +0200 | |
61 | +++ valgrind-3.14.0/VEX/pub/libvex.h 2018-10-12 20:13:55.990940300 +0200 | |
62 | @@ -519,6 +519,8 @@ typedef | |
63 | - '3': current, faster implementation; perhaps producing slightly worse | |
64 | spilling decisions. */ | |
65 | UInt regalloc_version; | |
66 | + /* For x86 and amd64 allow the use of native cpuid inst */ | |
67 | + Int iropt_native_cpuid; | |
68 | } | |
69 | VexControl; | |
70 | ||
71 |