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Commit | Line | Data |
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7c8e5cfd JR |
1 | diff -urNp -x '*.orig' qtwebengine.org/src/3rdparty/chromium/base/allocator/partition_allocator/address_space_randomization.cc qtwebengine/src/3rdparty/chromium/base/allocator/partition_allocator/address_space_randomization.cc |
2 | --- qtwebengine.org/src/3rdparty/chromium/base/allocator/partition_allocator/address_space_randomization.cc 2021-08-13 12:36:55.000000000 +0200 | |
3 | +++ qtwebengine/src/3rdparty/chromium/base/allocator/partition_allocator/address_space_randomization.cc 2021-08-14 11:13:23.606971650 +0200 | |
4 | @@ -21,7 +21,7 @@ namespace base { | |
06e41866 | 5 | void* GetRandomPageBase() { |
7c8e5cfd | 6 | uintptr_t random = static_cast<uintptr_t>(RandomValue()); |
06e41866 JR |
7 | |
8 | -#if defined(ARCH_CPU_64_BITS) | |
9 | +#if defined(ARCH_CPU_64_BITS) && !defined(__ILP32__) | |
10 | random <<= 32ULL; | |
7c8e5cfd | 11 | random |= static_cast<uintptr_t>(RandomValue()); |
06e41866 | 12 | |
7c8e5cfd JR |
13 | diff -urNp -x '*.orig' qtwebengine.org/src/3rdparty/chromium/base/debug/stack_trace_posix.cc qtwebengine/src/3rdparty/chromium/base/debug/stack_trace_posix.cc |
14 | --- qtwebengine.org/src/3rdparty/chromium/base/debug/stack_trace_posix.cc 2021-08-13 12:36:55.000000000 +0200 | |
15 | +++ qtwebengine/src/3rdparty/chromium/base/debug/stack_trace_posix.cc 2021-08-14 11:13:23.606971650 +0200 | |
16 | @@ -351,7 +351,7 @@ void StackDumpSignalHandler(int signal, | |
06e41866 JR |
17 | const char* label; |
18 | greg_t value; | |
19 | } registers[] = { | |
20 | -#if ARCH_CPU_32_BITS | |
21 | +#if ARCH_CPU_32_BITS && !defined(__ILP32__) | |
22 | { " gs: ", context->uc_mcontext.gregs[REG_GS] }, | |
23 | { " fs: ", context->uc_mcontext.gregs[REG_FS] }, | |
24 | { " es: ", context->uc_mcontext.gregs[REG_ES] }, | |
7c8e5cfd | 25 | @@ -371,7 +371,7 @@ void StackDumpSignalHandler(int signal, |
06e41866 JR |
26 | { " efl: ", context->uc_mcontext.gregs[REG_EFL] }, |
27 | { " usp: ", context->uc_mcontext.gregs[REG_UESP] }, | |
28 | { " ss: ", context->uc_mcontext.gregs[REG_SS] }, | |
29 | -#elif ARCH_CPU_64_BITS | |
30 | +#elif ARCH_CPU_64_BITS || defined(__ILP32__) | |
31 | { " r8: ", context->uc_mcontext.gregs[REG_R8] }, | |
32 | { " r9: ", context->uc_mcontext.gregs[REG_R9] }, | |
33 | { " r10: ", context->uc_mcontext.gregs[REG_R10] }, | |
7c8e5cfd | 34 | @@ -398,9 +398,9 @@ void StackDumpSignalHandler(int signal, |
06e41866 JR |
35 | #endif // ARCH_CPU_32_BITS |
36 | }; | |
37 | ||
38 | -#if ARCH_CPU_32_BITS | |
39 | +#if ARCH_CPU_32_BITS && !defined(__ILP32__) | |
40 | const int kRegisterPadding = 8; | |
41 | -#elif ARCH_CPU_64_BITS | |
42 | +#elif ARCH_CPU_64_BITS || defined(__ILP32__) | |
43 | const int kRegisterPadding = 16; | |
44 | #endif | |
45 | ||
7c8e5cfd JR |
46 | diff -urNp -x '*.orig' qtwebengine.org/src/3rdparty/chromium/build/build_config.h qtwebengine/src/3rdparty/chromium/build/build_config.h |
47 | --- qtwebengine.org/src/3rdparty/chromium/build/build_config.h 2021-08-13 12:36:55.000000000 +0200 | |
48 | +++ qtwebengine/src/3rdparty/chromium/build/build_config.h 2021-08-14 11:13:23.606971650 +0200 | |
49 | @@ -129,7 +129,11 @@ | |
50 | #if defined(_M_X64) || defined(__x86_64__) | |
51 | #define ARCH_CPU_X86_FAMILY 1 | |
52 | #define ARCH_CPU_X86_64 1 | |
53 | +#ifdef __ILP32__ | |
54 | +#define ARCH_CPU_32_BITS 1 | |
55 | +#else | |
56 | #define ARCH_CPU_64_BITS 1 | |
57 | +#endif | |
58 | #define ARCH_CPU_LITTLE_ENDIAN 1 | |
59 | #elif defined(_M_IX86) || defined(__i386__) | |
60 | #define ARCH_CPU_X86_FAMILY 1 | |
61 | diff -urNp -x '*.orig' qtwebengine.org/src/3rdparty/chromium/build/config/compiler/BUILD.gn qtwebengine/src/3rdparty/chromium/build/config/compiler/BUILD.gn | |
62 | --- qtwebengine.org/src/3rdparty/chromium/build/config/compiler/BUILD.gn 2021-08-13 12:36:55.000000000 +0200 | |
63 | +++ qtwebengine/src/3rdparty/chromium/build/config/compiler/BUILD.gn 2021-08-14 11:13:23.606971650 +0200 | |
64 | @@ -765,14 +765,7 @@ config("compiler_cpu_abi") { | |
65 | if ((is_posix && !is_apple) || is_fuchsia) { | |
66 | # CPU architecture. We may or may not be doing a cross compile now, so for | |
67 | # simplicity we always explicitly set the architecture. | |
68 | - if (current_cpu == "x64") { | |
69 | - cflags += [ | |
70 | - "-m64", | |
71 | - ] | |
72 | - ldflags += [ "-m64" ] | |
73 | - } else if (current_cpu == "x86") { | |
74 | - cflags += [ "-m32" ] | |
75 | - ldflags += [ "-m32" ] | |
76 | + if (current_cpu == "x86") { | |
77 | if (!is_nacl) { | |
78 | cflags += [ | |
79 | "-msse2", | |
80 | diff -urNp -x '*.orig' qtwebengine.org/src/3rdparty/chromium/third_party/boringssl/src/crypto/fipsmodule/rand/getrandom_fillin.h qtwebengine/src/3rdparty/chromium/third_party/boringssl/src/crypto/fipsmodule/rand/getrandom_fillin.h | |
81 | --- qtwebengine.org/src/3rdparty/chromium/third_party/boringssl/src/crypto/fipsmodule/rand/getrandom_fillin.h 2021-08-13 12:36:59.000000000 +0200 | |
82 | +++ qtwebengine/src/3rdparty/chromium/third_party/boringssl/src/crypto/fipsmodule/rand/getrandom_fillin.h 2021-08-14 11:13:23.606971650 +0200 | |
83 | @@ -23,7 +23,11 @@ | |
84 | #include <sys/syscall.h> | |
85 | ||
86 | #if defined(OPENSSL_X86_64) | |
87 | +#if defined(__ILP32__) | |
88 | +#define EXPECTED_NR_getrandom (__X32_SYSCALL_BIT + 318) | |
89 | +#else | |
90 | #define EXPECTED_NR_getrandom 318 | |
91 | +#endif | |
92 | #elif defined(OPENSSL_X86) | |
93 | #define EXPECTED_NR_getrandom 355 | |
94 | #elif defined(OPENSSL_AARCH64) | |
95 | diff -urNp -x '*.orig' qtwebengine.org/src/3rdparty/chromium/v8/src/objects/bigint.cc qtwebengine/src/3rdparty/chromium/v8/src/objects/bigint.cc | |
96 | --- qtwebengine.org/src/3rdparty/chromium/v8/src/objects/bigint.cc 2021-08-13 12:37:04.000000000 +0200 | |
97 | +++ qtwebengine/src/3rdparty/chromium/v8/src/objects/bigint.cc 2021-08-14 11:13:23.606971650 +0200 | |
98 | @@ -2641,7 +2641,7 @@ inline BigInt::digit_t MutableBigInt::di | |
99 | BigInt::digit_t MutableBigInt::digit_div(digit_t high, digit_t low, | |
100 | digit_t divisor, digit_t* remainder) { | |
101 | DCHECK(high < divisor); | |
102 | -#if V8_TARGET_ARCH_X64 && (__GNUC__ || __clang__) | |
103 | +#if V8_TARGET_ARCH_X64 && (__GNUC__ || __clang__) && !defined(__ILP32__) | |
104 | digit_t quotient; | |
105 | digit_t rem; | |
106 | __asm__("divq %[divisor]" |