- up to 2.9.0

[packages/qemu.git] / x32.patch

diff --git a/x32.patch b/x32.patch
index d8a60c90d5aa26f0489cd2be77dbe8ca7cf6d80e..beee3deda90b63a5e603ce6b214a453448a5cda7 100644 (file)
--- a/x32.patch
+++ b/x32.patch
@@ -1,14 +1,14 @@
 --- qemu-2.2.0/configure~      2015-03-26 19:52:14.000000000 +0100
 +++ qemu-2.2.0/configure       2015-03-26 19:56:34.255072716 +0100
-@@ -1819,7 +1819,7 @@
- # libseccomp check
+@@ -1904,7 +1904,7 @@
  
  if test "$seccomp" != "no" ; then
--    if test "$cpu" = "i386" || test "$cpu" = "x86_64" &&
-+    if test "$cpu" = "i386" || test "$cpu" = "x86_64" || test "$cpu" = "x32" &&
-         $pkg_config --atleast-version=2.1.1 libseccomp; then
-         libs_softmmu="$libs_softmmu `$pkg_config --libs libseccomp`"
-         QEMU_CFLAGS="$QEMU_CFLAGS `$pkg_config --cflags libseccomp`"
+     case "$cpu" in
+-    i386|x86_64)
++    i386|x86_64|x32)
+         libseccomp_minver="2.1.0"
+         ;;
+     arm|aarch64)
 @@ -2932,7 +2932,7 @@
  ##########################################
  # TPM passthrough is only on x86 Linux
@@ -27,14 +27,15 @@
          "$targetos" != "Darwin" -a "$targetos" != "SunOS" -a \
          "$softmmu" = yes ; then
    roms="optionrom"
-@@ -5080,7 +5080,9 @@ case "$target_name" in
-       \( "$target_name" = "ppcemb" -a "$cpu" = "ppc64" \) -o \
-       \( "$target_name" = "mipsel" -a "$cpu" = "mips" \) -o \
-       \( "$target_name" = "x86_64" -a "$cpu" = "i386"   \) -o \
--      \( "$target_name" = "i386"   -a "$cpu" = "x86_64" \) \) ; then
-+      \( "$target_name" = "i386"   -a "$cpu" = "x86_64" \) -o \
-+      \( "$target_name" = "x86_64" -a "$cpu" = "x32"   \) -o \
-+      \( "$target_name" = "i386"   -a "$cpu" = "x32" \) \) ; then
-       echo "CONFIG_KVM=y" >> $config_target_mak
-       if test "$vhost_net" = "yes" ; then
-         echo "CONFIG_VHOST_NET=y" >> $config_target_mak
+
+--- qemu-2.6.0/include/qemu/atomic.h~  2016-07-17 18:37:57.000000000 +0200
++++ qemu-2.6.0/include/qemu/atomic.h   2016-07-17 18:38:33.485893530 +0200
+@@ -20,7 +20,7 @@
+ /* Compiler barrier */
+ #define barrier()   ({ asm volatile("" ::: "memory"); (void)0; })
+ 
+-#ifdef __ATOMIC_RELAXED
++#if defined(__ATOMIC_RELAXED) && !defined(__ILP32__)
+ /* For C11 atomic ops */
+ 
+ /* Manual memory barriers