]> git.pld-linux.org Git - packages/qemu.git/blame - qemu-amd64.patch
- sparc is currently unsupported; amd64 patch mostly included
[packages/qemu.git] / qemu-amd64.patch
CommitLineData
e37c5fc5 1--- qemu-0.5.0/Makefile.target.amd64 2003-11-07 09:33:23.000000000 +0100
2+++ qemu-0.5.0/Makefile.target 2003-11-07 09:33:23.000000000 +0100
3@@ -56,6 +56,11 @@ LDFLAGS+=-Wl,-shared
4 endif
5 endif
6
7+ifeq ($(ARCH),amd64)
8+OP_CFLAGS=$(CFLAGS) -falign-functions=0
9+LDFLAGS+=-Wl,-T,$(SRC_PATH)/amd64.ld
10+endif
11+
12 ifeq ($(ARCH),ppc)
13 OP_CFLAGS=$(CFLAGS)
14 LDFLAGS+=-Wl,-T,$(SRC_PATH)/ppc.ld
15@@ -140,6 +145,9 @@ LIBOBJS+=disas.o
16 ifeq ($(findstring i386, $(TARGET_ARCH) $(ARCH)),i386)
17 LIBOBJS+=i386-dis.o
18 endif
19+ifeq ($(findstring amd64, $(TARGET_ARCH) $(ARCH)),amd64)
20+LIBOBJS+=i386-dis.o
21+endif
22 ifeq ($(findstring alpha, $(TARGET_ARCH) $(ARCH)),alpha)
23 LIBOBJS+=alpha-dis.o
24 endif
e37c5fc5 25--- qemu-0.5.0/exec-all.h.amd64 2003-10-28 01:53:12.000000000 +0100
26+++ qemu-0.5.0/exec-all.h 2003-11-07 09:33:23.000000000 +0100
27@@ -132,7 +132,7 @@ void tb_link(TranslationBlock *tb);
28
29 extern TranslationBlock *tb_hash[CODE_GEN_HASH_SIZE];
30
31-extern uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
32+//extern uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
33 extern uint8_t *code_gen_ptr;
34
35 /* find a translation block in the translation cache. If not found,
36@@ -309,6 +309,20 @@ static inline int testandset (int *p)
37 }
38 #endif
39
40+#ifdef __x86_64__
41+static inline int testandset (int *p)
42+{
43+ char ret;
44+ int readval;
45+
46+ __asm__ __volatile__ ("lock; cmpxchgl %3, %1; sete %0"
47+ : "=q" (ret), "=m" (*p), "=a" (readval)
48+ : "r" (1), "m" (*p), "a" (0)
49+ : "memory");
50+ return ret;
51+}
52+#endif
53+
54 #ifdef __s390__
55 static inline int testandset (int *p)
56 {
57--- qemu-0.5.0/dyngen.h.amd64 2003-10-28 01:53:12.000000000 +0100
58+++ qemu-0.5.0/dyngen.h 2003-11-07 09:33:23.000000000 +0100
59@@ -27,6 +27,12 @@ static inline void flush_icache_range(un
60 }
61 #endif
62
63+#ifdef __x86_64__
64+static inline void flush_icache_range(unsigned long start, unsigned long stop)
65+{
66+}
67+#endif
68+
69 #ifdef __s390__
70 static inline void flush_icache_range(unsigned long start, unsigned long stop)
71 {
e37c5fc5 72--- qemu-0.5.0/exec.c.amd64 2003-10-28 01:53:12.000000000 +0100
73+++ qemu-0.5.0/exec.c 2003-11-07 09:33:23.000000000 +0100
74@@ -47,8 +47,12 @@ int nb_tbs;
75 /* any access to the tbs or the page table must use this lock */
76 spinlock_t tb_lock = SPIN_LOCK_UNLOCKED;
77
78-uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
79-uint8_t *code_gen_ptr;
80+#if defined(__x86_64__)
81+static uint8_t *code_gen_buffer;
82+#else
83+static uint8_t code_gen_buffer[CODE_GEN_BUFFER_SIZE];
84+#endif
85+uint8_t *code_gen_ptr = NULL;
86
87 /* XXX: pack the flags in the low bits of the pointer ? */
88 typedef struct PageDesc {
89@@ -206,6 +210,12 @@ void page_set_flags(unsigned long start,
90 void cpu_exec_init(void)
91 {
92 if (!code_gen_ptr) {
93+#if defined(__x86_64__)
94+ code_gen_buffer = mmap(0, CODE_GEN_BUFFER_SIZE, PROT_READ|PROT_WRITE|PROT_EXEC,
95+ MAP_SHARED|MAP_32BIT|MAP_ANONYMOUS, -1, 0);
96+ if (code_gen_buffer == MAP_FAILED)
97+ exit(1);
98+#endif
99 code_gen_ptr = code_gen_buffer;
100 page_init();
101 io_mem_init();
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