- add x32 support
authorJan Rękorajski <baggins@pld-linux.org>
Mon, 22 Dec 2014 20:38:18 +0000 (20:38 +0000)
committerJan Rękorajski <baggins@pld-linux.org>
Mon, 22 Dec 2014 20:38:18 +0000 (20:38 +0000)
openssl.spec
openssl_fix_for_x32.patch [new file with mode: 0644]

index 3d346a1..e58f714 100644 (file)
@@ -41,6 +41,7 @@ Patch8:               %{name}-find.patch
 Patch10:       default_bits.patch
 Patch11:       pic.patch
 Patch12:       stddef.patch
+Patch13:       openssl_fix_for_x32.patch
 URL:           http://www.openssl.org/
 BuildRequires: bc
 BuildRequires: perl-devel >= 1:5.6.1
@@ -259,6 +260,7 @@ RC4, RSA и SSL. Включает статические библиотеки д
 %patch10 -p1
 %patch11 -p1
 %patch12 -p1
+%patch13 -p1
 
 sed -i -e 's|\$prefix/\$libdir/engines|/%{_lib}/engines|g' Configure
 
@@ -303,6 +305,9 @@ PERL="%{__perl}" \
 %ifarch %{x8664}
        linux-x86_64
 %endif
+%ifarch x32
+       linux-x32
+%endif
 %ifarch ia64
        linux-ia64
 %endif
diff --git a/openssl_fix_for_x32.patch b/openssl_fix_for_x32.patch
new file mode 100644 (file)
index 0000000..70ead03
--- /dev/null
@@ -0,0 +1,59 @@
+UpstreamStatus: Pending
+
+Received from H J Liu @ Intel
+Make the assembly syntax compatible with x32 gcc. Othewise x32 gcc throws errors.
+Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2011/07/13
+
+ported the patch to the 1.0.0e version
+Signed-Off-By: Nitin A Kamble <nitin.a.kamble@intel.com> 2011/12/01
+Index: openssl-1.0.0e/Configure
+===================================================================
+--- openssl-1.0.0e.orig/Configure
++++ openssl-1.0.0e/Configure
+@@ -393,6 +393,7 @@ my %table=(
+ "linux-ia64-ecc","ecc:-DL_ENDIAN -DTERMIO $ENV{OPTFLAGS} -Wall -no_cpprt::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "linux-ia64-icc","icc:-DL_ENDIAN -DTERMIO $ENV{OPTFLAGS} -Wall -no_cpprt::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_INT:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "linux-x86_64",       "gcc:-m64 -DL_ENDIAN -DTERMIO $ENV{OPTFLAGS} -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_UNROLL:${x86_64_asm}:elf:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",
++"linux-x32", "gcc:-mx32 -DL_ENDIAN -DTERMIO $ENV{OPTFLAGS} -Wall -DMD32_REG_T=int::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT RC4_CHUNK DES_INT DES_UNROLL:${x86_64_asm}:elf:dlfcn:linux-shared:-fPIC:-mx32:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::x32",
+ "linux64-s390x",      "gcc:-m64 -DB_ENDIAN -DTERMIO $ENV{OPTFLAGS} -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_UNROLL:${s390x_asm}:64:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR):::64",
+ #### So called "highgprs" target for z/Architecture CPUs
+ # "Highgprs" is kernel feature first implemented in Linux 2.6.32, see
+Index: openssl-1.0.0e/crypto/bn/asm/x86_64-gcc.c
+===================================================================
+--- openssl-1.0.0e.orig/crypto/bn/asm/x86_64-gcc.c
++++ openssl-1.0.0e/crypto/bn/asm/x86_64-gcc.c
+@@ -55,7 +55,7 @@
+  *    machine.
+  */
+-#ifdef _WIN64
++#if defined _WIN64 || !defined __LP64__
+ #define BN_ULONG unsigned long long
+ #else
+ #define BN_ULONG unsigned long
+@@ -192,9 +192,9 @@ BN_ULONG bn_add_words (BN_ULONG *rp, con
+       asm (
+       "       subq    %2,%2           \n"
+       ".p2align 4                     \n"
+-      "1:     movq    (%4,%2,8),%0    \n"
+-      "       adcq    (%5,%2,8),%0    \n"
+-      "       movq    %0,(%3,%2,8)    \n"
++      "1:     movq    (%q4,%2,8),%0   \n"
++      "       adcq    (%q5,%2,8),%0   \n"
++      "       movq    %0,(%q3,%2,8)   \n"
+       "       leaq    1(%2),%2        \n"
+       "       loop    1b              \n"
+       "       sbbq    %0,%0           \n"
+@@ -215,9 +215,9 @@ BN_ULONG bn_sub_words (BN_ULONG *rp, con
+       asm (
+       "       subq    %2,%2           \n"
+       ".p2align 4                     \n"
+-      "1:     movq    (%4,%2,8),%0    \n"
+-      "       sbbq    (%5,%2,8),%0    \n"
+-      "       movq    %0,(%3,%2,8)    \n"
++      "1:     movq    (%q4,%2,8),%0   \n"
++      "       sbbq    (%q5,%2,8),%0   \n"
++      "       movq    %0,(%q3,%2,8)   \n"
+       "       leaq    1(%2),%2        \n"
+       "       loop    1b              \n"
+       "       sbbq    %0,%0           \n"
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