1 --- flux-0.4.1/src/mpi/longlong.h.orig 2000-02-10 00:02:17.000000000 +0100
2 +++ flux-0.4.1/src/mpi/longlong.h 2004-03-28 20:44:07.075796280 +0200
4 ***************************************/
5 #if (defined (__a29k__) || defined (_AM29K)) && W_TYPE_SIZE == 32
6 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
7 - __asm__ ("add %1,%4,%5
8 + __asm__ ("add %1,%4,%5\n\
10 : "=r" ((USItype)(sh)), \
11 "=&r" ((USItype)(sl)) \
13 "%r" ((USItype)(al)), \
15 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
16 - __asm__ ("sub %1,%4,%5
17 + __asm__ ("sub %1,%4,%5\n\
19 : "=r" ((USItype)(sh)), \
20 "=&r" ((USItype)(sl)) \
22 ***************************************/
23 #if defined (__arm__) && W_TYPE_SIZE == 32
24 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
25 - __asm__ ("adds %1, %4, %5
26 + __asm__ ("adds %1, %4, %5\n\
28 : "=r" ((USItype)(sh)), \
29 "=&r" ((USItype)(sl)) \
31 "%r" ((USItype)(al)), \
33 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
34 - __asm__ ("subs %1, %4, %5
35 + __asm__ ("subs %1, %4, %5\n\
37 : "=r" ((USItype)(sh)), \
38 "=&r" ((USItype)(sl)) \
40 "r" ((USItype)(al)), \
42 #define umul_ppmm(xh, xl, a, b) \
43 - __asm__ ("%@ Inlined umul_ppmm
44 - mov %|r0, %2, lsr #16
45 - mov %|r2, %3, lsr #16
46 - bic %|r1, %2, %|r0, lsl #16
47 - bic %|r2, %3, %|r2, lsl #16
49 - mul %|r2, %|r0, %|r2
52 - adds %|r1, %|r2, %|r1
53 - addcs %0, %0, #65536
54 - adds %1, %1, %|r1, lsl #16
55 + __asm__ ("%@ Inlined umul_ppmm\n\
56 + mov %|r0, %2, lsr #16\n\
57 + mov %|r2, %3, lsr #16\n\
58 + bic %|r1, %2, %|r0, lsl #16\n\
59 + bic %|r2, %3, %|r2, lsl #16\n\
60 + mul %1, %|r1, %|r2\n\
61 + mul %|r2, %|r0, %|r2\n\
62 + mul %|r1, %0, %|r1\n\
64 + adds %|r1, %|r2, %|r1\n\
65 + addcs %0, %0, #65536\n\
66 + adds %1, %1, %|r1, lsl #16\n\
67 adc %0, %0, %|r1, lsr #16" \
68 : "=&r" ((USItype)(xh)), \
69 "=r" ((USItype)(xl)) \
71 ***************************************/
72 #if defined (__gmicro__) && W_TYPE_SIZE == 32
73 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
74 - __asm__ ("add.w %5,%1
75 + __asm__ ("add.w %5,%1\n\
77 : "=g" ((USItype)(sh)), \
78 "=&g" ((USItype)(sl)) \
80 "%1" ((USItype)(al)), \
82 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
83 - __asm__ ("sub.w %5,%1
84 + __asm__ ("sub.w %5,%1\n\
86 : "=g" ((USItype)(sh)), \
87 "=&g" ((USItype)(sl)) \
89 ***************************************/
90 #if defined (__hppa) && W_TYPE_SIZE == 32
91 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
92 - __asm__ ("add %4,%5,%1
93 + __asm__ ("add %4,%5,%1\n\
95 : "=r" ((USItype)(sh)), \
96 "=&r" ((USItype)(sl)) \
98 "%rM" ((USItype)(al)), \
100 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
101 - __asm__ ("sub %4,%5,%1
102 + __asm__ ("sub %4,%5,%1\n\
104 : "=r" ((USItype)(sh)), \
105 "=&r" ((USItype)(sl)) \
106 @@ -350,21 +350,21 @@
111 - extru,= %1,15,16,%%r0 ; Bits 31..16 zero?
112 - extru,tr %1,15,16,%1 ; No. Shift down, skip add.
113 - ldo 16(%0),%0 ; Yes. Perform add.
114 - extru,= %1,23,8,%%r0 ; Bits 15..8 zero?
115 - extru,tr %1,23,8,%1 ; No. Shift down, skip add.
116 - ldo 8(%0),%0 ; Yes. Perform add.
117 - extru,= %1,27,4,%%r0 ; Bits 7..4 zero?
118 - extru,tr %1,27,4,%1 ; No. Shift down, skip add.
119 - ldo 4(%0),%0 ; Yes. Perform add.
120 - extru,= %1,29,2,%%r0 ; Bits 3..2 zero?
121 - extru,tr %1,29,2,%1 ; No. Shift down, skip add.
122 - ldo 2(%0),%0 ; Yes. Perform add.
123 - extru %1,30,1,%1 ; Extract bit 1.
124 - sub %0,%1,%0 ; Subtract it.
126 + extru,= %1,15,16,%%r0 ; Bits 31..16 zero?\n\
127 + extru,tr %1,15,16,%1 ; No. Shift down, skip add.\n\
128 + ldo 16(%0),%0 ; Yes. Perform add.\n\
129 + extru,= %1,23,8,%%r0 ; Bits 15..8 zero?\n\
130 + extru,tr %1,23,8,%1 ; No. Shift down, skip add.\n\
131 + ldo 8(%0),%0 ; Yes. Perform add.\n\
132 + extru,= %1,27,4,%%r0 ; Bits 7..4 zero?\n\
133 + extru,tr %1,27,4,%1 ; No. Shift down, skip add.\n\
134 + ldo 4(%0),%0 ; Yes. Perform add.\n\
135 + extru,= %1,29,2,%%r0 ; Bits 3..2 zero?\n\
136 + extru,tr %1,29,2,%1 ; No. Shift down, skip add.\n\
137 + ldo 2(%0),%0 ; Yes. Perform add.\n\
138 + extru %1,30,1,%1 ; Extract bit 1.\n\
139 + sub %0,%1,%0 ; Subtract it.\n\
140 " : "=r" (count), "=r" (__tmp) : "1" (x)); \
144 ***************************************/
145 #if (defined (__i386__) || defined (__i486__)) && W_TYPE_SIZE == 32
146 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
147 - __asm__ ("addl %5,%1
148 + __asm__ ("addl %5,%1\n\
150 : "=r" ((USItype)(sh)), \
151 "=&r" ((USItype)(sl)) \
153 "%1" ((USItype)(al)), \
155 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
156 - __asm__ ("subl %5,%1
157 + __asm__ ("subl %5,%1\n\
159 : "=r" ((USItype)(sh)), \
160 "=&r" ((USItype)(sl)) \
162 ***************************************/
163 #if (defined (__mc68000__) || defined (__mc68020__) || defined (__NeXT__) || defined(mc68020)) && W_TYPE_SIZE == 32
164 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
165 - __asm__ ("add%.l %5,%1
166 + __asm__ ("add%.l %5,%1\n\
168 : "=d" ((USItype)(sh)), \
169 "=&d" ((USItype)(sl)) \
171 "%1" ((USItype)(al)), \
173 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
174 - __asm__ ("sub%.l %5,%1
175 + __asm__ ("sub%.l %5,%1\n\
177 : "=d" ((USItype)(sh)), \
178 "=&d" ((USItype)(sl)) \
179 @@ -601,27 +601,27 @@
180 #else /* not mc68020 */
181 #define umul_ppmm(xh, xl, a, b) \
182 do { USItype __umul_tmp1, __umul_tmp2; \
183 - __asm__ ("| Inlined umul_ppmm
196 - add%.l %#0x10000,%0
204 + __asm__ ("| Inlined umul_ppmm\n\
217 + add%.l %#0x10000,%0\n\
225 | End inlined umul_ppmm" \
226 : "=&d" ((USItype)(xh)), "=&d" ((USItype)(xl)), \
227 "=d" (__umul_tmp1), "=&d" (__umul_tmp2) \
229 ***************************************/
230 #if defined (__m88000__) && W_TYPE_SIZE == 32
231 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
232 - __asm__ ("addu.co %1,%r4,%r5
233 + __asm__ ("addu.co %1,%r4,%r5\n\
234 addu.ci %0,%r2,%r3" \
235 : "=r" ((USItype)(sh)), \
236 "=&r" ((USItype)(sl)) \
238 "%rJ" ((USItype)(al)), \
239 "rJ" ((USItype)(bl)))
240 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
241 - __asm__ ("subu.co %1,%r4,%r5
242 + __asm__ ("subu.co %1,%r4,%r5\n\
243 subu.ci %0,%r2,%r3" \
244 : "=r" ((USItype)(sh)), \
245 "=&r" ((USItype)(sl)) \
249 #define umul_ppmm(w1, w0, u, v) \
250 - __asm__ ("multu %2,%3
252 + __asm__ ("multu %2,%3\n\
255 : "=d" ((USItype)(w0)), \
256 "=d" ((USItype)(w1)) \
260 #define umul_ppmm(w1, w0, u, v) \
261 - __asm__ ("dmultu %2,%3
263 + __asm__ ("dmultu %2,%3\n\
266 : "=d" ((UDItype)(w0)), \
267 "=d" ((UDItype)(w1)) \
269 ***************************************/
270 #if defined (__pyr__) && W_TYPE_SIZE == 32
271 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
272 - __asm__ ("addw %5,%1
273 + __asm__ ("addw %5,%1\n\
275 : "=r" ((USItype)(sh)), \
276 "=&r" ((USItype)(sl)) \
278 "%1" ((USItype)(al)), \
280 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
281 - __asm__ ("subw %5,%1
282 + __asm__ ("subw %5,%1\n\
284 : "=r" ((USItype)(sh)), \
285 "=&r" ((USItype)(sl)) \
287 ({union {UDItype __ll; \
288 struct {USItype __h, __l;} __i; \
290 - __asm__ ("movw %1,%R0
291 + __asm__ ("movw %1,%R0\n\
293 : "=&r" (__xx.__ll) \
294 : "g" ((USItype) (u)), \
296 ***************************************/
297 #if defined (__ibm032__) /* RT/ROMP */ && W_TYPE_SIZE == 32
298 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
300 + __asm__ ("a %1,%5\n\
302 : "=r" ((USItype)(sh)), \
303 "=&r" ((USItype)(sl)) \
305 "%1" ((USItype)(al)), \
307 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
309 + __asm__ ("s %1,%5\n\
311 : "=r" ((USItype)(sh)), \
312 "=&r" ((USItype)(sl)) \
313 @@ -968,25 +968,25 @@
315 USItype __m0 = (m0), __m1 = (m1); \
356 : "=r" ((USItype)(ph)), \
357 "=r" ((USItype)(pl)) \
358 @@ -1021,8 +1021,8 @@
359 #if defined (__sh2__) && W_TYPE_SIZE == 32
360 #define umul_ppmm(w1, w0, u, v) \
367 : "=r" ((USItype)(w1)), \
368 "=r" ((USItype)(w0)) \
369 @@ -1037,7 +1037,7 @@
370 ***************************************/
371 #if defined (__sparc__) && W_TYPE_SIZE == 32
372 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
373 - __asm__ ("addcc %r4,%5,%1
374 + __asm__ ("addcc %r4,%5,%1\n\
376 : "=r" ((USItype)(sh)), \
377 "=&r" ((USItype)(sl)) \
378 @@ -1047,7 +1047,7 @@
379 "rI" ((USItype)(bl)) \
381 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
382 - __asm__ ("subcc %r4,%5,%1
383 + __asm__ ("subcc %r4,%5,%1\n\
385 : "=r" ((USItype)(sh)), \
386 "=&r" ((USItype)(sl)) \
387 @@ -1094,44 +1094,44 @@
390 #define udiv_qrnnd(q, r, n1, n0, d) \
391 - __asm__ ("! Inlined udiv_qrnnd
392 - wr %%g0,%2,%%y ! Not a delayed write for sparclite
395 - divscc %%g1,%4,%%g1
396 - divscc %%g1,%4,%%g1
397 - divscc %%g1,%4,%%g1
398 - divscc %%g1,%4,%%g1
399 - divscc %%g1,%4,%%g1
400 - divscc %%g1,%4,%%g1
401 - divscc %%g1,%4,%%g1
402 - divscc %%g1,%4,%%g1
403 - divscc %%g1,%4,%%g1
404 - divscc %%g1,%4,%%g1
405 - divscc %%g1,%4,%%g1
406 - divscc %%g1,%4,%%g1
407 - divscc %%g1,%4,%%g1
408 - divscc %%g1,%4,%%g1
409 - divscc %%g1,%4,%%g1
410 - divscc %%g1,%4,%%g1
411 - divscc %%g1,%4,%%g1
412 - divscc %%g1,%4,%%g1
413 - divscc %%g1,%4,%%g1
414 - divscc %%g1,%4,%%g1
415 - divscc %%g1,%4,%%g1
416 - divscc %%g1,%4,%%g1
417 - divscc %%g1,%4,%%g1
418 - divscc %%g1,%4,%%g1
419 - divscc %%g1,%4,%%g1
420 - divscc %%g1,%4,%%g1
421 - divscc %%g1,%4,%%g1
422 - divscc %%g1,%4,%%g1
423 - divscc %%g1,%4,%%g1
424 - divscc %%g1,%4,%%g1
429 + __asm__ ("! Inlined udiv_qrnnd\n\
430 + wr %%g0,%2,%%y ! Not a delayed write for sparclite\n\
432 + divscc %3,%4,%%g1\n\
433 + divscc %%g1,%4,%%g1\n\
434 + divscc %%g1,%4,%%g1\n\
435 + divscc %%g1,%4,%%g1\n\
436 + divscc %%g1,%4,%%g1\n\
437 + divscc %%g1,%4,%%g1\n\
438 + divscc %%g1,%4,%%g1\n\
439 + divscc %%g1,%4,%%g1\n\
440 + divscc %%g1,%4,%%g1\n\
441 + divscc %%g1,%4,%%g1\n\
442 + divscc %%g1,%4,%%g1\n\
443 + divscc %%g1,%4,%%g1\n\
444 + divscc %%g1,%4,%%g1\n\
445 + divscc %%g1,%4,%%g1\n\
446 + divscc %%g1,%4,%%g1\n\
447 + divscc %%g1,%4,%%g1\n\
448 + divscc %%g1,%4,%%g1\n\
449 + divscc %%g1,%4,%%g1\n\
450 + divscc %%g1,%4,%%g1\n\
451 + divscc %%g1,%4,%%g1\n\
452 + divscc %%g1,%4,%%g1\n\
453 + divscc %%g1,%4,%%g1\n\
454 + divscc %%g1,%4,%%g1\n\
455 + divscc %%g1,%4,%%g1\n\
456 + divscc %%g1,%4,%%g1\n\
457 + divscc %%g1,%4,%%g1\n\
458 + divscc %%g1,%4,%%g1\n\
459 + divscc %%g1,%4,%%g1\n\
460 + divscc %%g1,%4,%%g1\n\
461 + divscc %%g1,%4,%%g1\n\
462 + divscc %%g1,%4,%%g1\n\
463 + divscc %%g1,%4,%0\n\
467 1: ! End of inline udiv_qrnnd" \
468 : "=r" ((USItype)(q)), \
469 "=r" ((USItype)(r)) \
470 @@ -1152,45 +1152,45 @@
471 /* Default to sparc v7 versions of umul_ppmm and udiv_qrnnd. */
473 #define umul_ppmm(w1, w0, u, v) \
474 - __asm__ ("! Inlined umul_ppmm
475 - wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr
476 - sra %3,31,%%g2 ! Don't move this insn
477 - and %2,%%g2,%%g2 ! Don't move this insn
478 - andcc %%g0,0,%%g1 ! Don't move this insn
479 - mulscc %%g1,%3,%%g1
480 - mulscc %%g1,%3,%%g1
481 - mulscc %%g1,%3,%%g1
482 - mulscc %%g1,%3,%%g1
483 - mulscc %%g1,%3,%%g1
484 - mulscc %%g1,%3,%%g1
485 - mulscc %%g1,%3,%%g1
486 - mulscc %%g1,%3,%%g1
487 - mulscc %%g1,%3,%%g1
488 - mulscc %%g1,%3,%%g1
489 - mulscc %%g1,%3,%%g1
490 - mulscc %%g1,%3,%%g1
491 - mulscc %%g1,%3,%%g1
492 - mulscc %%g1,%3,%%g1
493 - mulscc %%g1,%3,%%g1
494 - mulscc %%g1,%3,%%g1
495 - mulscc %%g1,%3,%%g1
496 - mulscc %%g1,%3,%%g1
497 - mulscc %%g1,%3,%%g1
498 - mulscc %%g1,%3,%%g1
499 - mulscc %%g1,%3,%%g1
500 - mulscc %%g1,%3,%%g1
501 - mulscc %%g1,%3,%%g1
502 - mulscc %%g1,%3,%%g1
503 - mulscc %%g1,%3,%%g1
504 - mulscc %%g1,%3,%%g1
505 - mulscc %%g1,%3,%%g1
506 - mulscc %%g1,%3,%%g1
507 - mulscc %%g1,%3,%%g1
508 - mulscc %%g1,%3,%%g1
509 - mulscc %%g1,%3,%%g1
510 - mulscc %%g1,%3,%%g1
513 + __asm__ ("! Inlined umul_ppmm\n\
514 + wr %%g0,%2,%%y ! SPARC has 0-3 delay insn after a wr\n\
515 + sra %3,31,%%g2 ! Don't move this insn\n\
516 + and %2,%%g2,%%g2 ! Don't move this insn\n\
517 + andcc %%g0,0,%%g1 ! Don't move this insn\n\
518 + mulscc %%g1,%3,%%g1\n\
519 + mulscc %%g1,%3,%%g1\n\
520 + mulscc %%g1,%3,%%g1\n\
521 + mulscc %%g1,%3,%%g1\n\
522 + mulscc %%g1,%3,%%g1\n\
523 + mulscc %%g1,%3,%%g1\n\
524 + mulscc %%g1,%3,%%g1\n\
525 + mulscc %%g1,%3,%%g1\n\
526 + mulscc %%g1,%3,%%g1\n\
527 + mulscc %%g1,%3,%%g1\n\
528 + mulscc %%g1,%3,%%g1\n\
529 + mulscc %%g1,%3,%%g1\n\
530 + mulscc %%g1,%3,%%g1\n\
531 + mulscc %%g1,%3,%%g1\n\
532 + mulscc %%g1,%3,%%g1\n\
533 + mulscc %%g1,%3,%%g1\n\
534 + mulscc %%g1,%3,%%g1\n\
535 + mulscc %%g1,%3,%%g1\n\
536 + mulscc %%g1,%3,%%g1\n\
537 + mulscc %%g1,%3,%%g1\n\
538 + mulscc %%g1,%3,%%g1\n\
539 + mulscc %%g1,%3,%%g1\n\
540 + mulscc %%g1,%3,%%g1\n\
541 + mulscc %%g1,%3,%%g1\n\
542 + mulscc %%g1,%3,%%g1\n\
543 + mulscc %%g1,%3,%%g1\n\
544 + mulscc %%g1,%3,%%g1\n\
545 + mulscc %%g1,%3,%%g1\n\
546 + mulscc %%g1,%3,%%g1\n\
547 + mulscc %%g1,%3,%%g1\n\
548 + mulscc %%g1,%3,%%g1\n\
549 + mulscc %%g1,%3,%%g1\n\
550 + mulscc %%g1,0,%%g1\n\
551 + add %%g1,%%g2,%0\n\
553 : "=r" ((USItype)(w1)), \
554 "=r" ((USItype)(w0)) \
555 @@ -1218,7 +1218,7 @@
556 ***************************************/
557 #if defined (__vax__) && W_TYPE_SIZE == 32
558 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
559 - __asm__ ("addl2 %5,%1
560 + __asm__ ("addl2 %5,%1\n\
562 : "=g" ((USItype)(sh)), \
563 "=&g" ((USItype)(sl)) \
564 @@ -1227,7 +1227,7 @@
565 "%1" ((USItype)(al)), \
567 #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
568 - __asm__ ("subl2 %5,%1
569 + __asm__ ("subl2 %5,%1\n\
571 : "=g" ((USItype)(sh)), \
572 "=&g" ((USItype)(sl)) \