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1b8f31c8 | 1 | diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/lb1sf68.asm gcc-3.3.1-20030720/gcc/config/m68k/lb1sf68.asm |
2 | --- gcc-3.3.1-20030720.orig/gcc/config/m68k/lb1sf68.asm 2003-07-26 03:15:35.000000000 +0200 | |
3 | +++ gcc-3.3.1-20030720/gcc/config/m68k/lb1sf68.asm 2003-07-25 18:08:09.000000000 +0200 | |
4 | @@ -86,6 +86,36 @@ | |
5 | #define a6 REG (a6) | |
6 | #define fp REG (fp) | |
7 | #define sp REG (sp) | |
8 | +#define pc REG (pc) | |
9 | + | |
10 | +/* Provide a few macros to allow for PIC code support. | |
11 | + * With PIC, data is stored A5 relative so we've got to take a bit of special | |
12 | + * care to ensure that all loads of global data is via A5. PIC also requires | |
13 | + * jumps and subroutine calls to be PC relative rather than absolute. We cheat | |
14 | + * a little on this and in the PIC case, we use short offset branches and | |
15 | + * hope that the final object code is within range (which it should be). | |
16 | + */ | |
17 | +#ifndef __PIC__ | |
18 | +/* Non pic (absolute/relocatable) versions */ | |
19 | +#define LEA(sym,reg) lea sym, reg | |
20 | +#define PEA(sym,areg) pea sym | |
21 | +#define CALL(addr) jbsr addr | |
22 | +#define JUMP(addr) jmp addr | |
23 | +#else | |
24 | +#ifdef __ID_SHARED_LIBRARY__ | |
25 | +/* shared library version */ | |
26 | +#define LEA(sym,reg) movel a5@(_current_shared_library_a5_offset_), reg; \ | |
27 | + movel CONCAT1(sym, @GOT(reg)), reg | |
28 | +#define PEA(sym,areg) movel a5@(_current_shared_library_a5_offset_), areg; \ | |
29 | + movel CONCAT1(sym, @GOT(areg)), sp@- | |
30 | +#else | |
31 | +/* msep-data version */ | |
32 | +#define LEA(sym,reg) movel CONCAT1(sym, @GOT(a5)), reg | |
33 | +#define PEA(sym,areg) movel CONCAT1(sym, @GOT(a5)), sp@- | |
34 | +#endif | |
35 | +#define CALL(addr) bsr addr | |
36 | +#define JUMP(addr) bra addr | |
37 | +#endif | |
38 | ||
39 | #ifdef L_floatex | |
40 | ||
41 | @@ -213,7 +243,7 @@ | |
42 | ||
43 | | void __clear_sticky_bits(void); | |
44 | SYM (__clear_sticky_bit): | |
45 | - lea SYM (_fpCCR),a0 | |
46 | + LEA( SYM (_fpCCR),a0) | |
47 | #ifndef __mcoldfire__ | |
48 | movew IMM (0),a0@(STICK) | |
49 | #else | |
50 | @@ -246,7 +276,7 @@ | |
51 | FPTRAP = 15 | |
52 | ||
53 | $_exception_handler: | |
54 | - lea SYM (_fpCCR),a0 | |
55 | + LEA( SYM (_fpCCR),a0) | |
56 | movew d7,a0@(EBITS) | set __exception_bits | |
57 | #ifndef __mcoldfire__ | |
58 | orw d7,a0@(STICK) | and __sticky_bits | |
59 | @@ -282,7 +312,7 @@ | |
60 | andl d6,d7 | |
61 | #endif | |
62 | beq 1f | no, exit | |
63 | - pea SYM (_fpCCR) | yes, push address of _fpCCR | |
64 | + PEA( SYM (_fpCCR),a1)| yes, push address of _fpCCR | |
65 | trap IMM (FPTRAP) | and trap | |
66 | #ifndef __mcoldfire__ | |
67 | 1: moveml sp@+,d2-d7 | restore data registers | |
68 | @@ -421,7 +451,7 @@ | |
69 | ||
70 | L2: movel d1, sp@- | |
71 | movel d0, sp@- | |
72 | - jbsr SYM (__udivsi3) /* divide abs(dividend) by abs(divisor) */ | |
73 | + CALL( SYM (__udivsi3))/* divide abs(dividend) by abs(divisor) */ | |
74 | addql IMM (8), sp | |
75 | ||
76 | tstb d2 | |
77 | @@ -441,13 +471,13 @@ | |
78 | movel sp@(4), d0 /* d0 = dividend */ | |
79 | movel d1, sp@- | |
80 | movel d0, sp@- | |
81 | - jbsr SYM (__udivsi3) | |
82 | + CALL( SYM (__udivsi3)) | |
83 | addql IMM (8), sp | |
84 | movel sp@(8), d1 /* d1 = divisor */ | |
85 | #ifndef __mcoldfire__ | |
86 | movel d1, sp@- | |
87 | movel d0, sp@- | |
88 | - jbsr SYM (__mulsi3) /* d0 = (a/b)*b */ | |
89 | + CALL( SYM (__mulsi3)) /* d0 = (a/b)*b */ | |
90 | addql IMM (8), sp | |
91 | #else | |
92 | mulsl d1,d0 | |
93 | @@ -467,13 +497,13 @@ | |
94 | movel sp@(4), d0 /* d0 = dividend */ | |
95 | movel d1, sp@- | |
96 | movel d0, sp@- | |
97 | - jbsr SYM (__divsi3) | |
98 | + CALL( SYM (__divsi3)) | |
99 | addql IMM (8), sp | |
100 | movel sp@(8), d1 /* d1 = divisor */ | |
101 | #ifndef __mcoldfire__ | |
102 | movel d1, sp@- | |
103 | movel d0, sp@- | |
104 | - jbsr SYM (__mulsi3) /* d0 = (a/b)*b */ | |
105 | + CALL( SYM (__mulsi3)) /* d0 = (a/b)*b */ | |
106 | addql IMM (8), sp | |
107 | #else | |
108 | mulsl d1,d0 | |
109 | @@ -540,7 +570,7 @@ | |
110 | orl d7,d0 | |
111 | movew IMM (INEXACT_RESULT+UNDERFLOW),d7 | |
112 | moveq IMM (DOUBLE_FLOAT),d6 | |
113 | - jmp $_exception_handler | |
114 | + JUMP( $_exception_handler) | |
115 | ||
116 | Ld$infty: | |
117 | Ld$overflow: | |
118 | @@ -550,7 +580,7 @@ | |
119 | orl d7,d0 | |
120 | movew IMM (INEXACT_RESULT+OVERFLOW),d7 | |
121 | moveq IMM (DOUBLE_FLOAT),d6 | |
122 | - jmp $_exception_handler | |
123 | + JUMP( $_exception_handler) | |
124 | ||
125 | Ld$underflow: | |
126 | | Return 0 and set the exception flags | |
127 | @@ -558,7 +588,7 @@ | |
128 | movel d0,d1 | |
129 | movew IMM (INEXACT_RESULT+UNDERFLOW),d7 | |
130 | moveq IMM (DOUBLE_FLOAT),d6 | |
131 | - jmp $_exception_handler | |
132 | + JUMP( $_exception_handler) | |
133 | ||
134 | Ld$inop: | |
135 | | Return a quiet NaN and set the exception flags | |
136 | @@ -566,7 +596,7 @@ | |
137 | movel d0,d1 | |
138 | movew IMM (INEXACT_RESULT+INVALID_OPERATION),d7 | |
139 | moveq IMM (DOUBLE_FLOAT),d6 | |
140 | - jmp $_exception_handler | |
141 | + JUMP( $_exception_handler) | |
142 | ||
143 | Ld$div$0: | |
144 | | Return a properly signed INFINITY and set the exception flags | |
145 | @@ -575,7 +605,7 @@ | |
146 | orl d7,d0 | |
147 | movew IMM (INEXACT_RESULT+DIVIDE_BY_ZERO),d7 | |
148 | moveq IMM (DOUBLE_FLOAT),d6 | |
149 | - jmp $_exception_handler | |
150 | + JUMP( $_exception_handler) | |
151 | ||
152 | |============================================================================= | |
153 | |============================================================================= | |
154 | @@ -1015,8 +1045,8 @@ | |
155 | addl IMM (1),d4 | |
156 | #endif | |
157 | 1: | |
158 | - lea Ladddf$5,a0 | to return from rounding routine | |
159 | - lea SYM (_fpCCR),a1 | check the rounding mode | |
160 | + lea pc@(Ladddf$5),a0 | to return from rounding routine | |
161 | + LEA( SYM (_fpCCR),a1)| check the rounding mode | |
162 | #ifdef __mcoldfire__ | |
163 | clrl d6 | |
164 | #endif | |
165 | @@ -1123,8 +1153,8 @@ | |
166 | addl IMM (1),d4 | |
167 | #endif | |
168 | 1: | |
169 | - lea Lsubdf$1,a0 | to return from rounding routine | |
170 | - lea SYM (_fpCCR),a1 | check the rounding mode | |
171 | + lea pc@(Lsubdf$1),a0 | to return from rounding routine | |
172 | + LEA( SYM (_fpCCR),a1)| check the rounding mode | |
173 | #ifdef __mcoldfire__ | |
174 | clrl d6 | |
175 | #endif | |
176 | @@ -1168,7 +1198,7 @@ | |
177 | #endif | |
178 | movel a6@(16),d0 | |
179 | movel a6@(20),d1 | |
180 | - lea SYM (_fpCCR),a0 | |
181 | + LEA( SYM (_fpCCR),a0) | |
182 | movew IMM (0),a0@ | |
183 | #ifndef __mcoldfire__ | |
184 | moveml sp@+,d2-d7 | restore data registers | |
185 | @@ -1190,7 +1220,7 @@ | |
186 | #endif | |
187 | movel a6@(8),d0 | |
188 | movel a6@(12),d1 | |
189 | - lea SYM (_fpCCR),a0 | |
190 | + LEA( SYM (_fpCCR),a0) | |
191 | movew IMM (0),a0@ | |
192 | #ifndef __mcoldfire__ | |
193 | moveml sp@+,d2-d7 | restore data registers | |
194 | @@ -1248,7 +1278,7 @@ | |
195 | ||
196 | Ladddf$ret: | |
197 | | Normal exit. | |
198 | - lea SYM (_fpCCR),a0 | |
199 | + LEA( SYM (_fpCCR),a0) | |
200 | movew IMM (0),a0@ | |
201 | orl d7,d0 | put sign bit back | |
202 | #ifndef __mcoldfire__ | |
203 | @@ -1610,7 +1640,7 @@ | |
204 | bclr IMM (31),d2 | clear sign bit | |
205 | 1: cmpl IMM (0x7ff00000),d2 | check for non-finiteness | |
206 | bge Ld$inop | in case NaN or +/-INFINITY return NaN | |
207 | - lea SYM (_fpCCR),a0 | |
208 | + LEA( SYM (_fpCCR),a0) | |
209 | movew IMM (0),a0@ | |
210 | #ifndef __mcoldfire__ | |
211 | moveml sp@+,d2-d7 | |
212 | @@ -1895,7 +1925,7 @@ | |
213 | bne Ld$inop | | |
214 | 1: movel IMM (0),d0 | else return zero | |
215 | movel d0,d1 | | |
216 | - lea SYM (_fpCCR),a0 | clear exception flags | |
217 | + LEA( SYM (_fpCCR),a0)| clear exception flags | |
218 | movew IMM (0),a0@ | | |
219 | #ifndef __mcoldfire__ | |
220 | moveml sp@+,d2-d7 | | |
221 | @@ -2035,8 +2065,8 @@ | |
222 | orl d7,d3 | the bits which were flushed right | |
223 | movel a0,d7 | get back sign bit into d7 | |
224 | | Now call the rounding routine (which takes care of denormalized numbers): | |
225 | - lea Lround$0,a0 | to return from rounding routine | |
226 | - lea SYM (_fpCCR),a1 | check the rounding mode | |
227 | + lea pc@(Lround$0),a0 | to return from rounding routine | |
228 | + LEA( SYM (_fpCCR),a1)| check the rounding mode | |
229 | #ifdef __mcoldfire__ | |
230 | clrl d6 | |
231 | #endif | |
232 | @@ -2084,7 +2114,7 @@ | |
233 | swap d0 | | |
234 | orl d7,d0 | and sign also | |
235 | ||
236 | - lea SYM (_fpCCR),a0 | |
237 | + LEA( SYM (_fpCCR),a0) | |
238 | movew IMM (0),a0@ | |
239 | #ifndef __mcoldfire__ | |
240 | moveml sp@+,d2-d7 | |
241 | @@ -2126,7 +2156,7 @@ | |
242 | movel d0,d7 | else get sign and return INFINITY | |
243 | andl IMM (0x80000000),d7 | |
244 | bra Ld$infty | |
245 | -1: lea SYM (_fpCCR),a0 | |
246 | +1: LEA( SYM (_fpCCR),a0) | |
247 | movew IMM (0),a0@ | |
248 | #ifndef __mcoldfire__ | |
249 | moveml sp@+,d2-d7 | |
250 | @@ -2424,7 +2454,7 @@ | |
251 | orl d7,d0 | |
252 | movew IMM (INEXACT_RESULT+UNDERFLOW),d7 | |
253 | moveq IMM (SINGLE_FLOAT),d6 | |
254 | - jmp $_exception_handler | |
255 | + JUMP( $_exception_handler) | |
256 | ||
257 | Lf$infty: | |
258 | Lf$overflow: | |
259 | @@ -2433,21 +2463,21 @@ | |
260 | orl d7,d0 | |
261 | movew IMM (INEXACT_RESULT+OVERFLOW),d7 | |
262 | moveq IMM (SINGLE_FLOAT),d6 | |
263 | - jmp $_exception_handler | |
264 | + JUMP( $_exception_handler) | |
265 | ||
266 | Lf$underflow: | |
267 | | Return 0 and set the exception flags | |
268 | movel IMM (0),d0 | |
269 | movew IMM (INEXACT_RESULT+UNDERFLOW),d7 | |
270 | moveq IMM (SINGLE_FLOAT),d6 | |
271 | - jmp $_exception_handler | |
272 | + JUMP( $_exception_handler) | |
273 | ||
274 | Lf$inop: | |
275 | | Return a quiet NaN and set the exception flags | |
276 | movel IMM (QUIET_NaN),d0 | |
277 | movew IMM (INEXACT_RESULT+INVALID_OPERATION),d7 | |
278 | moveq IMM (SINGLE_FLOAT),d6 | |
279 | - jmp $_exception_handler | |
280 | + JUMP( $_exception_handler) | |
281 | ||
282 | Lf$div$0: | |
283 | | Return a properly signed INFINITY and set the exception flags | |
284 | @@ -2455,7 +2485,7 @@ | |
285 | orl d7,d0 | |
286 | movew IMM (INEXACT_RESULT+DIVIDE_BY_ZERO),d7 | |
287 | moveq IMM (SINGLE_FLOAT),d6 | |
288 | - jmp $_exception_handler | |
289 | + JUMP( $_exception_handler) | |
290 | ||
291 | |============================================================================= | |
292 | |============================================================================= | |
293 | @@ -2737,8 +2767,8 @@ | |
294 | #endif | |
295 | addl IMM (1),d2 | |
296 | 1: | |
297 | - lea Laddsf$4,a0 | to return from rounding routine | |
298 | - lea SYM (_fpCCR),a1 | check the rounding mode | |
299 | + lea pc@(Laddsf$4),a0 | to return from rounding routine | |
300 | + LEA( SYM (_fpCCR),a1)| check the rounding mode | |
301 | #ifdef __mcoldfire__ | |
302 | clrl d6 | |
303 | #endif | |
304 | @@ -2802,8 +2832,8 @@ | |
305 | | Note that we do not have to normalize, since in the subtraction bit | |
306 | | #FLT_MANT_DIG+1 is never set, and denormalized numbers are handled by | |
307 | | the rounding routines themselves. | |
308 | - lea Lsubsf$1,a0 | to return from rounding routine | |
309 | - lea SYM (_fpCCR),a1 | check the rounding mode | |
310 | + lea pc@(Lsubsf$1),a0 | to return from rounding routine | |
311 | + LEA( SYM (_fpCCR),a1)| check the rounding mode | |
312 | #ifdef __mcoldfire__ | |
313 | clrl d6 | |
314 | #endif | |
315 | @@ -2834,7 +2864,7 @@ | |
316 | | check for finiteness or zero). | |
317 | Laddsf$a$small: | |
318 | movel a6@(12),d0 | |
319 | - lea SYM (_fpCCR),a0 | |
320 | + LEA( SYM (_fpCCR),a0) | |
321 | movew IMM (0),a0@ | |
322 | #ifndef __mcoldfire__ | |
323 | moveml sp@+,d2-d7 | restore data registers | |
324 | @@ -2848,7 +2878,7 @@ | |
325 | ||
326 | Laddsf$b$small: | |
327 | movel a6@(8),d0 | |
328 | - lea SYM (_fpCCR),a0 | |
329 | + LEA( SYM (_fpCCR),a0) | |
330 | movew IMM (0),a0@ | |
331 | #ifndef __mcoldfire__ | |
332 | moveml sp@+,d2-d7 | restore data registers | |
333 | @@ -2905,7 +2935,7 @@ | |
334 | Laddsf$ret: | |
335 | | Normal exit (a and b nonzero, result is not NaN nor +/-infty). | |
336 | | We have to clear the exception flags (just the exception type). | |
337 | - lea SYM (_fpCCR),a0 | |
338 | + LEA( SYM (_fpCCR),a0) | |
339 | movew IMM (0),a0@ | |
340 | orl d7,d0 | put sign bit | |
341 | #ifndef __mcoldfire__ | |
342 | @@ -3141,7 +3171,7 @@ | |
343 | 1: bclr IMM (31),d1 | clear sign bit | |
344 | cmpl IMM (INFINITY),d1 | and check for a large exponent | |
345 | bge Lf$inop | if b is +/-INFINITY or NaN return NaN | |
346 | - lea SYM (_fpCCR),a0 | else return zero | |
347 | + LEA( SYM (_fpCCR),a0)| else return zero | |
348 | movew IMM (0),a0@ | | |
349 | #ifndef __mcoldfire__ | |
350 | moveml sp@+,d2-d7 | | |
351 | @@ -3341,7 +3371,7 @@ | |
352 | cmpl IMM (INFINITY),d1 | check for NaN | |
353 | bhi Lf$inop | | |
354 | movel IMM (0),d0 | else return zero | |
355 | - lea SYM (_fpCCR),a0 | | |
356 | + LEA( SYM (_fpCCR),a0) | | |
357 | movew IMM (0),a0@ | | |
358 | #ifndef __mcoldfire__ | |
359 | moveml sp@+,d2-d7 | | |
360 | @@ -3444,8 +3474,8 @@ | |
361 | 2: orl d6,d1 | this is a trick so we don't lose ' | |
362 | | the extra bits which were flushed right | |
363 | | Now call the rounding routine (which takes care of denormalized numbers): | |
364 | - lea Lround$0,a0 | to return from rounding routine | |
365 | - lea SYM (_fpCCR),a1 | check the rounding mode | |
366 | + lea pc@(Lround$0),a0 | to return from rounding routine | |
367 | + LEA( SYM (_fpCCR),a1)| check the rounding mode | |
368 | #ifdef __mcoldfire__ | |
369 | clrl d6 | |
370 | #endif | |
371 | @@ -3493,7 +3523,7 @@ | |
372 | swap d0 | | |
373 | orl d7,d0 | and sign also | |
374 | ||
375 | - lea SYM (_fpCCR),a0 | |
376 | + LEA( SYM (_fpCCR),a0) | |
377 | movew IMM (0),a0@ | |
378 | #ifndef __mcoldfire__ | |
379 | moveml sp@+,d2-d7 | |
380 | @@ -3534,7 +3564,7 @@ | |
381 | movel d0,d7 | else get sign and return INFINITY | |
382 | andl IMM (0x80000000),d7 | |
383 | bra Lf$infty | |
384 | -1: lea SYM (_fpCCR),a0 | |
385 | +1: LEA( SYM (_fpCCR),a0) | |
386 | movew IMM (0),a0@ | |
387 | #ifndef __mcoldfire__ | |
388 | moveml sp@+,d2-d7 | |
389 | @@ -3742,7 +3772,7 @@ | |
390 | movl a6@(16),sp@- | |
391 | movl a6@(12),sp@- | |
392 | movl a6@(8),sp@- | |
393 | - jbsr SYM (__cmpdf2) | |
394 | + CALL( SYM (__cmpdf2)) | |
395 | unlk a6 | |
396 | rts | |
397 | #endif /* L_eqdf2 */ | |
398 | @@ -3757,7 +3787,7 @@ | |
399 | movl a6@(16),sp@- | |
400 | movl a6@(12),sp@- | |
401 | movl a6@(8),sp@- | |
402 | - jbsr SYM (__cmpdf2) | |
403 | + CALL( SYM (__cmpdf2)) | |
404 | unlk a6 | |
405 | rts | |
406 | #endif /* L_nedf2 */ | |
407 | @@ -3772,7 +3802,7 @@ | |
408 | movl a6@(16),sp@- | |
409 | movl a6@(12),sp@- | |
410 | movl a6@(8),sp@- | |
411 | - jbsr SYM (__cmpdf2) | |
412 | + CALL( SYM (__cmpdf2)) | |
413 | unlk a6 | |
414 | rts | |
415 | #endif /* L_gtdf2 */ | |
416 | @@ -3787,7 +3817,7 @@ | |
417 | movl a6@(16),sp@- | |
418 | movl a6@(12),sp@- | |
419 | movl a6@(8),sp@- | |
420 | - jbsr SYM (__cmpdf2) | |
421 | + CALL( SYM (__cmpdf2)) | |
422 | unlk a6 | |
423 | rts | |
424 | #endif /* L_gedf2 */ | |
425 | @@ -3802,7 +3832,7 @@ | |
426 | movl a6@(16),sp@- | |
427 | movl a6@(12),sp@- | |
428 | movl a6@(8),sp@- | |
429 | - jbsr SYM (__cmpdf2) | |
430 | + CALL( SYM (__cmpdf2)) | |
431 | unlk a6 | |
432 | rts | |
433 | #endif /* L_ltdf2 */ | |
434 | @@ -3817,7 +3847,7 @@ | |
435 | movl a6@(16),sp@- | |
436 | movl a6@(12),sp@- | |
437 | movl a6@(8),sp@- | |
438 | - jbsr SYM (__cmpdf2) | |
439 | + CALL( SYM (__cmpdf2)) | |
440 | unlk a6 | |
441 | rts | |
442 | #endif /* L_ledf2 */ | |
443 | @@ -3833,7 +3863,7 @@ | |
444 | link a6,IMM (0) | |
445 | movl a6@(12),sp@- | |
446 | movl a6@(8),sp@- | |
447 | - jbsr SYM (__cmpsf2) | |
448 | + CALL( SYM (__cmpsf2)) | |
449 | unlk a6 | |
450 | rts | |
451 | #endif /* L_eqsf2 */ | |
452 | @@ -3846,7 +3876,7 @@ | |
453 | link a6,IMM (0) | |
454 | movl a6@(12),sp@- | |
455 | movl a6@(8),sp@- | |
456 | - jbsr SYM (__cmpsf2) | |
457 | + CALL( SYM (__cmpsf2)) | |
458 | unlk a6 | |
459 | rts | |
460 | #endif /* L_nesf2 */ | |
461 | @@ -3859,7 +3889,7 @@ | |
462 | link a6,IMM (0) | |
463 | movl a6@(12),sp@- | |
464 | movl a6@(8),sp@- | |
465 | - jbsr SYM (__cmpsf2) | |
466 | + CALL( SYM (__cmpsf2)) | |
467 | unlk a6 | |
468 | rts | |
469 | #endif /* L_gtsf2 */ | |
470 | @@ -3872,7 +3902,7 @@ | |
471 | link a6,IMM (0) | |
472 | movl a6@(12),sp@- | |
473 | movl a6@(8),sp@- | |
474 | - jbsr SYM (__cmpsf2) | |
475 | + CALL( SYM (__cmpsf2)) | |
476 | unlk a6 | |
477 | rts | |
478 | #endif /* L_gesf2 */ | |
479 | @@ -3885,7 +3915,7 @@ | |
480 | link a6,IMM (0) | |
481 | movl a6@(12),sp@- | |
482 | movl a6@(8),sp@- | |
483 | - jbsr SYM (__cmpsf2) | |
484 | + CALL( SYM (__cmpsf2)) | |
485 | unlk a6 | |
486 | rts | |
487 | #endif /* L_ltsf2 */ | |
488 | @@ -3898,7 +3928,7 @@ | |
489 | link a6,IMM (0) | |
490 | movl a6@(12),sp@- | |
491 | movl a6@(8),sp@- | |
492 | - jbsr SYM (__cmpsf2) | |
493 | + CALL( SYM (__cmpsf2)) | |
494 | unlk a6 | |
495 | rts | |
496 | #endif /* L_lesf2 */ | |
497 | diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k-none.h gcc-3.3.1-20030720/gcc/config/m68k/m68k-none.h | |
498 | --- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k-none.h 2003-07-26 03:15:35.000000000 +0200 | |
499 | +++ gcc-3.3.1-20030720/gcc/config/m68k/m68k-none.h 2003-07-25 18:08:09.000000000 +0200 | |
500 | @@ -145,6 +145,7 @@ | |
501 | %{m5307:-D__mcoldfire__ -D__mcf5300__ -D__mcf5300 -D__mcf5307__ -D__mcf5307 } \ | |
502 | %{m5407:-D__mcoldfire__ -D__mcf5400__ -D__mcf5400 -D__mcf5407__ -D__mcf5407 } \ | |
503 | %{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32: %{!m68332:%{!m5200:%{!m5206e:%{!m528x:%{!m5307:%{!m5407:%(cpp_cpu_default)}}}}}}}}}}}}}}}}}} \ | |
504 | +%{fPIC:-D__PIC__ -D__pic__} %{fpic:-D__PIC__ -D__pic__} %{msep-data:-D__PIC__ -D__pic__} %{mid-shared-library:-D__PIC__ -D__pic__ -D__ID_SHARED_LIBRARY__} \ | |
505 | %(cpp_subtarget) \ | |
506 | " | |
507 | ||
508 | @@ -153,6 +154,7 @@ | |
509 | #undef ASM_SPEC | |
510 | #define ASM_SPEC "\ | |
511 | %{m68851}%{mno-68851}%{m68881}%{mno-68881}%{msoft-float:-mno-68881 }%{m68000}%{m68302}%{mc68000}%{m68010}%{m68020}%{mc68020}%{m68030}%{m68040}%{m68020-40:-mc68040 }%{m68020-60:-mc68040 }%{m68060}%{mcpu32}%{m68332}%{m5200}%{m5206e}%{m528x}%{m5307}%{m5407}%{!mc68000:%{!m68000:%{!m68302:%{!m68010:%{!mc68020:%{!m68020:%{!m68030:%{!m68040:%{!m68020-40:%{!m68020-60:%{!m68060:%{!mcpu32:%{!m68332:%{!m5200:%{!m5206e:%{!m528x:%{!m5307:%{!m5407:%(asm_cpu_default) }}}}}}}}}}}}}}}}}} \ | |
512 | +%{fPIC:--pcrel} %{fpic:--pcrel} %{msep-data:--pcrel} %{mid-shared-library:--pcrel} \ | |
513 | " | |
514 | ||
515 | /* cc1/cc1plus always receives all the -m flags. If the specs strings above | |
516 | diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.c gcc-3.3.1-20030720/gcc/config/m68k/m68k.c | |
517 | --- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.c 2003-07-26 03:15:35.000000000 +0200 | |
518 | +++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.c 2003-07-26 03:12:54.000000000 +0200 | |
519 | @@ -120,6 +120,8 @@ | |
520 | const char *m68k_align_jumps_string; | |
521 | /* Specify power of two alignment used for functions. */ | |
522 | const char *m68k_align_funcs_string; | |
523 | +/* Specified the identification number of the library being built */ | |
524 | +const char *m68k_library_id_string; | |
525 | ||
526 | /* Specify power of two alignment used for loops. */ | |
527 | int m68k_align_loops; | |
528 | @@ -127,6 +129,8 @@ | |
529 | int m68k_align_jumps; | |
530 | /* Specify power of two alignment used for functions. */ | |
531 | int m68k_align_funcs; | |
532 | +/* Specify library identification number */ | |
533 | +int m68k_library_id; | |
534 | ||
535 | /* Nonzero if the last compare/test insn had FP operands. The | |
536 | sCC expanders peek at this to determine what to do for the | |
537 | @@ -206,6 +210,32 @@ | |
538 | m68k_align_loops = i; | |
539 | } | |
540 | ||
541 | + /* Library identification */ | |
542 | + if (m68k_library_id_string) | |
543 | + { | |
544 | + if (! TARGET_ID_SHARED_LIBRARY) | |
545 | + error ("-mshared-library-id= specified without -mid-shared-library"); | |
546 | + m68k_library_id = atoi (m68k_library_id_string); | |
547 | + if (m68k_library_id < 0 || m68k_library_id > MAX_LIBRARY_ID) | |
548 | + error ("-mshared-library-id=%d is not between 0 and %d", | |
549 | + m68k_library_id, MAX_LIBRARY_ID); | |
550 | + } | |
551 | + else | |
552 | + m68k_library_id = -1; | |
553 | + | |
554 | + /* Sanity check to ensure that msep-data and mid-sahred-library are not | |
555 | + * both specified together. Doing so simply doesn't make sense. | |
556 | + */ | |
557 | + if (TARGET_SEP_DATA && TARGET_ID_SHARED_LIBRARY) | |
558 | + error ("cannot specify both -msep-data and -mid-shared-library"); | |
559 | + | |
560 | + /* If we're generating code for a separate A5 relative data segment, | |
561 | + * we've got to enable -fPIC as well. This might be relaxable to | |
562 | + * -fpic but it hasn't been tested properly. | |
563 | + */ | |
564 | + if (TARGET_SEP_DATA || TARGET_ID_SHARED_LIBRARY) | |
565 | + flag_pic = 2; | |
566 | + | |
567 | /* Validate -malign-jumps= value, or provide default */ | |
568 | m68k_align_jumps = def_align; | |
569 | if (m68k_align_jumps_string) | |
570 | @@ -231,7 +261,7 @@ | |
571 | ||
572 | /* -fPIC uses 32-bit pc-relative displacements, which don't exist | |
573 | until the 68020. */ | |
574 | - if (! TARGET_68020 && flag_pic == 2) | |
575 | + if (!TARGET_68020 && !TARGET_COLDFIRE && (flag_pic == 2)) | |
576 | error("-fPIC is not currently supported on the 68000 or 68010\n"); | |
577 | ||
578 | /* ??? A historic way of turning on pic, or is this intended to | |
579 | @@ -833,18 +863,39 @@ | |
580 | -cfa_store_offset + n_regs++ * 4); | |
581 | } | |
582 | } | |
583 | - if (flag_pic && current_function_uses_pic_offset_table) | |
584 | + if (! TARGET_SEP_DATA && flag_pic && | |
585 | + (current_function_uses_pic_offset_table || | |
586 | + ( ! current_function_is_leaf && TARGET_ID_SHARED_LIBRARY))) | |
587 | { | |
588 | + if (! TARGET_ID_SHARED_LIBRARY) | |
589 | + { | |
590 | #ifdef MOTOROLA | |
591 | - asm_fprintf (stream, "\t%Olea (%Rpc, %U_GLOBAL_OFFSET_TABLE_@GOTPC), %s\n", | |
592 | - reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
593 | + asm_fprintf (stream, "\t%Olea (%Rpc, %U_GLOBAL_OFFSET_TABLE_@GOTPC), %s\n", | |
594 | + reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
595 | #else | |
596 | - asm_fprintf (stream, "\tmovel %0I__GLOBAL_OFFSET_TABLE_, %s\n", | |
597 | - reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
598 | - asm_fprintf (stream, "\tlea %Rpc@(0,%s:l),%s\n", | |
599 | - reg_names[PIC_OFFSET_TABLE_REGNUM], | |
600 | - reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
601 | + asm_fprintf (stream, "\tmovel %0I__GLOBAL_OFFSET_TABLE_, %s\n", | |
602 | + reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
603 | + asm_fprintf (stream, "\tlea %Rpc@(0,%s:l),%s\n", | |
604 | + reg_names[PIC_OFFSET_TABLE_REGNUM], | |
605 | + reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
606 | #endif | |
607 | + } | |
608 | + else | |
609 | + { | |
610 | + if (m68k_library_id > 0) | |
611 | + { | |
612 | + asm_fprintf (stream, "\tmovel %s@(%d), %s\n", | |
613 | + reg_names[PIC_OFFSET_TABLE_REGNUM], | |
614 | + m68k_library_id * -4 - 4, | |
615 | + reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
616 | + } | |
617 | + else | |
618 | + { | |
619 | + asm_fprintf (stream, "\tmovel %s@(_current_shared_library_a5_offset_), %s\n", | |
620 | + reg_names[PIC_OFFSET_TABLE_REGNUM], | |
621 | + reg_names[PIC_OFFSET_TABLE_REGNUM]); | |
622 | + } | |
623 | + } | |
624 | } | |
625 | } | |
626 | #endif /* !CRDS */ | |
627 | diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.h gcc-3.3.1-20030720/gcc/config/m68k/m68k.h | |
628 | --- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.h 2003-07-26 03:15:35.000000000 +0200 | |
629 | +++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.h 2003-07-26 03:12:31.000000000 +0200 | |
630 | @@ -167,6 +167,18 @@ | |
631 | #define MASK_528x 0x80000 | |
632 | #define TARGET_528x (target_flags & MASK_528x) | |
633 | ||
634 | +/* Support A5 relative data seperate from text. | |
635 | + * This option implies -fPIC, however it inhibits the generation of the | |
636 | + * A5 save/restore in functions and the loading of a5 with a got pointer. | |
637 | + */ | |
638 | +#define MASK_SEP_DATA 0x100000 | |
639 | +#define TARGET_SEP_DATA (target_flags & MASK_SEP_DATA) | |
640 | + | |
641 | +/* Compile using library ID based shared libraries. | |
642 | + * Set a specific ID using the -mshared-library-id=xxx option. | |
643 | + */ | |
644 | +#define MASK_ID_SHARED_LIBRARY 0x200000 | |
645 | +#define TARGET_ID_SHARED_LIBRARY (target_flags & MASK_ID_SHARED_LIBRARY) | |
646 | ||
647 | /* Is the target a coldfire */ | |
648 | #define MASK_COLDFIRE (MASK_5200|MASK_528x|MASK_CFV3|MASK_CFV4) | |
649 | @@ -279,6 +291,22 @@ | |
650 | N_("Align variables on a 32-bit boundary") }, \ | |
651 | { "no-align-int", -MASK_ALIGN_INT, \ | |
652 | N_("Align variables on a 16-bit boundary") }, \ | |
653 | + { "sep-data", MASK_SEP_DATA, \ | |
654 | + N_("Enable separate data segment") }, \ | |
655 | + { "no-sep-data", -MASK_SEP_DATA, \ | |
656 | + N_("Disable separate data segment") }, \ | |
657 | + { "id-shared-library", MASK_ID_SHARED_LIBRARY, \ | |
658 | + N_("Enable ID based shared library") }, \ | |
659 | + { "no-id-shared-library", -MASK_ID_SHARED_LIBRARY, \ | |
660 | + N_("Disable ID based shared library") }, \ | |
661 | + { "hwdiv", MASK_CF_HWDIV, \ | |
662 | + N_("Use hardware divisor") }, \ | |
663 | + { "no-hwdiv", -MASK_CF_HWDIV, \ | |
664 | + N_("Don't use hardware divisor") }, \ | |
665 | + { "mac", 0, \ | |
666 | + N_("Use hardware Multiply-accumulate unit") }, \ | |
667 | + { "no-mac", 0, \ | |
668 | + N_("Don't use hardware Multiply-accumulate unit") }, \ | |
669 | { "pcrel", MASK_PCREL, \ | |
670 | N_("Generate pc-relative code") }, \ | |
671 | { "strict-align", -MASK_NO_STRICT_ALIGNMENT, \ | |
672 | @@ -305,6 +333,8 @@ | |
673 | N_("Jump targets are aligned to this power of 2") }, \ | |
674 | { "align-functions=", &m68k_align_funcs_string, \ | |
675 | N_("Function starts are aligned to this power of 2") }, \ | |
676 | + { "shared-library-id=", &m68k_library_id_string, \ | |
677 | + N_("ID of shared library to build") }, \ | |
678 | SUBTARGET_OPTIONS \ | |
679 | } | |
680 | ||
681 | @@ -381,6 +411,9 @@ | |
682 | /* Maximum power of 2 that code can be aligned to. */ | |
683 | #define MAX_CODE_ALIGN 2 /* 4 byte alignment */ | |
684 | ||
685 | +/* Maximum number of library ids we permit */ | |
686 | +#define MAX_LIBRARY_ID 255 | |
687 | + | |
688 | /* Align loop starts for optimal branching. */ | |
689 | #define LOOP_ALIGN(LABEL) (m68k_align_loops) | |
690 | ||
691 | @@ -1600,9 +1633,10 @@ | |
692 | relative to an average of the time for add and the time for shift, | |
693 | taking away a little more because sometimes move insns are needed. */ | |
694 | /* div?.w is relatively cheaper on 68000 counted in COSTS_N_INSNS terms. */ | |
695 | -#define MULL_COST (TARGET_68060 ? 2 : TARGET_68040 ? 5 : 13) | |
696 | -#define MULW_COST (TARGET_68060 ? 2 : TARGET_68040 ? 3 : TARGET_68020 ? 8 : 5) | |
697 | -#define DIVW_COST (TARGET_68020 ? 27 : 12) | |
698 | +#define MULL_COST (TARGET_68060 ? 2 : TARGET_68040 ? 5 : TARGET_CFV3 ? 3 : TARGET_COLDFIRE ? 10 : 13) | |
699 | +#define MULW_COST (TARGET_68060 ? 2 : TARGET_68040 ? 3 : TARGET_68020 ? 8 : \ | |
700 | + TARGET_CFV3 ? 2 : 5) | |
701 | +#define DIVW_COST (TARGET_68020 ? 27 : TARGET_CF_HWDIV ? 11 : 12) | |
702 | ||
703 | #define RTX_COSTS(X,CODE,OUTER_CODE) \ | |
704 | case PLUS: \ | |
705 | @@ -1614,15 +1648,19 @@ | |
706 | && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \ | |
707 | && (INTVAL (XEXP (XEXP (X, 0), 1)) == 2 \ | |
708 | || INTVAL (XEXP (XEXP (X, 0), 1)) == 4 \ | |
709 | - || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) \ | |
710 | - return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \ | |
711 | + || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) { \ | |
712 | + if (TARGET_COLDFIRE) \ | |
713 | + return COSTS_N_INSNS (2); \ | |
714 | + else \ | |
715 | + return COSTS_N_INSNS (3); /* lea an@(dx:l:i),am */ \ | |
716 | + } \ | |
717 | break; \ | |
718 | case ASHIFT: \ | |
719 | case ASHIFTRT: \ | |
720 | case LSHIFTRT: \ | |
721 | if (TARGET_68060) \ | |
722 | return COSTS_N_INSNS(1); \ | |
723 | - if (! TARGET_68020) \ | |
724 | + if (! TARGET_68020 && ! TARGET_COLDFIRE) \ | |
725 | { \ | |
726 | if (GET_CODE (XEXP (X, 1)) == CONST_INT) \ | |
727 | { \ | |
728 | @@ -1640,8 +1678,12 @@ | |
729 | return COSTS_N_INSNS (2); /* clrw;swap */ \ | |
730 | if (GET_CODE (XEXP (X, 1)) == CONST_INT \ | |
731 | && !(INTVAL (XEXP (X, 1)) > 0 \ | |
732 | - && INTVAL (XEXP (X, 1)) <= 8)) \ | |
733 | - return COSTS_N_INSNS (3); /* lsr #i,dn */ \ | |
734 | + && INTVAL (XEXP (X, 1)) <= 8)) { \ | |
735 | + if (TARGET_COLDFIRE) \ | |
736 | + return COSTS_N_INSNS(1); \ | |
737 | + else \ | |
738 | + return COSTS_N_INSNS (3); /* lsr #i,dn */ \ | |
739 | + } \ | |
740 | break; \ | |
741 | case MULT: \ | |
742 | if ((GET_CODE (XEXP (X, 0)) == ZERO_EXTEND \ | |
743 | @@ -1658,6 +1700,8 @@ | |
744 | case UMOD: \ | |
745 | if (GET_MODE (X) == QImode || GET_MODE (X) == HImode) \ | |
746 | return COSTS_N_INSNS (DIVW_COST); /* div.w */ \ | |
747 | + if (TARGET_CF_HWDIV) \ | |
748 | + return COSTS_N_INSNS(18); \ | |
749 | return COSTS_N_INSNS (43); /* div.l */ | |
750 | \f | |
751 | /* Tell final.c how to eliminate redundant test instructions. */ | |
752 | @@ -1982,10 +2026,17 @@ | |
753 | ||
754 | #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) | |
755 | ||
756 | +/* The maximum alignment which the object file format can support. */ | |
757 | +#undef MAX_OFILE_ALIGNMENT | |
758 | +#define MAX_OFILE_ALIGNMENT 128 | |
759 | + | |
760 | + | |
761 | /* Variables in m68k.c */ | |
762 | extern const char *m68k_align_loops_string; | |
763 | extern const char *m68k_align_jumps_string; | |
764 | extern const char *m68k_align_funcs_string; | |
765 | +extern const char *m68k_library_id_string; | |
766 | +extern int m68k_library_id; | |
767 | extern int m68k_align_loops; | |
768 | extern int m68k_align_jumps; | |
769 | extern int m68k_align_funcs; | |
770 | diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.md gcc-3.3.1-20030720/gcc/config/m68k/m68k.md | |
771 | --- gcc-3.3.1-20030720.orig/gcc/config/m68k/m68k.md 2003-07-26 03:15:35.000000000 +0200 | |
772 | +++ gcc-3.3.1-20030720/gcc/config/m68k/m68k.md 2003-07-25 23:53:50.000000000 +0200 | |
773 | @@ -7372,26 +7372,31 @@ | |
774 | if (GET_CODE (operands[0]) == MEM | |
775 | && GET_CODE (XEXP (operands[0], 0)) == SYMBOL_REF) | |
776 | { | |
777 | - if (TARGET_PCREL) return \"bsr.l %o0\"; | |
778 | -#ifdef MOTOROLA | |
779 | + /* We output a bsr instruction if we've using -fpic or we're building for | |
780 | + * a target that supports long branches. If we're building -fPIC on the | |
781 | + * 68000. 68010 or coldfire we're generate one of two sequences | |
782 | + * a shorter one that uses a GOT entry or a longer one that doesn't. | |
783 | + * We'll use the -Os commandline flag to decide which to generate. | |
784 | + * Both sequences take the same time to execute on the coldfire. | |
785 | + */ | |
786 | + if (TARGET_SEP_DATA || TARGET_ID_SHARED_LIBRARY) | |
787 | + return \"move.l %0@GOT(%%a5), %%a1\\n\\tjsr (%%a1)\"; | |
788 | + else if (TARGET_PCREL) | |
789 | + return \"bsr.l %o0\"; | |
790 | + else if (flag_pic == 1 || TARGET_68020) | |
791 | #ifdef HPUX_ASM | |
792 | - return \"bsr.l %0\"; | |
793 | + return \"bsr.l %0\"; | |
794 | #else | |
795 | #ifdef USE_GAS | |
796 | - return \"bsr.l %0@PLTPC\"; | |
797 | + return \"bsr %0@PLTPC\"; | |
798 | #else | |
799 | - return \"bsr %0@PLTPC\"; | |
800 | -#endif | |
801 | -#endif | |
802 | -#else | |
803 | -#ifdef USE_GAS | |
804 | - return \"bsr.l %0\"; | |
805 | -#else | |
806 | - /* The ',a1' is a dummy argument telling the Sun assembler we want PIC, | |
807 | - GAS just plain ignores it. FIXME: not anymore, gas doesn't! */ | |
808 | - return \"jbsr %0,a1\"; | |
809 | + return \"bsr.l %0@PLTPC\"; | |
810 | #endif | |
811 | #endif | |
812 | + else if (optimize_size) | |
813 | + return \"move.l %0@GOT(%%a5), %%a1\\n\\tjsr (%%a1)\"; | |
814 | + else | |
815 | + return \"lea %0-.-8,%%a1\;jsr 0(%%pc,%%a1)\"; | |
816 | } | |
817 | return \"jsr %0\"; | |
818 | ") | |
819 | @@ -7443,25 +7448,26 @@ | |
820 | && GET_CODE (XEXP (operands[1], 0)) == SYMBOL_REF) | |
821 | { | |
822 | if (TARGET_PCREL) return \"bsr.l %o1\"; | |
823 | -#ifdef MOTOROLA | |
824 | + /* We output a bsr instruction if we've using -fpic or we're building for | |
825 | + * a target that supports long branches. If we're building -fPIC on the | |
826 | + * 68000. 68010 or coldfire we're generate one of two sequences | |
827 | + * a shorter one that uses a GOT entry or a longer one that doesn't. | |
828 | + * We'll use the -Os commandline flag to decide which to generate. | |
829 | + */ | |
830 | + if (flag_pic == 1 || TARGET_68020) | |
831 | #ifdef HPUX_ASM | |
832 | - return \"bsr.l %1\"; | |
833 | + return \"bsr.l %1\"; | |
834 | #else | |
835 | #ifdef USE_GAS | |
836 | - return \"bsr.l %1@PLTPC\"; | |
837 | + return \"bsr.l %1@PLTPC\"; | |
838 | #else | |
839 | - return \"bsr %1@PLTPC\"; | |
840 | -#endif | |
841 | -#endif | |
842 | -#else | |
843 | -#ifdef USE_GAS | |
844 | - return \"bsr.l %1\"; | |
845 | -#else | |
846 | - /* The ',a1' is a dummy argument telling the Sun assembler we want PIC | |
847 | - GAS just plain ignores it. FIXME: Not anymore, gas doesn't! */ | |
848 | - return \"jbsr %1,a1\"; | |
849 | + return \"bsr %1@PLTPC\"; | |
850 | #endif | |
851 | #endif | |
852 | + else if (optimize_size || TARGET_ID_SHARED_LIBRARY) | |
853 | + return \"move.l %1@GOT(%%a5), %%a1\\n\\tjsr (%%a1)\"; | |
854 | + else | |
855 | + return \"lea %1-.-8,%%a1\;jsr 0(%%pc,%%a1)\"; | |
856 | } | |
857 | return \"jsr %1\"; | |
858 | ") | |
859 | diff -Nru gcc-3.3.1-20030720.orig/gcc/config/m68k/t-m68kelf gcc-3.3.1-20030720/gcc/config/m68k/t-m68kelf | |
860 | --- gcc-3.3.1-20030720.orig/gcc/config/m68k/t-m68kelf 2003-07-26 03:15:35.000000000 +0200 | |
861 | +++ gcc-3.3.1-20030720/gcc/config/m68k/t-m68kelf 2003-07-26 03:12:45.000000000 +0200 | |
862 | @@ -12,14 +12,16 @@ | |
863 | echo '#define EXTFLOAT' > xfgnulib.c | |
864 | cat $(srcdir)/config/m68k/fpgnulib.c >> xfgnulib.c | |
865 | ||
866 | -MULTILIB_OPTIONS = m68000/m68020/m5200/m5206e/m528x/m5307/m5407/mcpu32/m68040/m68060 m68881/msoft-float | |
867 | +MULTILIB_OPTIONS = m68000/m68020/m68040/m68060/m5200/m5206e/m528x/m5307/m5407/mcpu32 m68881/msoft-float msep-data/mid-shared-library | |
868 | MULTILIB_DIRNAMES = | |
869 | MULTILIB_MATCHES = m68000=mc68000 m68000=m68302 mcpu32=m68332 m68020=mc68020 m5206e=m5272 | |
870 | -MULTILIB_EXCEPTIONS = m68000/msoft-float m5200/m68881 m5200/msoft-float \ | |
871 | - m5206e/m68881 m5206e/msoft-float m528x/m68881 m528x/msoft-float \ | |
872 | - m5307/m68881 m5307/msoft-float m5407/m68881 m5407/msoft-float \ | |
873 | - mcpu32/m68881 mcpu32/msoft-float m68040/m68881 m68040/msoft-float \ | |
874 | - m68060/m68881 m68060/msoft-float | |
875 | +MULTILIB_EXCEPTIONS = m68000/msoft-float* m68000/msep-data* m68000/mid-shared-library* m5200/m68881* m5200/msoft-float* \ | |
876 | + m5206e/m68881* m5206e/msoft-float* m528x/m68881* m528x/msoft-float* \ | |
877 | + m5307/m68881* m5307/msoft-float* m5407/m68881* m5407/msoft-float* \ | |
878 | + mcpu32/m68881* mcpu32/msoft-float* m68040/m68881* m68040/msoft-float* \ | |
879 | + m68060/m68881* m68060/msoft-float* \ | |
880 | + msep-data* msoft-float/msep-data* \ | |
881 | + mid-shared-library msoft-float/mid-shared-library | |
882 | LIBGCC = stmp-multilib | |
883 | INSTALL_LIBGCC = install-multilib | |
884 |