- rel 4

[packages/crossavr-libc.git] / 305-avr-libc-avrtc-309.patch

diff --git a/305-avr-libc-avrtc-309.patch b/305-avr-libc-avrtc-309.patch
new file mode 100644 (file)
index 0000000..d7cb152
--- /dev/null
+++ b/305-avr-libc-avrtc-309.patch
@@ -0,0 +1,235 @@
+diff -Naurp include/avr/sleep.h include/avr/sleep.h
+--- include/avr/sleep.h        2012-11-22 12:15:17.000000000 +0530
++++ include/avr/sleep.h        2012-11-22 12:12:27.000000000 +0530
+@@ -256,6 +256,33 @@
+         _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
+     } while(0)
+ 
++#elif defined(__AVR_ATmega16HVA__) \
++|| defined(__AVR_ATmega8HVA__) 
++
++    #define SLEEP_MODE_IDLE         (0)
++    #define SLEEP_MODE_ADC          _BV(SM0)
++    #define SLEEP_MODE_PWR_SAVE     (_BV(SM0) | _BV(SM1))
++    #define SLEEP_MODE_PWR_OFF      _BV(SM2)
++
++
++    #define set_sleep_mode(mode) \
++    do { \
++        _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
++    } while(0)
++
++#elif defined(__AVR_ATmega406__)
++
++    #define SLEEP_MODE_IDLE         (0)
++    #define SLEEP_MODE_ADC          _BV(SM0)
++    #define SLEEP_MODE_PWR_DOWN     _BV(SM1)
++    #define SLEEP_MODE_PWR_SAVE     (_BV(SM0) | _BV(SM1))
++    #define SLEEP_MODE_PWR_OFF      _BV(SM2)
++
++    #define set_sleep_mode(mode) \
++    do { \
++        _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
++    } while(0)
++
+ #elif defined(__AVR_ATtiny2313__) \
+ || defined(__AVR_ATtiny2313A__) \
+ || defined(__AVR_ATtiny4313__)
+@@ -269,7 +296,8 @@
+         _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \
+     } while(0)
+ 
+-#elif defined(__AVR_AT94K__)
++#elif defined(__AVR_AT94K__) \
++|| defined(__AVR_ATmega64HVE__)
+ 
+     #define SLEEP_MODE_IDLE         0
+     #define SLEEP_MODE_PWR_DOWN     _BV(SM1)
+@@ -301,7 +329,15 @@
+ 
+ #elif defined(__AVR_AT90PWM216__) \
+ || defined(__AVR_AT90PWM316__) \
+-|| defined(__AVR_AT90PWM81__)
++|| defined(__AVR_AT90PWM81__) \
++|| defined(__AVR_AT90PWM1__) \
++|| defined(__AVR_AT90PWM2__) \
++|| defined(__AVR_AT90PWM2B__) \
++|| defined(__AVR_AT90PWM3__) \
++|| defined(__AVR_AT90PWM3B__) \
++|| defined(__AVR_ATmega32M1__) \
++|| defined(__AVR_ATmega16M1__) \
++|| defined(__AVR_ATmega64M1__) 
+ 
+     #define SLEEP_MODE_IDLE         0
+     #define SLEEP_MODE_ADC          _BV(SM0)
+@@ -313,17 +349,7 @@
+         _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
+     } while(0)
+ 
+-#elif defined(__AVR_AT90CAN128__) \
+-|| defined(__AVR_AT90CAN32__) \
+-|| defined(__AVR_AT90CAN64__) \
+-|| defined(__AVR_AT90PWM1__) \
+-|| defined(__AVR_AT90PWM2__) \
+-|| defined(__AVR_AT90PWM2B__) \
+-|| defined(__AVR_AT90PWM3__) \
+-|| defined(__AVR_AT90PWM3B__) \
+-|| defined(__AVR_AT90USB162__) \
+-|| defined(__AVR_AT90USB82__) \
+-|| defined(__AVR_AT90USB1286__) \
++#elif defined(__AVR_AT90USB1286__) \
+ || defined(__AVR_AT90USB1287__) \
+ || defined(__AVR_AT90USB646__) \
+ || defined(__AVR_AT90USB647__) \
+@@ -337,20 +363,9 @@
+ || defined(__AVR_ATmega162__) \
+ || defined(__AVR_ATmega164A__) \
+ || defined(__AVR_ATmega164P__) \
+-|| defined(__AVR_ATmega165__) \
+-|| defined(__AVR_ATmega165A__) \
+-|| defined(__AVR_ATmega165P__) \
+-|| defined(__AVR_ATmega168__) \
+ || defined(__AVR_ATmega168A__) \
+ || defined(__AVR_ATmega168P__) \
+-|| defined(__AVR_ATmega169__) \
+-|| defined(__AVR_ATmega169A__) \
+-|| defined(__AVR_ATmega169P__) \
+-|| defined(__AVR_ATmega169PA__) \
+-|| defined(__AVR_ATmega16HVA__) \
+ || defined(__AVR_ATmega16HVA2__) \
+-|| defined(__AVR_ATmega16M1__) \
+-|| defined(__AVR_ATmega16U2__) \
+ || defined(__AVR_ATmega16U4__) \
+ || defined(__AVR_ATmega2560__) \
+ || defined(__AVR_ATmega2561__) \
+@@ -359,26 +374,11 @@
+ || defined(__AVR_ATmega324A__) \
+ || defined(__AVR_ATmega324P__) \
+ || defined(__AVR_ATmega324PA__) \
+-|| defined(__AVR_ATmega325__) \
+-|| defined(__AVR_ATmega325A__) \
+-|| defined(__AVR_ATmega3250__) \
+-|| defined(__AVR_ATmega3250A__) \
+ || defined(__AVR_ATmega328__) \
+ || defined(__AVR_ATmega328P__) \
+-|| defined(__AVR_ATmega329__) \
+-|| defined(__AVR_ATmega329A__) \
+-|| defined(__AVR_ATmega329P__) \
+-|| defined(__AVR_ATmega329PA__) \
+-|| defined(__AVR_ATmega3290__) \
+-|| defined(__AVR_ATmega3290A__) \
+-|| defined(__AVR_ATmega3290P__) \
+ || defined(__AVR_ATmega32C1__) \
+-|| defined(__AVR_ATmega32M1__) \
+-|| defined(__AVR_ATmega32U2__) \
+ || defined(__AVR_ATmega32U4__) \
+ || defined(__AVR_ATmega32U6__) \
+-|| defined(__AVR_ATmega406__) \
+-|| defined(__AVR_ATmega48__) \
+ || defined(__AVR_ATmega48A__) \
+ || defined(__AVR_ATmega48P__) \
+ || defined(__AVR_ATmega64__) \
+@@ -387,31 +387,12 @@
+ || defined(__AVR_ATmega644A__) \
+ || defined(__AVR_ATmega644P__) \
+ || defined(__AVR_ATmega644PA__) \
+-|| defined(__AVR_ATmega645__) \
+-|| defined(__AVR_ATmega645A__) \
+-|| defined(__AVR_ATmega645P__) \
+-|| defined(__AVR_ATmega6450__) \
+-|| defined(__AVR_ATmega6450A__) \
+-|| defined(__AVR_ATmega6450P__) \
+-|| defined(__AVR_ATmega649__) \
+-|| defined(__AVR_ATmega649A__) \
+-|| defined(__AVR_ATmega6490__) \
+-|| defined(__AVR_ATmega6490A__) \
+-|| defined(__AVR_ATmega6490P__) \
+-|| defined(__AVR_ATmega649P__) \
+ || defined(__AVR_ATmega64C1__) \
+-|| defined(__AVR_ATmega64HVE__) \
+-|| defined(__AVR_ATmega64M1__) \
+-|| defined(__AVR_ATmega8__) \
+ || defined(__AVR_ATmega8515__) \
+ || defined(__AVR_ATmega8535__) \
+-|| defined(__AVR_ATmega88__) \
+ || defined(__AVR_ATmega88A__) \
+ || defined(__AVR_ATmega88P__) \
+-|| defined(__AVR_ATmega88PA__) \
+-|| defined(__AVR_ATmega8HVA__) \
+-|| defined(__AVR_ATmega8U2__)
+-
++|| defined(__AVR_ATmega88PA__) 
+ 
+     #define SLEEP_MODE_IDLE         (0)
+     #define SLEEP_MODE_ADC          _BV(SM0)
+@@ -426,6 +407,56 @@
+         _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
+     } while(0)
+ 
++#elif defined(__AVR_ATmega8__) \
++|| defined(__AVR_ATmega6450A__) \
++|| defined(__AVR_ATmega6450P__) \
++|| defined(__AVR_ATmega645A__) \
++|| defined(__AVR_ATmega645P__) \
++|| defined(__AVR_ATmega3250A__) \
++|| defined(__AVR_ATmega325A__) \
++|| defined(__AVR_ATmega165A__) \
++|| defined(__AVR_ATmega165P__) \
++|| defined(__AVR_ATmega169A__) \
++|| defined(__AVR_ATmega169P__) \
++|| defined(__AVR_ATmega169PA__) \
++|| defined(__AVR_ATmega329A__) \
++|| defined(__AVR_ATmega329PA__) \
++|| defined(__AVR_ATmega3290A__) \
++|| defined(__AVR_ATmega649A__) \
++|| defined(__AVR_ATmega649P__) \
++|| defined(__AVR_ATmega6490A__) \
++|| defined(__AVR_ATmega6490P__) \
++|| defined(__AVR_ATmega165__) \
++|| defined(__AVR_ATmega169__) \
++|| defined(__AVR_ATmega48__) \
++|| defined(__AVR_ATmega88__) \
++|| defined(__AVR_ATmega168__) \
++|| defined(__AVR_ATmega325__) \
++|| defined(__AVR_ATmega3250__) \
++|| defined(__AVR_ATmega645__) \
++|| defined(__AVR_ATmega6450__) \
++|| defined(__AVR_ATmega329__) \
++|| defined(__AVR_ATmega329P__) \
++|| defined(__AVR_ATmega3290__) \
++|| defined(__AVR_ATmega3290P__) \
++|| defined(__AVR_ATmega649__) \
++|| defined(__AVR_ATmega6490__) \
++|| defined(__AVR_AT90CAN128__) \
++|| defined(__AVR_AT90CAN32__) \
++|| defined(__AVR_AT90CAN64__) 
++
++    #define SLEEP_MODE_IDLE         (0)
++    #define SLEEP_MODE_ADC          _BV(SM0)
++    #define SLEEP_MODE_PWR_DOWN     _BV(SM1)
++    #define SLEEP_MODE_PWR_SAVE     (_BV(SM0) | _BV(SM1))
++    #define SLEEP_MODE_STANDBY      (_BV(SM1) | _BV(SM2))
++
++
++    #define set_sleep_mode(mode) \
++    do { \
++        _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \
++    } while(0)
++
+ #elif defined(__AVR_ATxmega16A4__) \
+ || defined(__AVR_ATxmega16D4__) \
+ || defined(__AVR_ATxmega32A4__) \
+@@ -455,7 +486,12 @@
+         _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(SLEEP_SMODE2_bm | SLEEP_SMODE1_bm | SLEEP_SMODE0_bm)) | (mode)); \
+     } while(0)
+ 
+-#elif defined(__AVR_AT90SCR100__)
++#elif defined(__AVR_AT90SCR100__) \
++|| defined(__AVR_ATmega8U2__) \
++|| defined(__AVR_ATmega16U2__) \
++|| defined(__AVR_ATmega32U2__) \
++|| defined(__AVR_AT90USB162__) \
++|| defined(__AVR_AT90USB82__) 
+ 
+     #define SLEEP_MODE_IDLE         (0)
+     #define SLEEP_MODE_PWR_DOWN     _BV(SM1)