1 diff -Naurp include/avr/wdt.h include/avr/wdt.h
2 --- include/avr/wdt.h 2013-03-15 12:07:15.000000000 +0530
3 +++ include/avr/wdt.h 2013-03-15 12:25:20.000000000 +0530
7 # define _WD_CONTROL_REG WDTCSR
10 # define _WD_CONTROL_REG WDTCR
12 +# define _WD_CONTROL_REG WDT
16 @@ -359,6 +361,137 @@ __asm__ __volatile__ ( \
20 +#elif defined(__AVR_ATtiny1634__) \
21 +|| defined(__AVR_ATtiny828__)
23 +#define wdt_enable(value) \
24 +__asm__ __volatile__ ( \
25 + "in __tmp_reg__,__SREG__" "\n\t" \
28 + "sts %[CCPADDRESS],%[SIGNATURE]" "\n\t" \
29 + "sts %[WDTREG],%[WDVALUE]" "\n\t" \
30 + "out __SREG__,__tmp_reg__" "\n\t" \
31 + : /* no outputs */ \
32 + : [CCPADDRESS] "M" (_SFR_MEM_ADDR(CCP)), \
33 + [SIGNATURE] "r" ((uint8_t)0xD8), \
34 + [WDTREG] "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
35 + [WDVALUE] "r" ((uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00) \
36 + | _BV(WDE) | value)) \
40 +#define wdt_disable() \
43 +__asm__ __volatile__ ( \
44 + "in __tmp_reg__,__SREG__" "\n\t" \
47 + "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" \
48 + "in %[TEMP_WD],%[WDTREG]" "\n\t" \
49 + "cbr %[TEMP_WD],%[WDVALUE]" "\n\t" \
50 + "out %[WDTREG],%[TEMP_WD]" "\n\t" \
51 + "out __SREG__,__tmp_reg__" "\n\t" \
53 + : [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)), \
54 + [SIGNATURE] "r" ((uint8_t)0xD8), \
55 + [WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \
56 + [TEMP_WD] "d" (temp_wd), \
57 + [WDVALUE] "I" (1 << WDE) \
62 +#elif defined(__AVR_ATtiny4__) \
63 +|| defined(__AVR_ATtiny5__) \
64 +|| defined(__AVR_ATtiny9__) \
65 +|| defined(__AVR_ATtiny10__) \
66 +|| defined(__AVR_ATtiny20__) \
67 +|| defined(__AVR_ATtiny40__)
69 +#define wdt_enable(value) \
70 +__asm__ __volatile__ ( \
71 + "in __tmp_reg__,__SREG__" "\n\t" \
74 + "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" \
75 + "out %[WDTREG],%[WDVALUE]" "\n\t" \
76 + "out __SREG__,__tmp_reg__" "\n\t" \
77 + : /* no outputs */ \
78 + : [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)), \
79 + [SIGNATURE] "r" ((uint8_t)0xD8), \
80 + [WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \
81 + [WDVALUE] "r" ((uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00) \
82 + | _BV(WDE) | value)) \
86 +#define wdt_disable() \
89 +__asm__ __volatile__ ( \
90 + "in __tmp_reg__,__SREG__" "\n\t" \
93 + "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" \
94 + "in %[TEMP_WD],%[WDTREG]" "\n\t" \
95 + "cbr %[TEMP_WD],%[WDVALUE]" "\n\t" \
96 + "out %[WDTREG],%[TEMP_WD]" "\n\t" \
97 + "out __SREG__,__tmp_reg__" "\n\t" \
99 + : [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)), \
100 + [SIGNATURE] "r" ((uint8_t)0xD8), \
101 + [WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \
102 + [TEMP_WD] "d" (temp_wd), \
103 + [WDVALUE] "I" (1 << WDE) \
108 +#elif defined(__AVR_ATxmega32X1__) \
109 +||defined(__AVR_ATxmega64A1__)
111 +#define wdt_enable(value) \
112 +__asm__ __volatile__ ( \
113 + "in __tmp_reg__,__SREG__" "\n\t" \
116 + "sts %[CCPADDRESS],%[SIGNATURE]" "\n\t" \
117 + "sts %[WDTREG],%[WDVALUE]" "\n\t" \
118 + "out __SREG__,__tmp_reg__" "\n\t" \
119 + : /* no outputs */ \
120 + : [CCPADDRESS] "M" (_SFR_MEM_ADDR(CCP)), \
121 + [SIGNATURE] "r" ((uint8_t)0xD8), \
122 + [WDTREG] "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
123 + [WDVALUE] "r" ((uint8_t)((_BV(WDT_ENABLE_bp)) | (_BV(WDT_CEN_bp)) | \
124 + (value << WDT_PER_gp))) \
128 +#define wdt_disable() \
129 +__asm__ __volatile__ ( \
130 + "in __tmp_reg__,__SREG__" "\n\t" \
133 + "sts %[CCPADDRESS],%[SIGNATURE]" "\n\t" \
134 + "sts %[WDTREG],%[WDVALUE]" "\n\t" \
135 + "out __SREG__,__tmp_reg__" "\n\t" \
136 + : /* no outputs */ \
137 + : [CCPADDRESS] "M" (_SFR_MEM_ADDR(CCP)), \
138 + [SIGNATURE] "r" ((uint8_t)0xD8), \
139 + [WDTREG] "M" (_SFR_MEM_ADDR(_WD_CONTROL_REG)), \
140 + [WDVALUE] "r" ((uint8_t)((_BV(WDT_CEN_bp)))) \
145 +Undefining explicitly so that it produces an error.
147 +#elif defined(__AVR_AT90C8534__) \
148 +|| defined(__AVR_M3000__)