- rel 4

[packages/crossavr-libc.git] / 501-avr-libc-bug12584.patch

diff -Naurp include/avr/power.h include/avr/power.h
--- include/avr/power.h	2013-03-15 12:19:39.000000000 +0530
+++ include/avr/power.h	2013-03-15 12:20:10.000000000 +0530
@@ -2976,12 +2976,16 @@ do{ \
 || defined(__AVR_ATmega165P__) \
 || defined(__AVR_ATmega165PA__) \
 || defined(__AVR_ATmega168__) \
+|| defined(__AVR_ATmega168A__) \
 || defined(__AVR_ATmega168P__) \
 || defined(__AVR_ATmega168PA__) \
 || defined(__AVR_ATmega169__) \
 || defined(__AVR_ATmega169A__) \
 || defined(__AVR_ATmega169P__) \
 || defined(__AVR_ATmega169PA__) \
+|| defined(__AVR_ATmega16M1__) \
+|| defined(__AVR_ATmega16U2__) \
+|| defined(__AVR_ATmega324PA__) \
 || defined(__AVR_ATmega16U4__) \
 || defined(__AVR_ATmega2560__) \
 || defined(__AVR_ATmega2561__) \
@@ -3003,6 +3007,7 @@ do{ \
 || defined(__AVR_ATmega329PA__) \
 || defined(__AVR_ATmega3290__) \
 || defined(__AVR_ATmega3290A__) \
+|| defined(__AVR_ATmega3290P__) \
 || defined(__AVR_ATmega3290PA__) \
 || defined(__AVR_ATmega32C1__) \
 || defined(__AVR_ATmega32M1__) \
@@ -3027,6 +3032,10 @@ do{ \
 || defined(__AVR_ATmega6450P__) \
 || defined(__AVR_ATmega649__) \
 || defined(__AVR_ATmega649A__) \
+|| defined(__AVR_ATmega64M1__) \
+|| defined(__AVR_ATmega64C1__) \
+|| defined(__AVR_ATmega88A__) \
+|| defined(__AVR_ATmega88PA__) \
 || defined(__AVR_ATmega6490__) \
 || defined(__AVR_ATmega6490A__) \
 || defined(__AVR_ATmega6490P__) \
@@ -3038,6 +3047,8 @@ do{ \
 || defined(__AVR_ATmega16U2__) \
 || defined(__AVR_ATmega32U2__) \
 || defined(__AVR_ATtiny48__) \
+|| defined(__AVR_ATtiny88__) \
+|| defined(__AVR_ATtiny87__) \
 || defined(__AVR_ATtiny167__) \
 || defined(__DOXYGEN__)
 
@@ -3384,10 +3395,47 @@ void clock_prescale_set(clock_div_t __x)
 
 #define clock_prescale_get()  (clock_div_t)(CLKPR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
 
+#elif defined(__AVR_ATtiny4__) \
+|| defined(__AVR_ATtiny5__) \
+|| defined(__AVR_ATtiny9__) \
+|| defined(__AVR_ATtiny10__) \
+|| defined(__AVR_ATtiny20__) \
+|| defined(__AVR_ATtiny40__) \
+
+typedef enum 
+{ 
+    clock_div_1 = 0, 
+    clock_div_2 = 1, 
+    clock_div_4 = 2, 
+    clock_div_8 = 3, 
+    clock_div_16 = 4, 
+    clock_div_32 = 5, 
+    clock_div_64 = 6, 
+    clock_div_128 = 7, 
+    clock_div_256 = 8 
+} clock_div_t; 
 
-#endif
+static __inline__ void clock_prescale_set(clock_div_t) __attribute__((__always_inline__));
 
+void clock_prescale_set(clock_div_t __x)
+{
+    uint8_t __tmp = 0xD8;
+    __asm__ __volatile__ (
+        "in __tmp_reg__,__SREG__" "\n\t"
+        "cli" "\n\t"
+        "out %1, %0" "\n\t"
+        "out %2, %3" "\n\t"
+        "out __SREG__, __tmp_reg__"
+        : /* no outputs */
+        : "d" (__tmp),
+          "I" (_SFR_IO_ADDR(CCP)),
+          "I" (_SFR_IO_ADDR(CLKPSR)),
+          "d" (__x)
+        : "r16");
+}
 
+#define clock_prescale_get()  (clock_div_t)(CLKPSR & (uint8_t)((1<<CLKPS0)|(1<<CLKPS1)|(1<<CLKPS2)|(1<<CLKPS3)))
 
+#endif
 
 #endif /* _AVR_POWER_H_ */