projects / packages / crossavr-libc.git / blame
| Commit | Line | Data |
|---|---|---|
| 69ed15f0 JR |
1 | diff -Naurp include/avr/sleep.h include/avr/sleep.h |
| 2 | --- include/avr/sleep.h 2012-11-22 12:15:17.000000000 +0530 | |
| 3 | +++ include/avr/sleep.h 2012-11-22 12:12:27.000000000 +0530 | |
| 4 | @@ -256,6 +256,33 @@ | |
| 5 | _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ | |
| 6 | } while(0) | |
| 7 | ||
| 8 | +#elif defined(__AVR_ATmega16HVA__) \ | |
| 9 | +|| defined(__AVR_ATmega8HVA__) | |
| 10 | + | |
| 11 | + #define SLEEP_MODE_IDLE (0) | |
| 12 | + #define SLEEP_MODE_ADC _BV(SM0) | |
| 13 | + #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1)) | |
| 14 | + #define SLEEP_MODE_PWR_OFF _BV(SM2) | |
| 15 | + | |
| 16 | + | |
| 17 | + #define set_sleep_mode(mode) \ | |
| 18 | + do { \ | |
| 19 | + _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ | |
| 20 | + } while(0) | |
| 21 | + | |
| 22 | +#elif defined(__AVR_ATmega406__) | |
| 23 | + | |
| 24 | + #define SLEEP_MODE_IDLE (0) | |
| 25 | + #define SLEEP_MODE_ADC _BV(SM0) | |
| 26 | + #define SLEEP_MODE_PWR_DOWN _BV(SM1) | |
| 27 | + #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1)) | |
| 28 | + #define SLEEP_MODE_PWR_OFF _BV(SM2) | |
| 29 | + | |
| 30 | + #define set_sleep_mode(mode) \ | |
| 31 | + do { \ | |
| 32 | + _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ | |
| 33 | + } while(0) | |
| 34 | + | |
| 35 | #elif defined(__AVR_ATtiny2313__) \ | |
| 36 | || defined(__AVR_ATtiny2313A__) \ | |
| 37 | || defined(__AVR_ATtiny4313__) | |
| 38 | @@ -269,7 +296,8 @@ | |
| 39 | _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1))) | (mode)); \ | |
| 40 | } while(0) | |
| 41 | ||
| 42 | -#elif defined(__AVR_AT94K__) | |
| 43 | +#elif defined(__AVR_AT94K__) \ | |
| 44 | +|| defined(__AVR_ATmega64HVE__) | |
| 45 | ||
| 46 | #define SLEEP_MODE_IDLE 0 | |
| 47 | #define SLEEP_MODE_PWR_DOWN _BV(SM1) | |
| 48 | @@ -301,7 +329,15 @@ | |
| 49 | ||
| 50 | #elif defined(__AVR_AT90PWM216__) \ | |
| 51 | || defined(__AVR_AT90PWM316__) \ | |
| 52 | -|| defined(__AVR_AT90PWM81__) | |
| 53 | +|| defined(__AVR_AT90PWM81__) \ | |
| 54 | +|| defined(__AVR_AT90PWM1__) \ | |
| 55 | +|| defined(__AVR_AT90PWM2__) \ | |
| 56 | +|| defined(__AVR_AT90PWM2B__) \ | |
| 57 | +|| defined(__AVR_AT90PWM3__) \ | |
| 58 | +|| defined(__AVR_AT90PWM3B__) \ | |
| 59 | +|| defined(__AVR_ATmega32M1__) \ | |
| 60 | +|| defined(__AVR_ATmega16M1__) \ | |
| 61 | +|| defined(__AVR_ATmega64M1__) | |
| 62 | ||
| 63 | #define SLEEP_MODE_IDLE 0 | |
| 64 | #define SLEEP_MODE_ADC _BV(SM0) | |
| 65 | @@ -313,17 +349,7 @@ | |
| 66 | _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ | |
| 67 | } while(0) | |
| 68 | ||
| 69 | -#elif defined(__AVR_AT90CAN128__) \ | |
| 70 | -|| defined(__AVR_AT90CAN32__) \ | |
| 71 | -|| defined(__AVR_AT90CAN64__) \ | |
| 72 | -|| defined(__AVR_AT90PWM1__) \ | |
| 73 | -|| defined(__AVR_AT90PWM2__) \ | |
| 74 | -|| defined(__AVR_AT90PWM2B__) \ | |
| 75 | -|| defined(__AVR_AT90PWM3__) \ | |
| 76 | -|| defined(__AVR_AT90PWM3B__) \ | |
| 77 | -|| defined(__AVR_AT90USB162__) \ | |
| 78 | -|| defined(__AVR_AT90USB82__) \ | |
| 79 | -|| defined(__AVR_AT90USB1286__) \ | |
| 80 | +#elif defined(__AVR_AT90USB1286__) \ | |
| 81 | || defined(__AVR_AT90USB1287__) \ | |
| 82 | || defined(__AVR_AT90USB646__) \ | |
| 83 | || defined(__AVR_AT90USB647__) \ | |
| 84 | @@ -337,20 +363,9 @@ | |
| 85 | || defined(__AVR_ATmega162__) \ | |
| 86 | || defined(__AVR_ATmega164A__) \ | |
| 87 | || defined(__AVR_ATmega164P__) \ | |
| 88 | -|| defined(__AVR_ATmega165__) \ | |
| 89 | -|| defined(__AVR_ATmega165A__) \ | |
| 90 | -|| defined(__AVR_ATmega165P__) \ | |
| 91 | -|| defined(__AVR_ATmega168__) \ | |
| 92 | || defined(__AVR_ATmega168A__) \ | |
| 93 | || defined(__AVR_ATmega168P__) \ | |
| 94 | -|| defined(__AVR_ATmega169__) \ | |
| 95 | -|| defined(__AVR_ATmega169A__) \ | |
| 96 | -|| defined(__AVR_ATmega169P__) \ | |
| 97 | -|| defined(__AVR_ATmega169PA__) \ | |
| 98 | -|| defined(__AVR_ATmega16HVA__) \ | |
| 99 | || defined(__AVR_ATmega16HVA2__) \ | |
| 100 | -|| defined(__AVR_ATmega16M1__) \ | |
| 101 | -|| defined(__AVR_ATmega16U2__) \ | |
| 102 | || defined(__AVR_ATmega16U4__) \ | |
| 103 | || defined(__AVR_ATmega2560__) \ | |
| 104 | || defined(__AVR_ATmega2561__) \ | |
| 105 | @@ -359,26 +374,11 @@ | |
| 106 | || defined(__AVR_ATmega324A__) \ | |
| 107 | || defined(__AVR_ATmega324P__) \ | |
| 108 | || defined(__AVR_ATmega324PA__) \ | |
| 109 | -|| defined(__AVR_ATmega325__) \ | |
| 110 | -|| defined(__AVR_ATmega325A__) \ | |
| 111 | -|| defined(__AVR_ATmega3250__) \ | |
| 112 | -|| defined(__AVR_ATmega3250A__) \ | |
| 113 | || defined(__AVR_ATmega328__) \ | |
| 114 | || defined(__AVR_ATmega328P__) \ | |
| 115 | -|| defined(__AVR_ATmega329__) \ | |
| 116 | -|| defined(__AVR_ATmega329A__) \ | |
| 117 | -|| defined(__AVR_ATmega329P__) \ | |
| 118 | -|| defined(__AVR_ATmega329PA__) \ | |
| 119 | -|| defined(__AVR_ATmega3290__) \ | |
| 120 | -|| defined(__AVR_ATmega3290A__) \ | |
| 121 | -|| defined(__AVR_ATmega3290P__) \ | |
| 122 | || defined(__AVR_ATmega32C1__) \ | |
| 123 | -|| defined(__AVR_ATmega32M1__) \ | |
| 124 | -|| defined(__AVR_ATmega32U2__) \ | |
| 125 | || defined(__AVR_ATmega32U4__) \ | |
| 126 | || defined(__AVR_ATmega32U6__) \ | |
| 127 | -|| defined(__AVR_ATmega406__) \ | |
| 128 | -|| defined(__AVR_ATmega48__) \ | |
| 129 | || defined(__AVR_ATmega48A__) \ | |
| 130 | || defined(__AVR_ATmega48P__) \ | |
| 131 | || defined(__AVR_ATmega64__) \ | |
| 132 | @@ -387,31 +387,12 @@ | |
| 133 | || defined(__AVR_ATmega644A__) \ | |
| 134 | || defined(__AVR_ATmega644P__) \ | |
| 135 | || defined(__AVR_ATmega644PA__) \ | |
| 136 | -|| defined(__AVR_ATmega645__) \ | |
| 137 | -|| defined(__AVR_ATmega645A__) \ | |
| 138 | -|| defined(__AVR_ATmega645P__) \ | |
| 139 | -|| defined(__AVR_ATmega6450__) \ | |
| 140 | -|| defined(__AVR_ATmega6450A__) \ | |
| 141 | -|| defined(__AVR_ATmega6450P__) \ | |
| 142 | -|| defined(__AVR_ATmega649__) \ | |
| 143 | -|| defined(__AVR_ATmega649A__) \ | |
| 144 | -|| defined(__AVR_ATmega6490__) \ | |
| 145 | -|| defined(__AVR_ATmega6490A__) \ | |
| 146 | -|| defined(__AVR_ATmega6490P__) \ | |
| 147 | -|| defined(__AVR_ATmega649P__) \ | |
| 148 | || defined(__AVR_ATmega64C1__) \ | |
| 149 | -|| defined(__AVR_ATmega64HVE__) \ | |
| 150 | -|| defined(__AVR_ATmega64M1__) \ | |
| 151 | -|| defined(__AVR_ATmega8__) \ | |
| 152 | || defined(__AVR_ATmega8515__) \ | |
| 153 | || defined(__AVR_ATmega8535__) \ | |
| 154 | -|| defined(__AVR_ATmega88__) \ | |
| 155 | || defined(__AVR_ATmega88A__) \ | |
| 156 | || defined(__AVR_ATmega88P__) \ | |
| 157 | -|| defined(__AVR_ATmega88PA__) \ | |
| 158 | -|| defined(__AVR_ATmega8HVA__) \ | |
| 159 | -|| defined(__AVR_ATmega8U2__) | |
| 160 | - | |
| 161 | +|| defined(__AVR_ATmega88PA__) | |
| 162 | ||
| 163 | #define SLEEP_MODE_IDLE (0) | |
| 164 | #define SLEEP_MODE_ADC _BV(SM0) | |
| 165 | @@ -426,6 +407,56 @@ | |
| 166 | _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ | |
| 167 | } while(0) | |
| 168 | ||
| 169 | +#elif defined(__AVR_ATmega8__) \ | |
| 170 | +|| defined(__AVR_ATmega6450A__) \ | |
| 171 | +|| defined(__AVR_ATmega6450P__) \ | |
| 172 | +|| defined(__AVR_ATmega645A__) \ | |
| 173 | +|| defined(__AVR_ATmega645P__) \ | |
| 174 | +|| defined(__AVR_ATmega3250A__) \ | |
| 175 | +|| defined(__AVR_ATmega325A__) \ | |
| 176 | +|| defined(__AVR_ATmega165A__) \ | |
| 177 | +|| defined(__AVR_ATmega165P__) \ | |
| 178 | +|| defined(__AVR_ATmega169A__) \ | |
| 179 | +|| defined(__AVR_ATmega169P__) \ | |
| 180 | +|| defined(__AVR_ATmega169PA__) \ | |
| 181 | +|| defined(__AVR_ATmega329A__) \ | |
| 182 | +|| defined(__AVR_ATmega329PA__) \ | |
| 183 | +|| defined(__AVR_ATmega3290A__) \ | |
| 184 | +|| defined(__AVR_ATmega649A__) \ | |
| 185 | +|| defined(__AVR_ATmega649P__) \ | |
| 186 | +|| defined(__AVR_ATmega6490A__) \ | |
| 187 | +|| defined(__AVR_ATmega6490P__) \ | |
| 188 | +|| defined(__AVR_ATmega165__) \ | |
| 189 | +|| defined(__AVR_ATmega169__) \ | |
| 190 | +|| defined(__AVR_ATmega48__) \ | |
| 191 | +|| defined(__AVR_ATmega88__) \ | |
| 192 | +|| defined(__AVR_ATmega168__) \ | |
| 193 | +|| defined(__AVR_ATmega325__) \ | |
| 194 | +|| defined(__AVR_ATmega3250__) \ | |
| 195 | +|| defined(__AVR_ATmega645__) \ | |
| 196 | +|| defined(__AVR_ATmega6450__) \ | |
| 197 | +|| defined(__AVR_ATmega329__) \ | |
| 198 | +|| defined(__AVR_ATmega329P__) \ | |
| 199 | +|| defined(__AVR_ATmega3290__) \ | |
| 200 | +|| defined(__AVR_ATmega3290P__) \ | |
| 201 | +|| defined(__AVR_ATmega649__) \ | |
| 202 | +|| defined(__AVR_ATmega6490__) \ | |
| 203 | +|| defined(__AVR_AT90CAN128__) \ | |
| 204 | +|| defined(__AVR_AT90CAN32__) \ | |
| 205 | +|| defined(__AVR_AT90CAN64__) | |
| 206 | + | |
| 207 | + #define SLEEP_MODE_IDLE (0) | |
| 208 | + #define SLEEP_MODE_ADC _BV(SM0) | |
| 209 | + #define SLEEP_MODE_PWR_DOWN _BV(SM1) | |
| 210 | + #define SLEEP_MODE_PWR_SAVE (_BV(SM0) | _BV(SM1)) | |
| 211 | + #define SLEEP_MODE_STANDBY (_BV(SM1) | _BV(SM2)) | |
| 212 | + | |
| 213 | + | |
| 214 | + #define set_sleep_mode(mode) \ | |
| 215 | + do { \ | |
| 216 | + _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(_BV(SM0) | _BV(SM1) | _BV(SM2))) | (mode)); \ | |
| 217 | + } while(0) | |
| 218 | + | |
| 219 | #elif defined(__AVR_ATxmega16A4__) \ | |
| 220 | || defined(__AVR_ATxmega16D4__) \ | |
| 221 | || defined(__AVR_ATxmega32A4__) \ | |
| 222 | @@ -455,7 +486,12 @@ | |
| 223 | _SLEEP_CONTROL_REG = ((_SLEEP_CONTROL_REG & ~(SLEEP_SMODE2_bm | SLEEP_SMODE1_bm | SLEEP_SMODE0_bm)) | (mode)); \ | |
| 224 | } while(0) | |
| 225 | ||
| 226 | -#elif defined(__AVR_AT90SCR100__) | |
| 227 | +#elif defined(__AVR_AT90SCR100__) \ | |
| 228 | +|| defined(__AVR_ATmega8U2__) \ | |
| 229 | +|| defined(__AVR_ATmega16U2__) \ | |
| 230 | +|| defined(__AVR_ATmega32U2__) \ | |
| 231 | +|| defined(__AVR_AT90USB162__) \ | |
| 232 | +|| defined(__AVR_AT90USB82__) | |
| 233 | ||
| 234 | #define SLEEP_MODE_IDLE (0) | |
| 235 | #define SLEEP_MODE_PWR_DOWN _BV(SM1) |