- cleanup, updated BRs, stub texinfo build (not packaged and would require patch...

[packages/crossavr-gcc.git] / 501-gcc-avrtc579.patch

diff -Naurp gcc/config/avr/avr.c gcc/config/avr/avr.c
--- gcc/config/avr/avr.c	2012-11-09 19:05:47.000000000 +0530
+++ gcc/config/avr/avr.c	2012-11-14 13:57:13.000000000 +0530
@@ -2801,6 +2801,35 @@ avr_out_xload (rtx insn ATTRIBUTE_UNUSED
   return "";
 }
 
+/*
+AVRTC-579
+if operand is symbol or constant expression with value > 0xbf
+  return false, otherwise true
+This check is used to avoid lds/sts instruction with invalid memory
+access range (valid range 0x40..0xbf). For io operand range 0x0..0x3f,
+in/out instruction will be generated.
+*/
+bool tiny_valid_direct_memory_access_range(rtx op, enum machine_mode mode)
+{
+  rtx x;
+
+  if (!AVR_TINY)
+    return true;
+
+  x = XEXP(op,0);
+
+  if (MEM_P(op) && x && (GET_CODE(x) == SYMBOL_REF))
+  {
+    return false;
+  }
+  if (MEM_P(op) && x && (CONSTANT_ADDRESS_P (x)) &&
+     !(IN_RANGE (INTVAL (x), 0, 0xC0 - GET_MODE_SIZE (mode))))
+  {
+    return false;
+  }
+
+  return true;
+}
 
 const char*
 output_movqi (rtx insn, rtx operands[], int *real_l)
@@ -2956,9 +2985,10 @@ out_movqi_r_mr (rtx insn, rtx op[], int 
   
   if (CONSTANT_ADDRESS_P (x))
     {
+      int n_words = AVR_TINY ? 1 : 2;
       return optimize > 0 && io_address_operand (x, QImode)
         ? avr_asm_len ("in %0,%i1", op, plen, -1)
-        : avr_asm_len ("lds %0,%m1", op, plen, -2);
+        : avr_asm_len ("lds %0,%m1", op, plen, -n_words);
     }
 
 
@@ -3213,12 +3243,13 @@ out_movhi_r_mr (rtx insn, rtx op[], int 
     }
   else if (CONSTANT_ADDRESS_P (base))
     {
+      int n_words = AVR_TINY ? 2 : 4;
       return optimize > 0 && io_address_operand (base, HImode)
         ? avr_asm_len ("in %A0,%i1" CR_TAB
                        "in %B0,%i1+1", op, plen, -2)
 
         : avr_asm_len ("lds %A0,%m1" CR_TAB
-                       "lds %B0,%m1+1", op, plen, -4);
+                       "lds %B0,%m1+1", op, plen, -n_words);
     }
   
   fatal_insn ("unknown move insn:",insn);
@@ -3478,10 +3509,24 @@ out_movsi_r_mr (rtx insn, rtx op[], int 
 		  "ld %C0,%1" CR_TAB
 		  "ld %D0,%1");
   else if (CONSTANT_ADDRESS_P (base))
-    return *l=8, ("lds %A0,%m1"   CR_TAB
-                  "lds %B0,%m1+1" CR_TAB
-                  "lds %C0,%m1+2" CR_TAB
-                  "lds %D0,%m1+3");
+  {
+    if (io_address_operand (base, SImode))
+    {
+      *l = 4;
+      return ("in %A0,%i1"   CR_TAB
+              "in %B0,%i1+1" CR_TAB
+              "in %C0,%i1+2" CR_TAB
+              "in %D0,%i1+3");
+    }
+    else
+    {
+      *l = AVR_TINY ? 4 : 8;
+      return ("lds %A0,%m1"   CR_TAB
+              "lds %B0,%m1+1" CR_TAB
+              "lds %C0,%m1+2" CR_TAB
+              "lds %D0,%m1+3");
+    }
+  }
     
   fatal_insn ("unknown move insn:",insn);
   return "";
@@ -3608,10 +3653,24 @@ out_movsi_mr_r (rtx insn, rtx op[], int 
     l = &tmp;
   
   if (CONSTANT_ADDRESS_P (base))
-    return *l=8,("sts %m0,%A1" CR_TAB
-                 "sts %m0+1,%B1" CR_TAB
-                 "sts %m0+2,%C1" CR_TAB
-                 "sts %m0+3,%D1");
+  {
+    if (io_address_operand (base, SImode))
+    {
+      return *l=4,("out %i0, %A1"  CR_TAB
+                   "out %i0+1,%B1" CR_TAB
+                   "out %i0+2,%C1" CR_TAB
+                   "out %i0+3,%D1");
+    }
+    else
+    {
+      *l = AVR_TINY ? 4 : 8;
+      return ("sts %m0,%A1"   CR_TAB
+              "sts %m0+1,%B1" CR_TAB
+              "sts %m0+2,%C1" CR_TAB
+              "sts %m0+3,%D1");
+    }
+  }
+
   if (reg_base > 0)                 /* (r) */
     {
       if (AVR_TINY)
@@ -4031,9 +4090,12 @@ avr_out_load_psi (rtx insn, rtx *op, int
                         "ld %C0,%1", op, plen, -3);
 
   else if (CONSTANT_ADDRESS_P (base))
+  {
+    int n_words = AVR_TINY ? 3 : 6; 
     return avr_asm_len ("lds %A0,%m1" CR_TAB
                         "lds %B0,%m1+1" CR_TAB
-                        "lds %C0,%m1+2", op, plen , -6);
+                        "lds %C0,%m1+2", op, plen , -n_words);
+  }
   
   fatal_insn ("unknown move insn:",insn);
   return "";
@@ -4129,9 +4191,12 @@ avr_out_store_psi (rtx insn, rtx *op, in
   int reg_base = true_regnum (base);
   
   if (CONSTANT_ADDRESS_P (base))
+  {
+    int n_words = AVR_TINY ? 3 : 6;
     return avr_asm_len ("sts %m0,%A1"   CR_TAB
                         "sts %m0+1,%B1" CR_TAB
-                        "sts %m0+2,%C1", op, plen, -6);
+                        "sts %m0+2,%C1", op, plen, -n_words);
+  }
   
   if (reg_base > 0)                 /* (r) */
     {
@@ -4314,9 +4379,10 @@ out_movqi_mr_r (rtx insn, rtx op[], int 
   
   if (CONSTANT_ADDRESS_P (x))
     {
+      int n_words = AVR_TINY ? 1 : 2;
       return optimize > 0 && io_address_operand (x, QImode)
         ? avr_asm_len ("out %i0,%1", op, plen, -1)
-        : avr_asm_len ("sts %m0,%1", op, plen, -2);
+        : avr_asm_len ("sts %m0,%1", op, plen, -n_words);
     }
   else if (GET_CODE (x) == PLUS
            && REG_P (XEXP (x, 0))
@@ -4389,12 +4455,15 @@ avr_out_movhi_mr_r_xmega (rtx insn, rtx 
   int mem_volatile_p = MEM_VOLATILE_P (dest);
 
   if (CONSTANT_ADDRESS_P (base))
+  {
+    int n_words = AVR_TINY ? 2 : 4;
     return optimize > 0 && io_address_operand (base, HImode)
       ? avr_asm_len ("out %i0,%A1" CR_TAB
                      "out %i0+1,%B1", op, plen, -2)
 
       : avr_asm_len ("sts %m0,%A1" CR_TAB
-                     "sts %m0+1,%B1", op, plen, -4);
+                     "sts %m0+1,%B1", op, plen, -n_words);
+  }
   
   if (reg_base > 0)
     {
@@ -4574,12 +4643,15 @@ out_movhi_mr_r (rtx insn, rtx op[], int 
   mem_volatile_p = MEM_VOLATILE_P (dest);
 
   if (CONSTANT_ADDRESS_P (base))
+  {
+    int n_words = AVR_TINY ? 2 : 4;
     return optimize > 0 && io_address_operand (base, HImode)
       ? avr_asm_len ("out %i0+1,%B1" CR_TAB
                      "out %i0,%A1", op, plen, -2)
 
       : avr_asm_len ("sts %m0+1,%B1" CR_TAB
-                     "sts %m0,%A1", op, plen, -4);
+                     "sts %m0,%A1", op, plen, -n_words);
+  }
   
   if (reg_base > 0)
     {
diff -Naurp gcc/config/avr/avr.md gcc/config/avr/avr.md
--- gcc/config/avr/avr.md	2012-11-09 19:05:47.000000000 +0530
+++ gcc/config/avr/avr.md	2012-11-14 13:57:13.000000000 +0530
@@ -629,6 +629,32 @@
         DONE;
       }
 
+    /* AVRTC-579
+    if the source operand expression is out of range for 'lds' instruction
+      copy source operand expression to register
+    For tiny core, LDS instruction's memory access range limited to 0x40..0xbf
+    */
+    if (!tiny_valid_direct_memory_access_range(src,<MODE>mode))
+    {
+      rtx srcx = XEXP(src,0);
+      operands[1] = src = replace_equiv_address (src,copy_to_mode_reg (GET_MODE(srcx),srcx));
+      emit_move_insn(dest,src);
+      DONE;
+    }
+
+    /* AVRTC-579
+    if the destination operand expression is out of range for 'sts' instruction
+      copy destination operand expression to register
+    For tiny core, STS instruction's memory access range limited to 0x40..0xbf
+    */
+    if (!tiny_valid_direct_memory_access_range(dest,<MODE>mode))
+    {
+      rtx destx = XEXP(dest,0);
+      operands[0] = dest = replace_equiv_address (dest,copy_to_mode_reg (GET_MODE(destx),destx));
+      emit_move_insn(dest,src);
+      DONE;
+    }
+
     /* ; The only address-space for which we use plain MEM and reload
        ; machinery are 1-byte loads from __flash.  */
   })
@@ -645,9 +671,14 @@
 (define_insn "movqi_insn"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=r ,d,Qm,r ,q,r,*r")
         (match_operand:QI 1 "nox_general_operand"   "rL,i,rL,Qm,r,q,i"))]
-  "register_operand (operands[0], QImode)
+  "(register_operand (operands[0], QImode)
    || register_operand (operands[1], QImode)
-   || const0_rtx == operands[1]"
+   || const0_rtx == operands[1]) && 
+   /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
+   though access range is checked during define_expand, it is required
+   here to avoid merging rtls during combine pass */
+   tiny_valid_direct_memory_access_range(operands[0],QImode) &&
+   tiny_valid_direct_memory_access_range(operands[1],QImode)"
   {
     return output_movqi (insn, operands, NULL);
   }
@@ -732,9 +763,14 @@
 (define_insn "*movhi"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m ,d,*r,q,r")
         (match_operand:HI 1 "nox_general_operand"   "r,L,m,rL,i,i ,r,q"))]
-  "register_operand (operands[0], HImode)
+  "(register_operand (operands[0], HImode)
    || register_operand (operands[1], HImode)
-   || const0_rtx == operands[1]"
+   || const0_rtx == operands[1]) &&
+   /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
+   though access range is checked during define_expand, it is required
+   here to avoid merging rtls during combine pass */
+   tiny_valid_direct_memory_access_range(operands[0],HImode) &&
+   tiny_valid_direct_memory_access_range(operands[1],HImode)"
   {
     return output_movhi (insn, operands, NULL);
   }
@@ -842,9 +878,15 @@
 (define_insn "*movsi"
   [(set (match_operand:SI 0 "nonimmediate_operand" "=r,r,r ,Qm,!d,r")
         (match_operand:SI 1 "nox_general_operand"   "r,L,Qm,rL,i ,i"))]
-  "register_operand (operands[0], SImode)
+  "((register_operand (operands[0], SImode)
    || register_operand (operands[1], SImode)
-   || const0_rtx == operands[1]"
+   || const0_rtx == operands[1]) &&
+   /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
+   though access range is checked during define_expand, it is required
+   here to avoid merging rtls during combine pass */
+   tiny_valid_direct_memory_access_range(operands[0],SImode) &&
+   tiny_valid_direct_memory_access_range(operands[1],SImode))
+  "
   {
     return output_movsisf (insn, operands, NULL);
   }
@@ -858,9 +900,15 @@
 (define_insn "*movsf"
   [(set (match_operand:SF 0 "nonimmediate_operand" "=r,r,r ,Qm,!d,r")
         (match_operand:SF 1 "nox_general_operand"   "r,G,Qm,rG,F ,F"))]
-  "register_operand (operands[0], SFmode)
+  "((register_operand (operands[0], SFmode)
    || register_operand (operands[1], SFmode)
-   || operands[1] == CONST0_RTX (SFmode)"
+   || operands[1] == CONST0_RTX (SFmode)) &&
+   /* skip if operands are out of lds/sts memory access range(0x40..0xbf)
+   though access range is checked during define_expand, it is required
+   here to avoid merging rtls during combine pass */
+   tiny_valid_direct_memory_access_range(operands[0],SFmode) &&
+   tiny_valid_direct_memory_access_range(operands[1],SFmode))
+  "
   {
     return output_movsisf (insn, operands, NULL);
   }