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- updated to 2.21
[packages/crossavr-binutils.git] / crossavr-binutils-xmega.patch
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8cbbe116 1diff -uNdr binutils-2.21-orig.2/bfd/archures.c binutils-2.21/bfd/archures.c
2--- binutils-2.21-orig.2/bfd/archures.c 2010-07-23 16:52:46.000000000 +0200
3+++ binutils-2.21/bfd/archures.c 2011-06-17 18:29:41.000000000 +0200
4@@ -373,6 +373,13 @@
c66cb070 5 .#define bfd_mach_avr5 5
6 .#define bfd_mach_avr51 51
7 .#define bfd_mach_avr6 6
8+.#define bfd_mach_avrxmega1 101
9+.#define bfd_mach_avrxmega2 102
10+.#define bfd_mach_avrxmega3 103
11+.#define bfd_mach_avrxmega4 104
12+.#define bfd_mach_avrxmega5 105
13+.#define bfd_mach_avrxmega6 106
14+.#define bfd_mach_avrxmega7 107
15 . bfd_arch_bfin, {* ADI Blackfin *}
16 .#define bfd_mach_bfin 1
17 . bfd_arch_cr16, {* National Semiconductor CompactRISC (ie CR16). *}
8cbbe116 18diff -uNdr binutils-2.21-orig.2/bfd/bfd-in2.h binutils-2.21/bfd/bfd-in2.h
19--- binutils-2.21-orig.2/bfd/bfd-in2.h 2010-11-03 03:31:02.000000000 +0100
20+++ binutils-2.21/bfd/bfd-in2.h 2011-06-17 18:29:41.000000000 +0200
21@@ -2053,6 +2053,13 @@
c66cb070 22 #define bfd_mach_avr5 5
23 #define bfd_mach_avr51 51
24 #define bfd_mach_avr6 6
25+#define bfd_mach_avrxmega1 101
26+#define bfd_mach_avrxmega2 102
27+#define bfd_mach_avrxmega3 103
28+#define bfd_mach_avrxmega4 104
29+#define bfd_mach_avrxmega5 105
30+#define bfd_mach_avrxmega6 106
31+#define bfd_mach_avrxmega7 107
32 bfd_arch_bfin, /* ADI Blackfin */
33 #define bfd_mach_bfin 1
34 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */
8cbbe116 35diff -uNdr binutils-2.21-orig.2/bfd/cpu-avr.c binutils-2.21/bfd/cpu-avr.c
36--- binutils-2.21-orig.2/bfd/cpu-avr.c 2009-09-02 09:18:36.000000000 +0200
37+++ binutils-2.21/bfd/cpu-avr.c 2011-06-17 18:29:41.000000000 +0200
c66cb070 38@@ -133,7 +133,29 @@
39 N (22, bfd_mach_avr51, "avr:51", FALSE, & arch_info_struct[9]),
997dccbb 40
c66cb070 41 /* 3-Byte PC. */
42- N (22, bfd_mach_avr6, "avr:6", FALSE, NULL)
43+ N (22, bfd_mach_avr6, "avr:6", FALSE, & arch_info_struct[10]),
44+
45+ /* Xmega 1 */
46+ N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[11]),
47+
48+ /* Xmega 2 */
49+ N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[12]),
50+
51+ /* Xmega 3 */
52+ N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[13]),
53+
54+ /* Xmega 4 */
55+ N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[14]),
56+
57+ /* Xmega 5 */
58+ N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[15]),
59+
60+ /* Xmega 6 */
61+ N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[16]),
62+
63+ /* Xmega 7 */
64+ N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
65+
66 };
997dccbb 67
c66cb070 68 const bfd_arch_info_type bfd_avr_arch =
8cbbe116 69diff -uNdr binutils-2.21-orig.2/bfd/elf32-avr.c binutils-2.21/bfd/elf32-avr.c
70--- binutils-2.21-orig.2/bfd/elf32-avr.c 2010-10-25 17:54:13.000000000 +0200
71+++ binutils-2.21/bfd/elf32-avr.c 2011-06-17 18:29:41.000000000 +0200
72@@ -1340,6 +1340,34 @@
c66cb070 73 case bfd_mach_avr6:
74 val = E_AVR_MACH_AVR6;
75 break;
997dccbb 76+
c66cb070 77+ case bfd_mach_avrxmega1:
78+ val = E_AVR_MACH_XMEGA1;
79+ break;
997dccbb 80+
c66cb070 81+ case bfd_mach_avrxmega2:
82+ val = E_AVR_MACH_XMEGA2;
83+ break;
997dccbb 84+
c66cb070 85+ case bfd_mach_avrxmega3:
86+ val = E_AVR_MACH_XMEGA3;
997dccbb 87+ break;
c66cb070 88+
89+ case bfd_mach_avrxmega4:
90+ val = E_AVR_MACH_XMEGA4;
91+ break;
92+
93+ case bfd_mach_avrxmega5:
94+ val = E_AVR_MACH_XMEGA5;
95+ break;
96+
97+ case bfd_mach_avrxmega6:
98+ val = E_AVR_MACH_XMEGA6;
99+ break;
100+
101+ case bfd_mach_avrxmega7:
102+ val = E_AVR_MACH_XMEGA7;
103+ break;
104 }
997dccbb 105
c66cb070 106 elf_elfheader (abfd)->e_machine = EM_AVR;
8cbbe116 107@@ -1402,6 +1430,34 @@
c66cb070 108 case E_AVR_MACH_AVR6:
109 e_set = bfd_mach_avr6;
110 break;
111+
112+ case E_AVR_MACH_XMEGA1:
113+ e_set = bfd_mach_avrxmega1;
114+ break;
115+
116+ case E_AVR_MACH_XMEGA2:
117+ e_set = bfd_mach_avrxmega2;
118+ break;
119+
120+ case E_AVR_MACH_XMEGA3:
121+ e_set = bfd_mach_avrxmega3;
122+ break;
123+
124+ case E_AVR_MACH_XMEGA4:
125+ e_set = bfd_mach_avrxmega4;
126+ break;
127+
128+ case E_AVR_MACH_XMEGA5:
129+ e_set = bfd_mach_avrxmega5;
130+ break;
131+
132+ case E_AVR_MACH_XMEGA6:
133+ e_set = bfd_mach_avrxmega6;
134+ break;
135+
136+ case E_AVR_MACH_XMEGA7:
137+ e_set = bfd_mach_avrxmega7;
138+ break;
997dccbb 139 }
140 }
c66cb070 141 return bfd_default_set_arch_mach (abfd, bfd_arch_avr,
8cbbe116 142diff -uNdr binutils-2.21-orig.2/gas/config/tc-avr.c binutils-2.21/gas/config/tc-avr.c
143--- binutils-2.21-orig.2/gas/config/tc-avr.c 2010-06-28 16:06:57.000000000 +0200
144+++ binutils-2.21/gas/config/tc-avr.c 2011-06-17 18:29:41.000000000 +0200
997dccbb 145@@ -27,20 +27,21 @@
146
147 struct avr_opcodes_s
148 {
149- char * name;
150- char * constraints;
151- int insn_size; /* In words. */
152- int isa;
153+ char *name;
154+ char *constraints;
155+ char *opcode;
156+ int insn_size; /* In words. */
157+ int isa;
158 unsigned int bin_opcode;
159 };
160
161 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
162-{#NAME, CONSTR, SIZE, ISA, BIN},
163+{#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
164
165 struct avr_opcodes_s avr_opcodes[] =
166 {
167 #include "opcode/avr.h"
168- {NULL, NULL, 0, 0, 0}
169+ {NULL, NULL, NULL, 0, 0, 0}
170 };
171
172 const char comment_chars[] = ";";
c66cb070 173@@ -79,6 +80,13 @@
997dccbb 174 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
175 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
176 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
177+ {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
178+ {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
179+ {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
180+ {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
181+ {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
182+ {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
183+ {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
184 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
185 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
186 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
8cbbe116 187@@ -237,6 +245,21 @@
188 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
997dccbb 189 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
190 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
c66cb070 191+ {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
192+ {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
193+ {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
194+ {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
195+ {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
196+ {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
997dccbb 197+ {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
c66cb070 198+ {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
199+ {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
200+ {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
201+ {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
202+ {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
203+ {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
204+ {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
997dccbb 205+ {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
206 {NULL, 0, 0}
207 };
208
8cbbe116 209@@ -413,6 +436,11 @@
c66cb070 210 " avr5 - enhanced AVR core with up to 64K program memory\n"
211 " avr51 - enhanced AVR core with up to 128K program memory\n"
212 " avr6 - enhanced AVR core with up to 256K program memory\n"
213+ " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
214+ " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
215+ " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
216+ " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
217+ " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
218 " or immediate microcontroller name.\n"));
219 fprintf (stream,
220 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
8cbbe116 221@@ -840,7 +868,12 @@
997dccbb 222 if (*str == '+')
223 {
224 ++str;
225- op_mask |= 1;
226+ char *s;
227+ for (s = opcode->opcode; *s; ++s)
228+ {
229+ if (*s == '+')
230+ op_mask |= (1 << (15 - (s - opcode->opcode)));
231+ }
232 }
233
234 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
8cbbe116 235@@ -957,6 +990,16 @@
997dccbb 236 }
237 break;
238
239+ case 'E':
240+ {
241+ unsigned int x;
242+
243+ x = avr_get_constant (str, 15);
244+ str = input_line_pointer;
245+ op_mask |= (x << 4);
246+ }
247+ break;
248+
249 case '?':
250 break;
251
8cbbe116 252diff -uNdr binutils-2.21-orig.2/gas/doc/c-avr.texi binutils-2.21/gas/doc/c-avr.texi
253--- binutils-2.21-orig.2/gas/doc/c-avr.texi 2010-04-09 05:48:54.000000000 +0200
254+++ binutils-2.21/gas/doc/c-avr.texi 2011-06-17 18:29:41.000000000 +0200
255@@ -85,6 +85,27 @@
c66cb070 256 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types:
257 atmega2560, atmega2561).
258
259+Instruction set avrxmega2 is for the XMEGA AVR core with 8K to 64K program
260+memory space and less than 64K data space (MCU types: atxmega16a4, atxmega16d4,
261+atxmega32d4).
262+
263+Instruction set avrxmega3 is for the XMEGA AVR core with 8K to 64K program
264+memory space and greater than 64K data space (MCU types: atxmega32a4).
265+
266+Instruction set avrxmega4 is for the XMEGA AVR core with up to 64K program
267+memory space and less than 64K data space (MCU types: atxmega64a3, atxmega64d3).
268+
269+Instruction set avrxmega5 is for the XMEGA AVR core with up to 64K program
270+memory space and greater than 64K data space (MCU types: atxmega64a1).
271+
272+Instruction set avrxmega6 is for the XMEGA AVR core with up to 256K program
273+memory space and less than 64K data space (MCU types: atxmega128a3,
274+atxmega128d3, atxmega192a3, atxmega192d3, atxmega256a3, atxmega256a3b,
275+atxmega192d3).
276+
277+Instruction set avrxmega7 is for the XMEGA AVR core with up to 256K program
278+memory space and greater than 64K data space (MCU types: atxmega128a1).
279+
280 @cindex @code{-mall-opcodes} command line option, AVR
281 @item -mall-opcodes
282 Accept all AVR opcodes, even if not supported by @code{-mmcu}.
8cbbe116 283diff -uNdr binutils-2.21-orig.2/include/elf/avr.h binutils-2.21/include/elf/avr.h
284--- binutils-2.21-orig.2/include/elf/avr.h 2010-04-15 12:26:08.000000000 +0200
285+++ binutils-2.21/include/elf/avr.h 2011-06-17 18:29:41.000000000 +0200
c66cb070 286@@ -40,6 +40,13 @@
287 #define E_AVR_MACH_AVR5 5
288 #define E_AVR_MACH_AVR51 51
289 #define E_AVR_MACH_AVR6 6
290+#define E_AVR_MACH_XMEGA1 101
291+#define E_AVR_MACH_XMEGA2 102
292+#define E_AVR_MACH_XMEGA3 103
293+#define E_AVR_MACH_XMEGA4 104
294+#define E_AVR_MACH_XMEGA5 105
295+#define E_AVR_MACH_XMEGA6 106
296+#define E_AVR_MACH_XMEGA7 107
297
298 /* Relocations. */
299 START_RELOC_NUMBERS (elf_avr_reloc_type)
8cbbe116 300diff -uNdr binutils-2.21-orig.2/include/opcode/avr.h binutils-2.21/include/opcode/avr.h
301--- binutils-2.21-orig.2/include/opcode/avr.h 2010-04-15 12:26:09.000000000 +0200
302+++ binutils-2.21/include/opcode/avr.h 2011-06-17 18:29:41.000000000 +0200
303@@ -31,6 +31,8 @@
997dccbb 304 #define AVR_ISA_BRK 0x0400 /* device has BREAK (on-chip debug) */
305 #define AVR_ISA_EIND 0x0800 /* device has >128K program memory (none yet) */
306 #define AVR_ISA_MOVW 0x1000 /* device has MOVW */
307+#define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */
308+#define AVR_ISA_DES 0x4000 /* device has DES */
309
310 #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
c66cb070 311 #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
8cbbe116 312@@ -49,6 +51,8 @@
997dccbb 313 #define AVR_ISA_94K (AVR_ISA_M603 | AVR_ISA_MUL | AVR_ISA_MOVW | AVR_ISA_LPMX)
314 #define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK)
315 #define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX)
316+#define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND)
317+#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES)
318
c66cb070 319 #define AVR_ISA_AVR1 AVR_ISA_TINY1
320 #define AVR_ISA_AVR2 AVR_ISA_2xxx
8cbbe116 321@@ -109,6 +113,7 @@
997dccbb 322 L - signed pc relative offset from -2048 to 2047
323 h - absolute code address (call, jmp)
324 S - immediate value from 0 to 7 (S = s << 4)
325+ E - immediate value from 0 to 15, shifted left by 4 (des)
326 ? - use this opcode entry if no parameters, else use next opcode entry
327
328 Order is important - some binary opcodes have more than one name,
8cbbe116 329@@ -169,7 +174,8 @@
997dccbb 330 AVR_INSN (sleep,"", "1001010110001000", 1, AVR_ISA_1200, 0x9588)
331 AVR_INSN (break,"", "1001010110011000", 1, AVR_ISA_BRK, 0x9598)
332 AVR_INSN (wdr, "", "1001010110101000", 1, AVR_ISA_1200, 0x95a8)
333-AVR_INSN (spm, "", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
334+AVR_INSN (spm, "?", "1001010111101000", 1, AVR_ISA_SPM, 0x95e8)
335+AVR_INSN (spm, "z", "10010101111+1000", 1, AVR_ISA_SPMX, 0x95e8)
336
337 AVR_INSN (adc, "r,r", "000111rdddddrrrr", 1, AVR_ISA_1200, 0x1c00)
338 AVR_INSN (add, "r,r", "000011rdddddrrrr", 1, AVR_ISA_1200, 0x0c00)
8cbbe116 339@@ -283,3 +289,6 @@
997dccbb 340 AVR_INSN (eicall, "", "1001010100011001", 1, AVR_ISA_EIND, 0x9519)
341 AVR_INSN (eijmp, "", "1001010000011001", 1, AVR_ISA_EIND, 0x9419)
342
343+/* DES instruction for encryption and decryption */
344+AVR_INSN (des, "E", "10010100EEEE1011", 1, AVR_ISA_DES, 0x940B)
345+
8cbbe116 346diff -uNdr binutils-2.21-orig.2/ld/Makefile.am binutils-2.21/ld/Makefile.am
347--- binutils-2.21-orig.2/ld/Makefile.am 2010-11-03 04:22:01.000000000 +0100
348+++ binutils-2.21/ld/Makefile.am 2011-06-17 18:32:58.000000000 +0200
349@@ -162,6 +162,13 @@
350 eavr5.c \
351 eavr51.c \
352 eavr6.c \
997dccbb 353+ eavrxmega1.o \
354+ eavrxmega2.o \
355+ eavrxmega3.o \
356+ eavrxmega4.o \
357+ eavrxmega5.o \
358+ eavrxmega6.o \
359+ eavrxmega7.o \
8cbbe116 360 ecoff_i860.c \
361 ecoff_sparc.c \
362 eelf32_spu.c \
363@@ -760,6 +767,34 @@
997dccbb 364 $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
365 ${GEN_DEPENDS}
366 ${GENSCRIPTS} avr6 "$(tdir_avr2)"
367+eavrxmega1.c: $(srcdir)/emulparams/avrxmega1.sh \
368+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
369+ ${GEN_DEPENDS}
370+ ${GENSCRIPTS} avrxmega1 "$(tdir_avr2)"
371+eavrxmega2.c: $(srcdir)/emulparams/avrxmega2.sh \
372+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
373+ ${GEN_DEPENDS}
374+ ${GENSCRIPTS} avrxmega2 "$(tdir_avr2)"
375+eavrxmega3.c: $(srcdir)/emulparams/avrxmega3.sh \
376+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
377+ ${GEN_DEPENDS}
378+ ${GENSCRIPTS} avrxmega3 "$(tdir_avr2)"
379+eavrxmega4.c: $(srcdir)/emulparams/avrxmega4.sh \
380+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
381+ ${GEN_DEPENDS}
382+ ${GENSCRIPTS} avrxmega4 "$(tdir_avr2)"
383+eavrxmega5.c: $(srcdir)/emulparams/avrxmega5.sh \
384+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
385+ ${GEN_DEPENDS}
386+ ${GENSCRIPTS} avrxmega5 "$(tdir_avr2)"
387+eavrxmega6.c: $(srcdir)/emulparams/avrxmega6.sh \
388+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
389+ ${GEN_DEPENDS}
390+ ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)"
391+eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \
392+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
393+ ${GEN_DEPENDS}
394+ ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
395 ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
396 $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
397 ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
8cbbe116 398diff -uNdr binutils-2.21-orig.2/ld/Makefile.in binutils-2.21/ld/Makefile.in
399--- binutils-2.21-orig.2/ld/Makefile.in 2010-11-05 11:34:22.000000000 +0100
400+++ binutils-2.21/ld/Makefile.in 2011-06-17 18:33:50.000000000 +0200
401@@ -462,6 +462,13 @@
402 eavr5.c \
403 eavr51.c \
404 eavr6.c \
997dccbb 405+ eavrxmega1.o \
406+ eavrxmega2.o \
407+ eavrxmega3.o \
408+ eavrxmega4.o \
409+ eavrxmega5.o \
410+ eavrxmega6.o \
411+ eavrxmega7.o \
8cbbe116 412 ecoff_i860.c \
413 ecoff_sparc.c \
414 eelf32_spu.c \
415@@ -2183,6 +2190,34 @@
997dccbb 416 $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
417 ${GEN_DEPENDS}
418 ${GENSCRIPTS} avr6 "$(tdir_avr2)"
419+eavrxmega1.c: $(srcdir)/emulparams/avrxmega1.sh \
420+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
421+ ${GEN_DEPENDS}
422+ ${GENSCRIPTS} avrxmega1 "$(tdir_avr2)"
423+eavrxmega2.c: $(srcdir)/emulparams/avrxmega2.sh \
424+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
425+ ${GEN_DEPENDS}
426+ ${GENSCRIPTS} avrxmega2 "$(tdir_avr2)"
427+eavrxmega3.c: $(srcdir)/emulparams/avrxmega3.sh \
428+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
429+ ${GEN_DEPENDS}
430+ ${GENSCRIPTS} avrxmega3 "$(tdir_avr2)"
431+eavrxmega4.c: $(srcdir)/emulparams/avrxmega4.sh \
432+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
433+ ${GEN_DEPENDS}
434+ ${GENSCRIPTS} avrxmega4 "$(tdir_avr2)"
435+eavrxmega5.c: $(srcdir)/emulparams/avrxmega5.sh \
436+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
437+ ${GEN_DEPENDS}
438+ ${GENSCRIPTS} avrxmega5 "$(tdir_avr2)"
439+eavrxmega6.c: $(srcdir)/emulparams/avrxmega6.sh \
440+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
441+ ${GEN_DEPENDS}
442+ ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)"
443+eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \
444+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
445+ ${GEN_DEPENDS}
446+ ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
447 ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
448 $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
449 ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
8cbbe116 450diff -uNdr binutils-2.21-orig.2/ld/configure.tgt binutils-2.21/ld/configure.tgt
451--- binutils-2.21-orig.2/ld/configure.tgt 2010-12-01 12:03:47.000000000 +0100
452+++ binutils-2.21/ld/configure.tgt 2011-06-17 18:29:41.000000000 +0200
453@@ -111,7 +111,7 @@
997dccbb 454 xscale-*-elf) targ_emul=armelf
455 ;;
456 avr-*-*) targ_emul=avr2
457- targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6"
458+ targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega1 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7"
459 ;;
460 bfin-*-elf) targ_emul=elf32bfin;
461 targ_extra_emuls="elf32bfinfd"
8cbbe116 462diff -uNdr binutils-2.21-orig.2/ld/emulparams/avrxmega1.sh binutils-2.21/ld/emulparams/avrxmega1.sh
463--- binutils-2.21-orig.2/ld/emulparams/avrxmega1.sh 1970-01-01 01:00:00.000000000 +0100
464+++ binutils-2.21/ld/emulparams/avrxmega1.sh 2011-06-17 18:29:41.000000000 +0200
997dccbb 465@@ -0,0 +1,12 @@
466+ARCH=avr:101
467+MACHINE=
468+SCRIPT_NAME=avr
469+OUTPUT_FORMAT="elf32-avr"
470+MAXPAGESIZE=1
471+EMBEDDED=yes
472+TEMPLATE_NAME=elf32
473+
474+TEXT_LENGTH=1024K
475+DATA_ORIGIN=0x802000
476+DATA_LENGTH=0xffa0
477+EXTRA_EM_FILE=avrelf
8cbbe116 478diff -uNdr binutils-2.21-orig.2/ld/emulparams/avrxmega2.sh binutils-2.21/ld/emulparams/avrxmega2.sh
479--- binutils-2.21-orig.2/ld/emulparams/avrxmega2.sh 1970-01-01 01:00:00.000000000 +0100
480+++ binutils-2.21/ld/emulparams/avrxmega2.sh 2011-06-17 18:29:41.000000000 +0200
997dccbb 481@@ -0,0 +1,12 @@
482+ARCH=avr:102
483+MACHINE=
484+SCRIPT_NAME=avr
485+OUTPUT_FORMAT="elf32-avr"
486+MAXPAGESIZE=1
487+EMBEDDED=yes
488+TEMPLATE_NAME=elf32
489+
490+TEXT_LENGTH=1024K
491+DATA_ORIGIN=0x802000
492+DATA_LENGTH=0xffa0
493+EXTRA_EM_FILE=avrelf
8cbbe116 494diff -uNdr binutils-2.21-orig.2/ld/emulparams/avrxmega3.sh binutils-2.21/ld/emulparams/avrxmega3.sh
495--- binutils-2.21-orig.2/ld/emulparams/avrxmega3.sh 1970-01-01 01:00:00.000000000 +0100
496+++ binutils-2.21/ld/emulparams/avrxmega3.sh 2011-06-17 18:29:41.000000000 +0200
997dccbb 497@@ -0,0 +1,12 @@
498+ARCH=avr:103
499+MACHINE=
500+SCRIPT_NAME=avr
501+OUTPUT_FORMAT="elf32-avr"
502+MAXPAGESIZE=1
503+EMBEDDED=yes
504+TEMPLATE_NAME=elf32
505+
506+TEXT_LENGTH=1024K
507+DATA_ORIGIN=0x802000
508+DATA_LENGTH=0xffa0
509+EXTRA_EM_FILE=avrelf
8cbbe116 510diff -uNdr binutils-2.21-orig.2/ld/emulparams/avrxmega4.sh binutils-2.21/ld/emulparams/avrxmega4.sh
511--- binutils-2.21-orig.2/ld/emulparams/avrxmega4.sh 1970-01-01 01:00:00.000000000 +0100
512+++ binutils-2.21/ld/emulparams/avrxmega4.sh 2011-06-17 18:29:41.000000000 +0200
997dccbb 513@@ -0,0 +1,12 @@
514+ARCH=avr:104
515+MACHINE=
516+SCRIPT_NAME=avr
517+OUTPUT_FORMAT="elf32-avr"
518+MAXPAGESIZE=1
519+EMBEDDED=yes
520+TEMPLATE_NAME=elf32
521+
522+TEXT_LENGTH=1024K
523+DATA_ORIGIN=0x802000
524+DATA_LENGTH=0xffa0
525+EXTRA_EM_FILE=avrelf
8cbbe116 526diff -uNdr binutils-2.21-orig.2/ld/emulparams/avrxmega5.sh binutils-2.21/ld/emulparams/avrxmega5.sh
527--- binutils-2.21-orig.2/ld/emulparams/avrxmega5.sh 1970-01-01 01:00:00.000000000 +0100
528+++ binutils-2.21/ld/emulparams/avrxmega5.sh 2011-06-17 18:29:41.000000000 +0200
997dccbb 529@@ -0,0 +1,12 @@
530+ARCH=avr:105
531+MACHINE=
532+SCRIPT_NAME=avr
533+OUTPUT_FORMAT="elf32-avr"
534+MAXPAGESIZE=1
535+EMBEDDED=yes
536+TEMPLATE_NAME=elf32
537+
538+TEXT_LENGTH=1024K
539+DATA_ORIGIN=0x802000
540+DATA_LENGTH=0xffa0
541+EXTRA_EM_FILE=avrelf
8cbbe116 542diff -uNdr binutils-2.21-orig.2/ld/emulparams/avrxmega6.sh binutils-2.21/ld/emulparams/avrxmega6.sh
543--- binutils-2.21-orig.2/ld/emulparams/avrxmega6.sh 1970-01-01 01:00:00.000000000 +0100
544+++ binutils-2.21/ld/emulparams/avrxmega6.sh 2011-06-17 18:29:41.000000000 +0200
997dccbb 545@@ -0,0 +1,12 @@
546+ARCH=avr:106
547+MACHINE=
548+SCRIPT_NAME=avr
549+OUTPUT_FORMAT="elf32-avr"
550+MAXPAGESIZE=1
551+EMBEDDED=yes
552+TEMPLATE_NAME=elf32
553+
554+TEXT_LENGTH=1024K
555+DATA_ORIGIN=0x802000
556+DATA_LENGTH=0xffa0
557+EXTRA_EM_FILE=avrelf
8cbbe116 558diff -uNdr binutils-2.21-orig.2/ld/emulparams/avrxmega7.sh binutils-2.21/ld/emulparams/avrxmega7.sh
559--- binutils-2.21-orig.2/ld/emulparams/avrxmega7.sh 1970-01-01 01:00:00.000000000 +0100
560+++ binutils-2.21/ld/emulparams/avrxmega7.sh 2011-06-17 18:29:41.000000000 +0200
997dccbb 561@@ -0,0 +1,12 @@
562+ARCH=avr:107
563+MACHINE=
564+SCRIPT_NAME=avr
565+OUTPUT_FORMAT="elf32-avr"
566+MAXPAGESIZE=1
567+EMBEDDED=yes
568+TEMPLATE_NAME=elf32
569+
570+TEXT_LENGTH=1024K
571+DATA_ORIGIN=0x802000
572+DATA_LENGTH=0xffa0
573+EXTRA_EM_FILE=avrelf
8cbbe116 574diff -uNdr binutils-2.21-orig.2/ld/emultempl/avrelf.em binutils-2.21/ld/emultempl/avrelf.em
575--- binutils-2.21-orig.2/ld/emultempl/avrelf.em 2009-11-26 14:45:25.000000000 +0100
576+++ binutils-2.21/ld/emultempl/avrelf.em 2011-06-17 18:29:41.000000000 +0200
c66cb070 577@@ -71,8 +71,10 @@
578
579 gld${EMULATION_NAME}_before_allocation ();
580
581- /* We only need stubs for the avr6 family. */
582- if (strcmp ("${EMULATION_NAME}","avr6"))
583+ /* We only need stubs for avr6, avrxmega6, and avrxmega7. */
584+ if (strcmp ("${EMULATION_NAME}","avr6")
585+ && strcmp ("${EMULATION_NAME}","avrxmega6")
586+ && strcmp ("${EMULATION_NAME}","avrxmega7") )
587 avr_no_stubs = TRUE;
588
589 avr_elf_set_global_bfd_parameters ();
8cbbe116 590diff -uNdr binutils-2.21-orig.2/opcodes/avr-dis.c binutils-2.21/opcodes/avr-dis.c
591--- binutils-2.21-orig.2/opcodes/avr-dis.c 2008-11-06 13:03:24.000000000 +0100
592+++ binutils-2.21/opcodes/avr-dis.c 2011-06-17 18:29:41.000000000 +0200
c66cb070 593@@ -50,7 +50,7 @@
594
595 static int
596 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
597- char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
598+ char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
599 {
600 int ok = 1;
601 *sym = 0;
602@@ -118,8 +118,18 @@
603
604 case 'z':
605 *buf++ = 'Z';
606- if (insn & 0x1)
607- *buf++ = '+';
997dccbb 608+
c66cb070 609+ /* Check for post-increment. */
610+ char *s;
611+ for (s = opcode_str; *s; ++s)
612+ {
613+ if (*s == '+')
614+ {
615+ *buf++ = '+';
616+ break;
617+ }
618+ }
997dccbb 619+
c66cb070 620 *buf = '\0';
621 if (AVR_UNDEF_P (insn))
622 sprintf (comment, _("undefined"));
623@@ -226,6 +236,10 @@
624 sprintf (comment, "%d", x);
625 }
626 break;
997dccbb 627+
c66cb070 628+ case 'E':
629+ sprintf (buf, "%d", (insn >> 4) & 15);
997dccbb 630+ break;
c66cb070 631
632 case '?':
633 *buf = '\0';
634@@ -331,7 +345,8 @@
997dccbb 635
c66cb070 636 if (opcode->name)
637 {
638- char *op = opcode->constraints;
639+ char *constraints = opcode->constraints;
640+ char *opcode_str = opcode->opcode;
641
642 insn2 = 0;
643 ok = 1;
644@@ -342,14 +357,14 @@
645 cmd_len = 4;
646 }
647
648- if (*op && *op != '?')
649+ if (*constraints && *constraints != '?')
650 {
651- int regs = REGISTER_P (*op);
652+ int regs = REGISTER_P (*constraints);
653
654- ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
655+ ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1);
656
657- if (ok && *(++op) == ',')
658- ok = avr_operand (insn, insn2, addr, *(++op), op2,
659+ if (ok && *(++constraints) == ',')
660+ ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2,
661 *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
997dccbb 662 }
663 }
Cross AVR GNU binary utility development utilities - binutils
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