projects / packages / crossavr-binutils.git / blame
| Commit | Line | Data |
|---|---|---|
| 31ce1ede JR |
1 | diff -Naurp include/opcode/avr.h include/opcode/avr.h |
| 2 | --- include/opcode/avr.h 2012-12-17 19:28:09.000000000 +0530 | |
| 3 | +++ include/opcode/avr.h 2012-12-17 19:28:38.000000000 +0530 | |
| 4 | @@ -34,7 +34,7 @@ | |
| 5 | #define AVR_ISA_MOVW 0x1000 /* device has MOVW */ | |
| 6 | #define AVR_ISA_SPMX 0x2000 /* device has SPM Z[+] */ | |
| 7 | #define AVR_ISA_DES 0x4000 /* device has DES */ | |
| 8 | -#define AVR_ISA_XCH 0x8000 /* device has XCH, LAC, LAS, LAT */ | |
| 9 | +#define AVR_ISA_RMW 0x8000 /* device has RMW instructions XCH,LAC,LAS,LAT */ | |
| 10 | ||
| 11 | #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM) | |
| 12 | #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM) | |
| 13 | @@ -55,7 +55,8 @@ | |
| 14 | #define AVR_ISA_M323 (AVR_ISA_M161 | AVR_ISA_BRK) | |
| 15 | #define AVR_ISA_M128 (AVR_ISA_M323 | AVR_ISA_ELPM | AVR_ISA_ELPMX) | |
| 16 | #define AVR_ISA_M256 (AVR_ISA_M128 | AVR_ISA_EIND) | |
| 17 | -#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES | AVR_ISA_XCH) | |
| 18 | +#define AVR_ISA_XMEGA (AVR_ISA_M256 | AVR_ISA_SPMX | AVR_ISA_DES) | |
| 19 | +#define AVR_ISA_XMEGAU (AVR_ISA_XMEGA | AVR_ISA_RMW) | |
| 20 | ||
| 21 | #define AVR_ISA_AVR1 AVR_ISA_TINY1 | |
| 22 | #define AVR_ISA_AVR2 AVR_ISA_2xxx | |
| 23 | @@ -272,10 +273,10 @@ AVR_INSN (ror, "r", "1001010rrrrr0111 | |
| 24 | AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402) | |
| 25 | ||
| 26 | /* Atomic memory operations for XMEGA. List before `sts'. */ | |
| 27 | -AVR_INSN (xch, "z,r", "1001001rrrrr0100", 1, AVR_ISA_XCH, 0x9204) | |
| 28 | -AVR_INSN (las, "z,r", "1001001rrrrr0101", 1, AVR_ISA_XCH, 0x9205) | |
| 29 | -AVR_INSN (lac, "z,r", "1001001rrrrr0110", 1, AVR_ISA_XCH, 0x9206) | |
| 30 | -AVR_INSN (lat, "z,r", "1001001rrrrr0111", 1, AVR_ISA_XCH, 0x9207) | |
| 31 | +AVR_INSN (xch, "z,r", "1001001rrrrr0100", 1, AVR_ISA_RMW, 0x9204) | |
| 32 | +AVR_INSN (las, "z,r", "1001001rrrrr0101", 1, AVR_ISA_RMW, 0x9205) | |
| 33 | +AVR_INSN (lac, "z,r", "1001001rrrrr0110", 1, AVR_ISA_RMW, 0x9206) | |
| 34 | +AVR_INSN (lat, "z,r", "1001001rrrrr0111", 1, AVR_ISA_RMW, 0x9207) | |
| 35 | ||
| 36 | /* Known to be decoded as `nop' by the old core. */ | |
| 37 | AVR_INSN (movw, "v,v", "00000001ddddrrrr", 1, AVR_ISA_MOVW, 0x0100) |