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- release 2 (x32 rebuild)
[packages/crossavr-binutils.git] / 002-tinycore-support.patch
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31ce1ede
JR		 1diff -Naurp bfd/archures.c bfd/archures.c
2--- bfd/archures.c 2012-09-04 18:23:41.000000000 +0530
3+++ bfd/archures.c 2012-12-21 14:14:42.000000000 +0530
4@@ -391,6 +391,7 @@ DESCRIPTION
5 .#define bfd_mach_avr5 5
6 .#define bfd_mach_avr51 51
7 .#define bfd_mach_avr6 6
8+.#define bfd_mach_avrtiny 90
9 .#define bfd_mach_avrxmega1 101
10 .#define bfd_mach_avrxmega2 102
11 .#define bfd_mach_avrxmega3 103
12diff -Naurp bfd/cpu-avr.c bfd/cpu-avr.c
13--- bfd/cpu-avr.c 2012-01-31 23:24:35.000000000 +0530
14+++ bfd/cpu-avr.c 2012-12-21 14:14:42.000000000 +0530
15@@ -135,24 +135,27 @@ static const bfd_arch_info_type arch_inf
16
17 /* 3-Byte PC. */
18 N (22, bfd_mach_avr6, "avr:6", FALSE, & arch_info_struct[10]),
19-
20+
21+ /* Tiny core (ATTiny10 & similar) */
22+ N (16, bfd_mach_avrtiny, "avr:90", FALSE, & arch_info_struct[11]),
23+
24 /* Xmega 1 */
25- N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[11]),
26+ N (24, bfd_mach_avrxmega1, "avr:101", FALSE, & arch_info_struct[12]),
27
28 /* Xmega 2 */
29- N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[12]),
30+ N (24, bfd_mach_avrxmega2, "avr:102", FALSE, & arch_info_struct[13]),
31
32 /* Xmega 3 */
33- N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[13]),
34+ N (24, bfd_mach_avrxmega3, "avr:103", FALSE, & arch_info_struct[14]),
35
36 /* Xmega 4 */
37- N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[14]),
38+ N (24, bfd_mach_avrxmega4, "avr:104", FALSE, & arch_info_struct[15]),
39
40 /* Xmega 5 */
41- N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[15]),
42+ N (24, bfd_mach_avrxmega5, "avr:105", FALSE, & arch_info_struct[16]),
43
44 /* Xmega 6 */
45- N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[16]),
46+ N (24, bfd_mach_avrxmega6, "avr:106", FALSE, & arch_info_struct[17]),
47
48 /* Xmega 7 */
49 N (24, bfd_mach_avrxmega7, "avr:107", FALSE, NULL)
50diff -Naurp bfd/elf32-avr.c bfd/elf32-avr.c
51--- bfd/elf32-avr.c 2012-07-25 03:14:44.000000000 +0530
52+++ bfd/elf32-avr.c 2012-12-21 14:14:42.000000000 +0530
53@@ -559,6 +559,20 @@ static reloc_howto_type elf_avr_howto_ta
54 0xffffff, /* src_mask */
55 0xffffff, /* dst_mask */
56 FALSE), /* pcrel_offset */
57+ /* 7 bit immediate for LDS/STS in Tiny core */
58+ HOWTO (R_AVR_7_LDS16, /* type */
59+ 0, /* rightshift */
60+ 1, /* size (0 = byte, 1 = short, 2 = long) */
61+ 7, /* bitsize */
62+ FALSE, /* pc_relative */
63+ 0, /* bitpos */
64+ complain_overflow_dont,/* complain_on_overflow */
65+ bfd_elf_generic_reloc, /* special_function */
66+ "R_AVR_7_LDS16", /* name */
67+ FALSE, /* partial_inplace */
68+ 0xffff, /* src_mask */
69+ 0xffff, /* dst_mask */
70+ FALSE), /* pcrel_offset */
71 };
72
73 /* Map BFD reloc types to AVR ELF reloc types. */
74@@ -600,7 +614,8 @@ static const struct avr_reloc_map avr_re
75 { BFD_RELOC_8, R_AVR_8 },
76 { BFD_RELOC_AVR_8_LO, R_AVR_8_LO8 },
77 { BFD_RELOC_AVR_8_HI, R_AVR_8_HI8 },
78- { BFD_RELOC_AVR_8_HLO, R_AVR_8_HLO8 }
79+ { BFD_RELOC_AVR_8_HLO, R_AVR_8_HLO8 },
80+ { BFD_RELOC_AVR_7_LDS16, R_AVR_7_LDS16 }
81 };
82
83 /* Meant to be filled one day with the wrap around address for the
84@@ -1131,6 +1146,17 @@ avr_final_link_relocate (reloc_howto_typ
85 bfd_put_16 (input_bfd, (bfd_vma) srel & 0xffff, contents+2);
86 break;
87
88+ case R_AVR_7_LDS16:
89+ contents += rel->r_offset;
90+ srel = (bfd_signed_vma) relocation + rel->r_addend;
91+ if ((srel & 0xFFFF) < 0x40 || (srel & 0xFFFF) > 0xbf)
92+ return bfd_reloc_outofrange;
93+ srel = srel & 0x7f;
94+ x = bfd_get_16 (input_bfd, contents);
95+ x |= (srel & 0x0f) | ((srel & 0x30) << 5) | ((srel & 0x40) << 2);
96+ bfd_put_16 (input_bfd, x, contents);
97+ break;
98+
99 case R_AVR_16_PM:
100 use_stubs = (!htab->no_stubs);
101 contents += rel->r_offset;
102@@ -1372,6 +1398,10 @@ bfd_elf_avr_final_write_processing (bfd
103 case bfd_mach_avrxmega7:
104 val = E_AVR_MACH_XMEGA7;
105 break;
106+
107+ case bfd_mach_avrtiny:
108+ val = E_AVR_MACH_AVRTINY;
109+ break;
110 }
111
112 elf_elfheader (abfd)->e_machine = EM_AVR;
113@@ -1462,6 +1492,10 @@ elf32_avr_object_p (bfd *abfd)
114 case E_AVR_MACH_XMEGA7:
115 e_set = bfd_mach_avrxmega7;
116 break;
117+
118+ case E_AVR_MACH_AVRTINY:
119+ e_set = bfd_mach_avrtiny;
120+ break;
121 }
122 }
123 return bfd_default_set_arch_mach (abfd, bfd_arch_avr,
124diff -Naurp bfd/reloc.c bfd/reloc.c
125--- bfd/reloc.c 2012-09-04 18:23:42.000000000 +0530
126+++ bfd/reloc.c 2012-12-21 14:14:42.000000000 +0530
127@@ -4409,6 +4409,11 @@ ENUM
128 ENUMDOC
129 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
130 in .byte hlo8(symbol)
131+ENUM
132+ BFD_RELOC_AVR_7_LDS16
133+ENUMDOC
134+ This is a 7 bit reloc for the AVR that stores offset for 16bit sts/lds
135+ instructions supported only by Tiny core
136
137 ENUM
138 BFD_RELOC_RL78_NEG8
139diff -Naurp gas/config/tc-avr.c gas/config/tc-avr.c
140--- gas/config/tc-avr.c 2012-06-11 19:56:41.000000000 +0530
141+++ gas/config/tc-avr.c 2012-12-21 14:14:42.000000000 +0530
142@@ -89,6 +89,7 @@ static struct mcu_type_s mcu_types[] =
143 {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
144 {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
145 {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
146+ {"avrtiny", AVR_ISA_AVRTINY, bfd_mach_avrtiny},
147 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
148 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
149 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
150@@ -274,6 +275,12 @@ static struct mcu_type_s mcu_types[] =
151 {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
152 {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
153 {"atxmega128a1u", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
154+ {"attiny4", AVR_ISA_AVRTINY, bfd_mach_avrtiny},
155+ {"attiny5", AVR_ISA_AVRTINY, bfd_mach_avrtiny},
156+ {"attiny9", AVR_ISA_AVRTINY, bfd_mach_avrtiny},
157+ {"attiny10", AVR_ISA_AVRTINY, bfd_mach_avrtiny},
158+ {"attiny20", AVR_ISA_AVRTINY, bfd_mach_avrtiny},
159+ {"attiny40", AVR_ISA_AVRTINY, bfd_mach_avrtiny},
160 {NULL, 0, 0}
161 };
162
163@@ -455,6 +462,7 @@ md_show_usage (FILE *stream)
164 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
165 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
166 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
167+ " avrtiny - AVR Tiny core\n"
168 " or immediate microcontroller name.\n"));
169 fprintf (stream,
170 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
171@@ -803,6 +811,12 @@ avr_operand (struct avr_opcodes_s *opcod
172 str = input_line_pointer;
173 }
174
175+ if (avr_mcu->mach == bfd_mach_avrtiny)
176+ {
177+ if (op_mask < 16 || op_mask > 31)
178+ as_bad (_("register not supported"));
179+ }
180+
181 if (op_mask <= 31)
182 {
183 switch (*op)
184@@ -941,6 +955,12 @@ avr_operand (struct avr_opcodes_s *opcod
185 &op_expr, FALSE, BFD_RELOC_16);
186 break;
187
188+ case 'j':
189+ str = parse_exp (str, &op_expr);
190+ fix_new_exp (frag_now, where, opcode->insn_size * 2,
191+ &op_expr, FALSE, BFD_RELOC_AVR_7_LDS16);
192+ break;
193+
194 case 'M':
195 {
196 bfd_reloc_code_real_type r_type;
197@@ -1249,6 +1269,17 @@ md_apply_fix (fixS *fixP, valueT * valP,
198 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
199 break;
200
201+ case BFD_RELOC_AVR_7_LDS16:
202+ if ((value < 0x40) || (value > 0xBF))
203+ as_warn_where (fixP->fx_file, fixP->fx_line,
204+ _("operand out of range: 0x%lx"),
205+ (unsigned long)value);
206+ insn |= value & 0xF;
207+ insn |= (value & 0x30) << 5;
208+ insn |= (value & 0x40) << 2;
209+ bfd_putl16 ((bfd_vma) insn, where);
210+ break;
211+
212 case BFD_RELOC_AVR_6:
213 if ((value > 63) || (value < 0))
214 as_bad_where (fixP->fx_file, fixP->fx_line,
215@@ -1448,6 +1479,28 @@ md_assemble (char *str)
216
217 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
218
219+ if (opcode && !avr_opt.all_opcodes)
220+ {
221+ /* Check if the instruction's ISA bit is ON in the ISA bits of the part
222+ specified by the user. If not look for other instructions specifica-
223+ -tions with same mnemonic who's ISA bits matches.
224+
225+ This requires include/opcode/avr.h to have the instructions with
226+ same mnenomic to be specified in sequence. */
227+
228+ while ((opcode->isa & avr_mcu->isa) != opcode->isa)
229+ {
230+ opcode++;
231+
232+ if (opcode->name && strcmp(op, opcode->name))
233+ {
234+ as_bad (_("illegal opcode %s for mcu %s"),
235+ opcode->name, avr_mcu->name);
236+ return;
237+ }
238+ }
239+ }
240+
241 if (opcode == NULL)
242 {
243 as_bad (_("unknown opcode `%s'"), op);
244@@ -1460,9 +1513,6 @@ md_assemble (char *str)
245 if (*str && *opcode->constraints == '?')
246 ++opcode;
247
248- if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
249- as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
250-
251 dwarf2_emit_insn (0);
252
253 /* We used to set input_line_pointer to the result of get_operands,
254diff -Naurp include/elf/avr.h include/elf/avr.h
255--- include/elf/avr.h 2012-05-16 20:22:16.000000000 +0530
256+++ include/elf/avr.h 2012-12-21 14:14:42.000000000 +0530
257@@ -41,13 +41,14 @@
258 #define E_AVR_MACH_AVR5 5
259 #define E_AVR_MACH_AVR51 51
260 #define E_AVR_MACH_AVR6 6
261-#define E_AVR_MACH_XMEGA1 101
262-#define E_AVR_MACH_XMEGA2 102
263-#define E_AVR_MACH_XMEGA3 103
264-#define E_AVR_MACH_XMEGA4 104
265-#define E_AVR_MACH_XMEGA5 105
266-#define E_AVR_MACH_XMEGA6 106
267-#define E_AVR_MACH_XMEGA7 107
268+#define E_AVR_MACH_AVRTINY 90
269+#define E_AVR_MACH_XMEGA1 101
270+#define E_AVR_MACH_XMEGA2 102
271+#define E_AVR_MACH_XMEGA3 103
272+#define E_AVR_MACH_XMEGA4 104
273+#define E_AVR_MACH_XMEGA5 105
274+#define E_AVR_MACH_XMEGA6 106
275+#define E_AVR_MACH_XMEGA7 107
276
277 /* Relocations. */
278 START_RELOC_NUMBERS (elf_avr_reloc_type)
279@@ -81,6 +82,7 @@ START_RELOC_NUMBERS (elf_avr_reloc_type)
280 RELOC_NUMBER (R_AVR_8_LO8, 27)
281 RELOC_NUMBER (R_AVR_8_HI8, 28)
282 RELOC_NUMBER (R_AVR_8_HLO8, 29)
283+ RELOC_NUMBER (R_AVR_7_LDS16, 30)
284 END_RELOC_NUMBERS (R_AVR_max)
285
286 #endif /* _ELF_AVR_H */
287diff -Naurp include/opcode/avr.h include/opcode/avr.h
288--- include/opcode/avr.h 2012-06-07 22:13:36.000000000 +0530
289+++ include/opcode/avr.h 2012-12-21 14:14:42.000000000 +0530
290@@ -22,6 +22,7 @@
291 #define AVR_ISA_LPM 0x0002 /* device has LPM */
292 #define AVR_ISA_LPMX 0x0004 /* device has LPM Rd,Z[+] */
293 #define AVR_ISA_SRAM 0x0008 /* device has SRAM (LD, ST, PUSH, POP, ...) */
294+#define AVR_ISA_TINY 0x0010 /* device has Tiny core specific encodings */
295 #define AVR_ISA_MEGA 0x0020 /* device has >8K program memory (JMP and CALL
296 supported, no 8K wrap on RJMP and RCALL) */
297 #define AVR_ISA_MUL 0x0040 /* device has new core (MUL, FMUL, ...) */
298@@ -37,6 +38,7 @@
299
300 #define AVR_ISA_TINY1 (AVR_ISA_1200 | AVR_ISA_LPM)
301 #define AVR_ISA_2xxx (AVR_ISA_TINY1 | AVR_ISA_SRAM)
302+#define AVR_ISA_2xxxa (AVR_ISA_1200 | AVR_ISA_SRAM)
303 /* For the attiny26 which is missing LPM Rd,Z+. */
304 #define AVR_ISA_2xxe (AVR_ISA_2xxx | AVR_ISA_LPMX)
305 #define AVR_ISA_RF401 (AVR_ISA_2xxx | AVR_ISA_MOVW | AVR_ISA_LPMX)
306@@ -71,6 +73,9 @@
307 AVR_ISA_ELPM | AVR_ISA_ELPMX | AVR_ISA_SPM | \
308 AVR_ISA_BRK | AVR_ISA_EIND | AVR_ISA_MOVW)
309
310+#define AVR_ISA_AVRTINY (AVR_ISA_1200 | AVR_ISA_BRK | AVR_ISA_SRAM | \
311+ AVR_ISA_TINY)
312+
313 #define REGISTER_P(x) ((x) == 'r' \
314 || (x) == 'd' \
315 || (x) == 'w' \
316@@ -109,6 +114,7 @@
317 p - Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
318 K - immediate value from 0 to 63 (used in `adiw', `sbiw')
319 i - immediate value
320+ j - 7 bit immediate value from 0x40 to 0xBF (for 16-bit 'lds'/'sts')
321 l - signed pc relative offset from -64 to 63
322 L - signed pc relative offset from -2048 to 2047
323 h - absolute code address (call, jmp)
324@@ -159,8 +165,8 @@ AVR_INSN (sez, "", "1001010000011000
325 AVR_INSN (bclr, "S", "100101001SSS1000", 1, AVR_ISA_1200, 0x9488)
326 AVR_INSN (bset, "S", "100101000SSS1000", 1, AVR_ISA_1200, 0x9408)
327
328-AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxx, 0x9509)
329-AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxx, 0x9409)
330+AVR_INSN (icall,"", "1001010100001001", 1, AVR_ISA_2xxxa,0x9509)
331+AVR_INSN (ijmp, "", "1001010000001001", 1, AVR_ISA_2xxxa,0x9409)
332
333 AVR_INSN (lpm, "?", "1001010111001000", 1, AVR_ISA_TINY1,0x95c8)
334 AVR_INSN (lpm, "r,z", "1001000ddddd010+", 1, AVR_ISA_LPMX, 0x9004)
335@@ -260,8 +266,8 @@ AVR_INSN (dec, "r", "1001010rrrrr1010
336 AVR_INSN (inc, "r", "1001010rrrrr0011", 1, AVR_ISA_1200, 0x9403)
337 AVR_INSN (lsr, "r", "1001010rrrrr0110", 1, AVR_ISA_1200, 0x9406)
338 AVR_INSN (neg, "r", "1001010rrrrr0001", 1, AVR_ISA_1200, 0x9401)
339-AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxx, 0x900f)
340-AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxx, 0x920f)
341+AVR_INSN (pop, "r", "1001000rrrrr1111", 1, AVR_ISA_2xxxa,0x900f)
342+AVR_INSN (push, "r", "1001001rrrrr1111", 1, AVR_ISA_2xxxa,0x920f)
343 AVR_INSN (ror, "r", "1001010rrrrr0111", 1, AVR_ISA_1200, 0x9407)
344 AVR_INSN (swap, "r", "1001010rrrrr0010", 1, AVR_ISA_1200, 0x9402)
345
346@@ -279,8 +285,10 @@ AVR_INSN (fmul, "a,a", "000000110ddd1rrr
347 AVR_INSN (fmuls,"a,a", "000000111ddd0rrr", 1, AVR_ISA_MUL, 0x0380)
348 AVR_INSN (fmulsu,"a,a","000000111ddd1rrr", 1, AVR_ISA_MUL, 0x0388)
349
350-AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
351-AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
352+AVR_INSN (sts, "j,d", "10101kkkddddkkkk", 1, AVR_ISA_TINY, 0xA800)
353+AVR_INSN (sts, "i,r", "1001001ddddd0000", 2, AVR_ISA_2xxx, 0x9200)
354+AVR_INSN (lds, "d,j", "10100kkkddddkkkk", 1, AVR_ISA_TINY, 0xA000)
355+AVR_INSN (lds, "r,i", "1001000ddddd0000", 2, AVR_ISA_2xxx, 0x9000)
356
357 /* Special case for b+0, `e' must be next entry after `b',
358 b={Y=1,Z=0}, ee={X=11,Y=10,Z=00}, !=1 if -e or e+ or X. */
359diff -Naurp ld/configure.tgt ld/configure.tgt
360--- ld/configure.tgt 2012-09-04 18:23:47.000000000 +0530
361+++ ld/configure.tgt 2012-12-21 14:14:42.000000000 +0530
362@@ -118,7 +118,7 @@ arm*-*-uclinux*) targ_emul=armelf_linux
363 arm-*-vxworks) targ_emul=armelf_vxworks ;;
364 arm*-*-conix*) targ_emul=armelf ;;
365 avr-*-*) targ_emul=avr2
366- targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega1 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7"
367+ targ_extra_emuls="avr1 avr25 avr3 avr31 avr35 avr4 avr5 avr51 avr6 avrxmega1 avrxmega2 avrxmega3 avrxmega4 avrxmega5 avrxmega6 avrxmega7 avrtiny"
368 ;;
369 bfin-*-elf) targ_emul=elf32bfin;
370 targ_extra_emuls="elf32bfinfd"
371diff -Naurp ld/emulparams/avrtiny.sh ld/emulparams/avrtiny.sh
372--- ld/emulparams/avrtiny.sh 1970-01-01 05:30:00.000000000 +0530
373+++ ld/emulparams/avrtiny.sh 2012-12-21 14:14:42.000000000 +0530
374@@ -0,0 +1,13 @@
375+ARCH=avr:90
376+MACHINE=
377+SCRIPT_NAME=avrtiny
378+OUTPUT_FORMAT="elf32-avr"
379+MAXPAGESIZE=1
380+EMBEDDED=yes
381+TEMPLATE_NAME=elf32
382+
383+TEXT_ORIGIN=0x0
384+TEXT_LENGTH=4K
385+DATA_ORIGIN=0x0800040
386+DATA_LENGTH=0x100
387+EXTRA_EM_FILE=avrelf
388diff -Naurp ld/Makefile.am ld/Makefile.am
389--- ld/Makefile.am 2012-12-21 14:15:39.000000000 +0530
390+++ ld/Makefile.am 2012-12-21 14:14:42.000000000 +0530
391@@ -172,6 +172,7 @@ ALL_EMULATION_SOURCES = \
392 eavrxmega5.c \
393 eavrxmega6.c \
394 eavrxmega7.c \
395+ eavrtiny.c \
396 ecoff_i860.c \
397 ecoff_sparc.c \
398 ecrisaout.c \
399@@ -844,9 +845,13 @@ eavrxmega6.c: $(srcdir)/emulparams/avrxm
400 ${GEN_DEPENDS}
401 ${GENSCRIPTS} avrxmega6 "$(tdir_avr2)"
402 eavrxmega7.c: $(srcdir)/emulparams/avrxmega7.sh \
403- $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
404+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avrtiny.sc \
405 ${GEN_DEPENDS}
406 ${GENSCRIPTS} avrxmega7 "$(tdir_avr2)"
407+eavrtiny.c: $(srcdir)/emulparams/avrtiny.sh \
408+ $(srcdir)/emultempl/avrelf.em $(ELF_DEPS) $(srcdir)/scripttempl/avr.sc \
409+ ${GEN_DEPENDS}
410+ ${GENSCRIPTS} avrtiny "$(tdir_avr2)"
411 ecoff_i860.c: $(srcdir)/emulparams/coff_i860.sh \
412 $(srcdir)/emultempl/generic.em $(srcdir)/scripttempl/i860coff.sc ${GEN_DEPENDS}
413 ${GENSCRIPTS} coff_i860 "$(tdir_coff_i860)"
414diff -Naurp ld/scripttempl/avrtiny.sc ld/scripttempl/avrtiny.sc
415--- ld/scripttempl/avrtiny.sc 1970-01-01 05:30:00.000000000 +0530
416+++ ld/scripttempl/avrtiny.sc 2012-12-21 14:14:42.000000000 +0530
417@@ -0,0 +1,250 @@
418+cat <<EOF
419+OUTPUT_FORMAT("${OUTPUT_FORMAT}","${OUTPUT_FORMAT}","${OUTPUT_FORMAT}")
420+OUTPUT_ARCH(${ARCH})
421+
422+MEMORY
423+{
424+ text (rx) : ORIGIN = $TEXT_ORIGIN, LENGTH = $TEXT_LENGTH
425+ data (rw!x) : ORIGIN = $DATA_ORIGIN, LENGTH = $DATA_LENGTH
426+
427+ /* Provide offsets for config, lock and signature to match
428+ production file format. Ignore offsets in datasheet. */
429+
430+ config(rw!x) : ORIGIN = 0x820000, LENGTH = 2
431+ lock (rw!x) : ORIGIN = 0x830000, LENGTH = 2
432+ signature (rw!x) : ORIGIN = 0x840000, LENGTH = 4
433+}
434+
435+SECTIONS
436+{
437+ /* Read-only sections, merged into text segment: */
438+ ${TEXT_DYNAMIC+${DYNAMIC}}
439+ .hash ${RELOCATING-0} : { *(.hash) }
440+ .dynsym ${RELOCATING-0} : { *(.dynsym) }
441+ .dynstr ${RELOCATING-0} : { *(.dynstr) }
442+ .gnu.version ${RELOCATING-0} : { *(.gnu.version) }
443+ .gnu.version_d ${RELOCATING-0} : { *(.gnu.version_d) }
444+ .gnu.version_r ${RELOCATING-0} : { *(.gnu.version_r) }
445+
446+ .rel.init ${RELOCATING-0} : { *(.rel.init) }
447+ .rela.init ${RELOCATING-0} : { *(.rela.init) }
448+ .rel.text ${RELOCATING-0} :
449+ {
450+ *(.rel.text)
451+ ${RELOCATING+*(.rel.text.*)}
452+ ${RELOCATING+*(.rel.gnu.linkonce.t*)}
453+ }
454+ .rela.text ${RELOCATING-0} :
455+ {
456+ *(.rela.text)
457+ ${RELOCATING+*(.rela.text.*)}
458+ ${RELOCATING+*(.rela.gnu.linkonce.t*)}
459+ }
460+ .rel.fini ${RELOCATING-0} : { *(.rel.fini) }
461+ .rela.fini ${RELOCATING-0} : { *(.rela.fini) }
462+ .rel.rodata ${RELOCATING-0} :
463+ {
464+ *(.rel.rodata)
465+ ${RELOCATING+*(.rel.rodata.*)}
466+ ${RELOCATING+*(.rel.gnu.linkonce.r*)}
467+ }
468+ .rela.rodata ${RELOCATING-0} :
469+ {
470+ *(.rela.rodata)
471+ ${RELOCATING+*(.rela.rodata.*)}
472+ ${RELOCATING+*(.rela.gnu.linkonce.r*)}
473+ }
474+ .rel.data ${RELOCATING-0} :
475+ {
476+ *(.rel.data)
477+ ${RELOCATING+*(.rel.data.*)}
478+ ${RELOCATING+*(.rel.gnu.linkonce.d*)}
479+ }
480+ .rela.data ${RELOCATING-0} :
481+ {
482+ *(.rela.data)
483+ ${RELOCATING+*(.rela.data.*)}
484+ ${RELOCATING+*(.rela.gnu.linkonce.d*)}
485+ }
486+ .rel.ctors ${RELOCATING-0} : { *(.rel.ctors) }
487+ .rela.ctors ${RELOCATING-0} : { *(.rela.ctors) }
488+ .rel.dtors ${RELOCATING-0} : { *(.rel.dtors) }
489+ .rela.dtors ${RELOCATING-0} : { *(.rela.dtors) }
490+ .rel.got ${RELOCATING-0} : { *(.rel.got) }
491+ .rela.got ${RELOCATING-0} : { *(.rela.got) }
492+ .rel.bss ${RELOCATING-0} : { *(.rel.bss) }
493+ .rela.bss ${RELOCATING-0} : { *(.rela.bss) }
494+ .rel.plt ${RELOCATING-0} : { *(.rel.plt) }
495+ .rela.plt ${RELOCATING-0} : { *(.rela.plt) }
496+
497+ /* Internal text space or external memory. */
498+ .text ${RELOCATING-0} : ${RELOCATING+ AT (0x0)}
499+ {
500+ *(.vectors)
501+ KEEP(*(.vectors))
502+
503+ /* For data that needs to reside in the lower 64k of progmem. */
504+ *(.progmem.gcc*)
505+ *(.progmem*)
506+ ${RELOCATING+. = ALIGN(2);}
507+
508+ ${CONSTRUCTING+ __trampolines_start = . ; }
509+ /* The jump trampolines for the 16-bit limited relocs will reside here. */
510+ *(.trampolines)
511+ *(.trampolines*)
512+ ${CONSTRUCTING+ __trampolines_end = . ; }
513+
514+ /* For future tablejump instruction arrays for 3 byte pc devices.
515+ We don't relax jump/call instructions within these sections. */
516+ *(.jumptables)
517+ *(.jumptables*)
518+
519+ /* For code that needs to reside in the lower 128k progmem. */
520+ *(.lowtext)
521+ *(.lowtext*)
522+
523+ ${CONSTRUCTING+ __ctors_start = . ; }
524+ ${CONSTRUCTING+ *(.ctors) }
525+ ${CONSTRUCTING+ __ctors_end = . ; }
526+ ${CONSTRUCTING+ __dtors_start = . ; }
527+ ${CONSTRUCTING+ *(.dtors) }
528+ ${CONSTRUCTING+ __dtors_end = . ; }
529+ KEEP(SORT(*)(.ctors))
530+ KEEP(SORT(*)(.dtors))
531+
532+ /* From this point on, we don't bother about wether the insns are
533+ below or above the 16 bits boundary. */
534+ *(.init0) /* Start here after reset. */
535+ KEEP (*(.init0))
536+ *(.init1)
537+ KEEP (*(.init1))
538+ *(.init2) /* Clear __zero_reg__, set up stack pointer. */
539+ KEEP (*(.init2))
540+ *(.init3)
541+ KEEP (*(.init3))
542+ *(.init4) /* Initialize data and BSS. */
543+ KEEP (*(.init4))
544+ *(.init5)
545+ KEEP (*(.init5))
546+ *(.init6) /* C++ constructors. */
547+ KEEP (*(.init6))
548+ *(.init7)
549+ KEEP (*(.init7))
550+ *(.init8)
551+ KEEP (*(.init8))
552+ *(.init9) /* Call main(). */
553+ KEEP (*(.init9))
554+ *(.text)
555+ ${RELOCATING+. = ALIGN(2);}
556+ *(.text.*)
557+ ${RELOCATING+. = ALIGN(2);}
558+ *(.fini9) /* _exit() starts here. */
559+ KEEP (*(.fini9))
560+ *(.fini8)
561+ KEEP (*(.fini8))
562+ *(.fini7)
563+ KEEP (*(.fini7))
564+ *(.fini6) /* C++ destructors. */
565+ KEEP (*(.fini6))
566+ *(.fini5)
567+ KEEP (*(.fini5))
568+ *(.fini4)
569+ KEEP (*(.fini4))
570+ *(.fini3)
571+ KEEP (*(.fini3))
572+ *(.fini2)
573+ KEEP (*(.fini2))
574+ *(.fini1)
575+ KEEP (*(.fini1))
576+ *(.fini0) /* Infinite loop after program termination. */
577+ KEEP (*(.fini0))
578+ ${RELOCATING+ _etext = . ; }
579+ } ${RELOCATING+ > text}
580+
581+ .data ${RELOCATING-0} : ${RELOCATING+AT (ADDR (.text) + SIZEOF (.text))}
582+ {
583+ ${RELOCATING+ PROVIDE (__data_start = .) ; }
584+ *(.data)
585+ KEEP (*(.data))
586+ *(.data*)
587+ *(.rodata) /* We need to include .rodata here if gcc is used */
588+ *(.rodata*) /* with -fdata-sections. */
589+ *(.gnu.linkonce.d*)
590+ ${RELOCATING+. = ALIGN(2);}
591+ ${RELOCATING+ _edata = . ; }
592+ ${RELOCATING+ PROVIDE (__data_end = .) ; }
593+ } ${RELOCATING+ > data}
594+
595+ .bss ${RELOCATING-0} :${RELOCATING+ AT (ADDR (.bss))}
596+ {
597+ ${RELOCATING+ PROVIDE (__bss_start = .) ; }
598+ *(.bss)
599+ *(.bss*)
600+ *(COMMON)
601+ ${RELOCATING+ PROVIDE (__bss_end = .) ; }
602+ } ${RELOCATING+ > data}
603+
604+ ${RELOCATING+ __data_load_start = LOADADDR(.data); }
605+ ${RELOCATING+ __data_load_end = __data_load_start + SIZEOF(.data); }
606+
607+ /* Global data not cleared after reset. */
608+ .noinit ${RELOCATING-0}:
609+ {
610+ ${RELOCATING+ PROVIDE (__noinit_start = .) ; }
611+ *(.noinit*)
612+ ${RELOCATING+ PROVIDE (__noinit_end = .) ; }
613+ ${RELOCATING+ _end = . ; }
614+ ${RELOCATING+ PROVIDE (__heap_start = .) ; }
615+ } ${RELOCATING+ > data}
616+
617+ .lock ${RELOCATING-0}:
618+ {
619+ KEEP(*(.lock*))
620+ } ${RELOCATING+ > lock}
621+
622+ .signature ${RELOCATING-0}:
623+ {
624+ KEEP(*(.signature*))
625+ } ${RELOCATING+ > signature}
626+
627+ .config ${RELOCATING-0}:
628+ {
629+ KEEP(*(.config*))
630+ } ${RELOCATING+ > config}
631+
632+ /* Stabs debugging sections. */
633+ .stab 0 : { *(.stab) }
634+ .stabstr 0 : { *(.stabstr) }
635+ .stab.excl 0 : { *(.stab.excl) }
636+ .stab.exclstr 0 : { *(.stab.exclstr) }
637+ .stab.index 0 : { *(.stab.index) }
638+ .stab.indexstr 0 : { *(.stab.indexstr) }
639+ .comment 0 : { *(.comment) }
640+
641+ /* DWARF debug sections.
642+ Symbols in the DWARF debugging sections are relative to the beginning
643+ of the section so we begin them at 0. */
644+
645+ /* DWARF 1 */
646+ .debug 0 : { *(.debug) }
647+ .line 0 : { *(.line) }
648+
649+ /* GNU DWARF 1 extensions */
650+ .debug_srcinfo 0 : { *(.debug_srcinfo) }
651+ .debug_sfnames 0 : { *(.debug_sfnames) }
652+
653+ /* DWARF 1.1 and DWARF 2 */
654+ .debug_aranges 0 : { *(.debug_aranges) }
655+ .debug_pubnames 0 : { *(.debug_pubnames) }
656+
657+ /* DWARF 2 */
658+ .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
659+ .debug_abbrev 0 : { *(.debug_abbrev) }
660+ .debug_line 0 : { *(.debug_line) }
661+ .debug_frame 0 : { *(.debug_frame) }
662+ .debug_str 0 : { *(.debug_str) }
663+ .debug_loc 0 : { *(.debug_loc) }
664+ .debug_macinfo 0 : { *(.debug_macinfo) }
665+}
666+EOF
667+
668diff -Naurp opcodes/avr-dis.c opcodes/avr-dis.c
669--- opcodes/avr-dis.c 2012-05-17 20:43:24.000000000 +0530
670+++ opcodes/avr-dis.c 2012-12-21 14:15:31.000000000 +0530
671@@ -187,6 +187,16 @@ avr_operand (unsigned int insn, unsigned
672 case 'i':
673 sprintf (buf, "0x%04X", insn2);
674 break;
675+
676+ case 'j':
677+ {
678+ unsigned int val = ((insn & 0xf) | ((insn & 0x600) >> 5)
679+ | ((insn & 0x100) >> 2));
680+ if (val > 0 && !(insn & 0x100))
681+ val |= 0x80;
682+ sprintf (buf, "0x%02x", val);
683+ }
684+ break;
685
686 case 'M':
687 sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
688@@ -330,8 +340,12 @@ print_insn_avr (bfd_vma addr, disassembl
689 for (opcode = avr_opcodes, maskptr = avr_bin_masks;
690 opcode->name;
691 opcode++, maskptr++)
692- if ((insn & *maskptr) == opcode->bin_opcode)
693- break;
694+ {
695+ if ((opcode->isa == AVR_ISA_TINY) && (info->mach != bfd_mach_avrtiny))
696+ continue;
697+ if ((insn & *maskptr) == opcode->bin_opcode)
698+ break;
699+ }
700
701 /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
702 `std b+0,r' as `st b,r' (next entry in the table). */
Cross AVR GNU binary utility development utilities - binutils
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