3 .set UNDEFINED_MODE, 0x1B
5 .set SUPERVISOR_MODE, 0x13
18 ldr pc, undefined_instruction_handler_addr
19 ldr pc, software_interrupt_handler_addr
20 ldr pc, prefetch_abort_handler_addr
21 ldr pc, data_abort_handler_addr
22 ldr pc, endless_loop /* ARM-reserved vector */
23 ldr pc, irq_handler_addr
24 ldr pc, fiq_handler_addr
26 undefined_instruction_handler_addr: .long undefined_instruction_handler
27 software_interrupt_handler_addr: .long software_interrupt_handler
28 prefetch_abort_handler_addr: .long prefetch_abort_handler
29 data_abort_handler_addr: .long data_abort_handler
30 irq_handler_addr: .long irq_handler
31 fiq_handler_addr: .long fiq_handler
36 msr cpsr_c, #UNDEFINED_MODE
37 ldr sp, =__UNDEFINED_SP__
38 msr cpsr_c, #ABORT_MODE
44 msr cpsr_c, #SUPERVISOR_MODE
45 ldr sp, =__SUPERVISOR_SP__
47 # setup a default stack limit (when compiled with "-mapcs-stack-check").
48 # sub sl, sp, #__USER_STACK_SIZE__
50 # relocate .data(rw) section (copy from FLASH to RAM).
53 ldr r2, =__data_start__
63 # clear .bss(rw) section.
66 ldr r1, =__bss_start__
75 # set up arguments to main() and call.