arrayprobe-headers.patch

   1 --- arrayprobe-2.0/configure.ac.orig    2006-01-03 13:58:31.000000000 +0100
   2 +++ arrayprobe-2.0/configure.ac 2007-06-14 19:13:36.361782087 +0200
   3 @@ -16,13 +16,10 @@
   4  AC_HEADER_STDC
   5  AC_CHECK_HEADERS([arpa/inet.h fcntl.h netdb.h netinet/in.h stdlib.h string.h sys/ioctl.h sys/socket.h sys/time.h syslog.h unistd.h])
   6
   7 -dnl Check for compile.h (2.6.x kernels only?
   8 -AC_CHECK_HEADERS(linux/compiler.h)
   9 -
  10  dnl Check for kernel sources
  11  AC_MSG_CHECKING(for kernel sources)
  12  found_kernel_dir=""
  13 -for kernel_dir in /usr/src/linux /usr/src/linux-2.4
  14 +for kernel_dir in .
  15  do
  16    if test -d $kernel_dir/drivers/block ; then
  17      CFLAGS="$CFLAGS -I$kernel_dir/include -I$kernel_dir/drivers/block"
  18 @@ -39,8 +36,7 @@
  19
  20  dnl Check Headers
  21  AC_CHECK_HEADERS(ida_ioctl.h ida_cmd.h cpqarray.h,,
  22 -  AC_MSG_ERROR(You need to have the complete kernel sources.),[[#include <linux/compiler.h>
  23 -  #include <unistd.h>]])
  24 +  AC_MSG_ERROR(You need to have the complete kernel sources.),[[#include <unistd.h>]])
  25
  26  dnl Check version of SmartArray driver
  27  AC_MSG_CHECKING(SmartArray driver version)
  28 @@ -49,7 +45,7 @@
  29
  30  dnl Check for CCISS header file
  31  AC_CHECK_HEADERS(linux/cciss_ioctl.h,,
  32 -  AC_MSG_ERROR(You need to have the CCISS driver in the kernel.),[[#include <linux/compiler.h>]])
  33 +  AC_MSG_ERROR(You need to have the CCISS driver in the kernel.))
  34
  35  # Checks for typedefs, structures, and compiler characteristics.
  36  AC_C_CONST
  37 diff -Nur cpqarrayd-2.2/drivers.orig/block/cpqarray.h cpqarrayd-2.2/drivers/block/cpqarray.h
  38 --- cpqarrayd-2.2/drivers.orig/block/cpqarray.h 1970-01-01 01:00:00.000000000 +0100
  39 +++ cpqarrayd-2.2/drivers/block/cpqarray.h      2005-11-17 16:51:31.000000000 +0100
  40 @@ -0,0 +1,132 @@
  41 +/*
  42 + *    Disk Array driver for Compaq SMART2 Controllers
  43 + *    Copyright 1998 Compaq Computer Corporation
  44 + *
  45 + *    This program is free software; you can redistribute it and/or modify
  46 + *    it under the terms of the GNU General Public License as published by
  47 + *    the Free Software Foundation; either version 2 of the License, or
  48 + *    (at your option) any later version.
  49 + *
  50 + *    This program is distributed in the hope that it will be useful,
  51 + *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  52 + *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  53 + *    NON INFRINGEMENT.  See the GNU General Public License for more details.
  54 + *
  55 + *    You should have received a copy of the GNU General Public License
  56 + *    along with this program; if not, write to the Free Software
  57 + *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  58 + *
  59 + *    Questions/Comments/Bugfixes to arrays@compaq.com
  60 + *
  61 + *    If you want to make changes, improve or add functionality to this
  62 + *    driver, you'll probably need the Compaq Array Controller Interface
  63 + *    Specificiation (Document number ECG086/1198)
  64 + */
  65 +#ifndef CPQARRAY_H
  66 +#define CPQARRAY_H
  67 +
  68 +#ifdef __KERNEL__
  69 +#include <linux/blkdev.h>
  70 +#include <linux/locks.h>
  71 +#include <linux/slab.h>
  72 +#include <linux/proc_fs.h>
  73 +#include <linux/timer.h>
  74 +#endif
  75 +
  76 +#include "ida_cmd.h"
  77 +
  78 +#define IO_OK          0
  79 +#define IO_ERROR       1
  80 +#define NWD            16
  81 +#define NWD_SHIFT      4
  82 +#define IDA_MAX_PART   16
  83 +
  84 +#define IDA_TIMER      (5*HZ)
  85 +#define IDA_TIMEOUT    (10*HZ)
  86 +
  87 +#define MISC_NONFATAL_WARN     0x01
  88 +
  89 +typedef struct {
  90 +       unsigned blk_size;
  91 +       unsigned nr_blks;
  92 +       unsigned cylinders;
  93 +       unsigned heads;
  94 +       unsigned sectors;
  95 +       int usage_count;
  96 +} drv_info_t;
  97 +
  98 +#ifdef __KERNEL__
  99 +
 100 +struct ctlr_info;
 101 +typedef struct ctlr_info ctlr_info_t;
 102 +
 103 +struct access_method {
 104 +       void (*submit_command)(ctlr_info_t *h, cmdlist_t *c);
 105 +       void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
 106 +       unsigned long (*fifo_full)(ctlr_info_t *h);
 107 +       unsigned long (*intr_pending)(ctlr_info_t *h);
 108 +       unsigned long (*command_completed)(ctlr_info_t *h);
 109 +};
 110 +
 111 +struct board_type {
 112 +       __u32   board_id;
 113 +       char    *product_name;
 114 +       struct access_method *access;
 115 +};
 116 +
 117 +struct ctlr_info {
 118 +       int     ctlr;
 119 +       char    devname[8];
 120 +       __u32   log_drv_map;
 121 +       __u32   drv_assign_map;
 122 +       __u32   drv_spare_map;
 123 +       __u32   mp_failed_drv_map;
 124 +
 125 +       char    firm_rev[4];
 126 +       struct pci_dev *pdev;
 127 +       int     ctlr_sig;
 128 +
 129 +       int     log_drives;
 130 +       int     highest_lun;
 131 +       int     phys_drives;
 132 +
 133 +       struct pci_dev *pci_dev;    /* NULL if EISA */
 134 +       __u32   board_id;
 135 +       char    *product_name;
 136 +
 137 +       void *vaddr;
 138 +       unsigned long paddr;
 139 +       unsigned long io_mem_addr;
 140 +       unsigned long io_mem_length;
 141 +       int     intr;
 142 +       int     usage_count;
 143 +       drv_info_t      drv[NWD];
 144 +       struct proc_dir_entry *proc;
 145 +
 146 +       struct access_method access;
 147 +
 148 +       cmdlist_t *reqQ;
 149 +       cmdlist_t *cmpQ;
 150 +       cmdlist_t *cmd_pool;
 151 +       dma_addr_t cmd_pool_dhandle;
 152 +       __u32   *cmd_pool_bits;
 153 +
 154 +       unsigned int Qdepth;
 155 +       unsigned int maxQsinceinit;
 156 +
 157 +       unsigned int nr_requests;
 158 +       unsigned int nr_allocs;
 159 +       unsigned int nr_frees;
 160 +       struct timer_list timer;
 161 +       unsigned int misc_tflags;
 162 +       // Disk structures we need to pass back
 163 +       struct gendisk gendisk;
 164 +       // Index by Minor Numbers
 165 +       struct hd_struct        hd[256];
 166 +       int                     sizes[256];
 167 +       int                     blocksizes[256];
 168 +       int                     hardsizes[256];
 169 +};
 170 +#endif
 171 +
 172 +#endif /* CPQARRAY_H */
 173 diff -Nur cpqarrayd-2.2/drivers.orig/block/ida_cmd.h cpqarrayd-2.2/drivers/block/ida_cmd.h
 174 --- cpqarrayd-2.2/drivers.orig/block/ida_cmd.h  1970-01-01 01:00:00.000000000 +0100
 175 +++ cpqarrayd-2.2/drivers/block/ida_cmd.h       2005-11-17 16:51:31.000000000 +0100
 176 @@ -0,0 +1,351 @@
 177 +/*
 178 + *    Disk Array driver for Compaq SMART2 Controllers
 179 + *    Copyright 1998 Compaq Computer Corporation
 180 + *
 181 + *    This program is free software; you can redistribute it and/or modify
 182 + *    it under the terms of the GNU General Public License as published by
 183 + *    the Free Software Foundation; either version 2 of the License, or
 184 + *    (at your option) any later version.
 185 + *
 186 + *    This program is distributed in the hope that it will be useful,
 187 + *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 188 + *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 189 + *    NON INFRINGEMENT.  See the GNU General Public License for more details.
 190 + *
 191 + *    You should have received a copy of the GNU General Public License
 192 + *    along with this program; if not, write to the Free Software
 193 + *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 194 + *
 195 + *    Questions/Comments/Bugfixes to arrays@compaq.com
 196 + *
 197 + */
 198 +#ifndef ARRAYCMD_H
 199 +#define ARRAYCMD_H
 200 +
 201 +#include <asm/types.h>
 202 +#if 0
 203 +#include <linux/blkdev.h>
 204 +#endif
 205 +
 206 +/* for the Smart Array 42XX cards */
 207 +#define S42XX_REQUEST_PORT_OFFSET      0x40
 208 +#define S42XX_REPLY_INTR_MASK_OFFSET   0x34
 209 +#define S42XX_REPLY_PORT_OFFSET                0x44
 210 +#define S42XX_INTR_STATUS              0x30
 211 +
 212 +#define S42XX_INTR_OFF         0x08
 213 +#define S42XX_INTR_PENDING     0x08
 214 +
 215 +#define COMMAND_FIFO           0x04
 216 +#define COMMAND_COMPLETE_FIFO  0x08
 217 +#define INTR_MASK              0x0C
 218 +#define INTR_STATUS            0x10
 219 +#define INTR_PENDING           0x14
 220 +
 221 +#define FIFO_NOT_EMPTY         0x01
 222 +#define FIFO_NOT_FULL          0x02
 223 +
 224 +#define BIG_PROBLEM            0x40
 225 +#define LOG_NOT_CONF           2
 226 +
 227 +#pragma pack(1)
 228 +typedef struct {
 229 +       __u32   size;
 230 +       __u32   addr;
 231 +} sg_t;
 232 +
 233 +#define RCODE_NONFATAL 0x02
 234 +#define RCODE_FATAL    0x04
 235 +#define RCODE_INVREQ   0x10
 236 +typedef struct {
 237 +       __u16   next;
 238 +       __u8    cmd;
 239 +       __u8    rcode;
 240 +       __u32   blk;
 241 +       __u16   blk_cnt;
 242 +       __u8    sg_cnt;
 243 +       __u8    reserved;
 244 +} rhdr_t;
 245 +
 246 +#define SG_MAX                 32
 247 +typedef struct {
 248 +       rhdr_t  hdr;
 249 +       sg_t    sg[SG_MAX];
 250 +       __u32   bp;
 251 +} rblk_t;
 252 +
 253 +typedef struct {
 254 +       __u8    unit;
 255 +       __u8    prio;
 256 +       __u16   size;
 257 +} chdr_t;
 258 +
 259 +#define CMD_RWREQ      0x00
 260 +#define CMD_IOCTL_PEND 0x01
 261 +
 262 +typedef struct cmdlist {
 263 +       chdr_t  hdr;
 264 +       rblk_t  req;
 265 +       __u32   size;
 266 +       int     retry_cnt;
 267 +       __u32   busaddr;
 268 +       int     ctlr;
 269 +       struct cmdlist *prev;
 270 +       struct cmdlist *next;
 271 +       struct request *rq;
 272 +       struct completion *waiting;
 273 +       int type;
 274 +} cmdlist_t;
 275 +
 276 +#define ID_CTLR                0x11
 277 +typedef struct {
 278 +       __u8    nr_drvs;
 279 +       __u32   cfg_sig;
 280 +       __u8    firm_rev[4];
 281 +       __u8    rom_rev[4];
 282 +       __u8    hw_rev;
 283 +       __u32   bb_rev;
 284 +       __u32   drv_present_map;
 285 +       __u32   ext_drv_map;
 286 +       __u32   board_id;
 287 +       __u8    cfg_error;
 288 +       __u32   non_disk_bits;
 289 +       __u8    bad_ram_addr;
 290 +       __u8    cpu_rev;
 291 +       __u8    pdpi_rev;
 292 +       __u8    epic_rev;
 293 +       __u8    wcxc_rev;
 294 +       __u8    marketing_rev;
 295 +       __u8    ctlr_flags;
 296 +       __u8    host_flags;
 297 +       __u8    expand_dis;
 298 +       __u8    scsi_chips;
 299 +       __u32   max_req_blocks;
 300 +       __u32   ctlr_clock;
 301 +       __u8    drvs_per_bus;
 302 +       __u16   big_drv_present_map[8];
 303 +       __u16   big_ext_drv_map[8];
 304 +       __u16   big_non_disk_map[8];
 305 +       __u16   task_flags;
 306 +       __u8    icl_bus;
 307 +       __u8    red_modes;
 308 +       __u8    cur_red_mode;
 309 +       __u8    red_ctlr_stat;
 310 +       __u8    red_fail_reason;
 311 +       __u8    reserved[403];
 312 +} id_ctlr_t;
 313 +
 314 +typedef struct {
 315 +       __u16   cyl;
 316 +       __u8    heads;
 317 +       __u8    xsig;
 318 +       __u8    psectors;
 319 +       __u16   wpre;
 320 +       __u8    maxecc;
 321 +       __u8    drv_ctrl;
 322 +       __u16   pcyls;
 323 +       __u8    pheads;
 324 +       __u16   landz;
 325 +       __u8    sect_per_track;
 326 +       __u8    cksum;
 327 +} drv_param_t;
 328 +
 329 +#define ID_LOG_DRV     0x10
 330 +typedef struct {
 331 +       __u16   blk_size;
 332 +       __u32   nr_blks;
 333 +       drv_param_t drv;
 334 +       __u8    fault_tol;
 335 +       __u8    reserved;
 336 +       __u8    bios_disable;
 337 +} id_log_drv_t;
 338 +
 339 +#define ID_LOG_DRV_EXT 0x18
 340 +typedef struct {
 341 +       __u32   log_drv_id;
 342 +       __u8    log_drv_label[64];
 343 +       __u8    reserved[418];
 344 +} id_log_drv_ext_t;
 345 +
 346 +#define SENSE_LOG_DRV_STAT     0x12
 347 +typedef struct {
 348 +       __u8    status;
 349 +       __u32   fail_map;
 350 +       __u16   read_err[32];
 351 +       __u16   write_err[32];
 352 +       __u8    drv_err_data[256];
 353 +       __u8    drq_timeout[32];
 354 +       __u32   blks_to_recover;
 355 +       __u8    drv_recovering;
 356 +       __u16   remap_cnt[32];
 357 +       __u32   replace_drv_map;
 358 +       __u32   act_spare_map;
 359 +       __u8    spare_stat;
 360 +       __u8    spare_repl_map[32];
 361 +       __u32   repl_ok_map;
 362 +       __u8    media_exch;
 363 +       __u8    cache_fail;
 364 +       __u8    expn_fail;
 365 +       __u8    unit_flags;
 366 +       __u16   big_fail_map[8];
 367 +       __u16   big_remap_map[128];
 368 +       __u16   big_repl_map[8];
 369 +       __u16   big_act_spare_map[8];
 370 +       __u8    big_spar_repl_map[128];
 371 +       __u16   big_repl_ok_map[8];
 372 +       __u8    big_drv_rebuild;
 373 +       __u8    reserved[36];
 374 +} sense_log_drv_stat_t;
 375 +
 376 +#define START_RECOVER          0x13
 377 +
 378 +#define ID_PHYS_DRV            0x15
 379 +typedef struct {
 380 +       __u8    scsi_bus;
 381 +       __u8    scsi_id;
 382 +       __u16   blk_size;
 383 +       __u32   nr_blks;
 384 +       __u32   rsvd_blks;
 385 +       __u8    drv_model[40];
 386 +       __u8    drv_sn[40];
 387 +       __u8    drv_fw[8];
 388 +       __u8    scsi_iq_bits;
 389 +       __u8    compaq_drv_stmp;
 390 +       __u8    last_fail;
 391 +       __u8    phys_drv_flags;
 392 +       __u8    phys_drv_flags1;
 393 +       __u8    scsi_lun;
 394 +       __u8    phys_drv_flags2;
 395 +       __u8    reserved;
 396 +       __u32   spi_speed_rules;
 397 +       __u8    phys_connector[2];
 398 +       __u8    phys_box_on_bus;
 399 +       __u8    phys_bay_in_box;
 400 +} id_phys_drv_t;
 401 +
 402 +#define BLINK_DRV_LEDS         0x16
 403 +typedef struct {
 404 +       __u32   blink_duration;
 405 +       __u32   reserved;
 406 +       __u8    blink[256];
 407 +       __u8    reserved1[248];
 408 +} blink_drv_leds_t;
 409 +
 410 +#define SENSE_BLINK_LEDS       0x17
 411 +typedef struct {
 412 +       __u32   blink_duration;
 413 +       __u32   btime_elap;
 414 +       __u8    blink[256];
 415 +       __u8    reserved1[248];
 416 +} sense_blink_leds_t;
 417 +
 418 +#define IDA_READ               0x20
 419 +#define IDA_WRITE              0x30
 420 +#define IDA_WRITE_MEDIA                0x31
 421 +#define RESET_TO_DIAG          0x40
 422 +#define DIAG_PASS_THRU         0x41
 423 +
 424 +#define SENSE_CONFIG           0x50
 425 +#define SET_CONFIG             0x51
 426 +typedef struct {
 427 +       __u32   cfg_sig;
 428 +       __u16   compat_port;
 429 +       __u8    data_dist_mode;
 430 +       __u8    surf_an_ctrl;
 431 +       __u16   ctlr_phys_drv;
 432 +       __u16   log_unit_phys_drv;
 433 +       __u16   fault_tol_mode;
 434 +       __u8    phys_drv_param[16];
 435 +       drv_param_t drv;
 436 +       __u32   drv_asgn_map;
 437 +       __u16   dist_factor;
 438 +       __u32   spare_asgn_map;
 439 +       __u8    reserved[6];
 440 +       __u16   os;
 441 +       __u8    ctlr_order;
 442 +       __u8    extra_info;
 443 +       __u32   data_offs;
 444 +       __u8    parity_backedout_write_drvs;
 445 +       __u8    parity_dist_mode;
 446 +       __u8    parity_shift_fact;
 447 +       __u8    bios_disable_flag;
 448 +       __u32   blks_on_vol;
 449 +       __u32   blks_per_drv;
 450 +       __u8    scratch[16];
 451 +       __u16   big_drv_map[8];
 452 +       __u16   big_spare_map[8];
 453 +       __u8    ss_source_vol;
 454 +       __u8    mix_drv_cap_range;
 455 +       struct {
 456 +               __u16   big_drv_map[8];
 457 +               __u32   blks_per_drv;
 458 +               __u16   fault_tol_mode;
 459 +               __u16   dist_factor;
 460 +       } MDC_range[4];
 461 +       __u8    reserved1[248];
 462 +} config_t;
 463 +
 464 +#define BYPASS_VOL_STATE       0x52
 465 +#define SS_CREATE_VOL          0x53
 466 +#define CHANGE_CONFIG          0x54
 467 +#define SENSE_ORIG_CONF                0x55
 468 +#define REORDER_LOG_DRV                0x56
 469 +typedef struct {
 470 +       __u8    old_units[32];
 471 +} reorder_log_drv_t;
 472 +
 473 +#define LABEL_LOG_DRV          0x57
 474 +typedef struct {
 475 +       __u8    log_drv_label[64];
 476 +} label_log_drv_t;
 477 +
 478 +#define SS_TO_VOL              0x58
 479 +
 480 +#define SET_SURF_DELAY         0x60
 481 +typedef struct {
 482 +       __u16   delay;
 483 +       __u8    reserved[510];
 484 +} surf_delay_t;
 485 +
 486 +#define SET_OVERHEAT_DELAY     0x61
 487 +typedef struct {
 488 +       __u16   delay;
 489 +} overhead_delay_t;
 490 +
 491 +#define SET_MP_DELAY
 492 +typedef struct {
 493 +       __u16   delay;
 494 +       __u8    reserved[510];
 495 +} mp_delay_t;
 496 +
 497 +#define SENSE_SURF_STATUS      0x70
 498 +
 499 +#define PASSTHRU_A     0x91
 500 +typedef struct {
 501 +       __u8    target;
 502 +       __u8    bus;
 503 +       __u8    lun;
 504 +       __u32   timeout;
 505 +       __u32   flags;
 506 +       __u8    status;
 507 +       __u8    error;
 508 +       __u8    cdb_len;
 509 +       __u8    sense_error;
 510 +       __u8    sense_key;
 511 +       __u32   sense_info;
 512 +       __u8    sense_code;
 513 +       __u8    sense_qual;
 514 +       __u32   residual;
 515 +       __u8    reserved[4];
 516 +       __u8    cdb[12];
 517 +} scsi_param_t;
 518 +
 519 +#define RESUME_BACKGROUND_ACTIVITY     0x99
 520 +#define SENSE_CONTROLLER_PERFORMANCE   0xa8
 521 +#define FLUSH_CACHE                    0xc2
 522 +#define COLLECT_BUFFER                 0xd2
 523 +#define READ_FLASH_ROM                 0xf6
 524 +#define WRITE_FLASH_ROM                        0xf7
 525 +#pragma pack()
 526 +
 527 +#endif /* ARRAYCMD_H */
 528 diff -Nur cpqarrayd-2.2/drivers.orig/block/ida_ioctl.h cpqarrayd-2.2/drivers/block/ida_ioctl.h
 529 --- cpqarrayd-2.2/drivers.orig/block/ida_ioctl.h        1970-01-01 01:00:00.000000000 +0100
 530 +++ cpqarrayd-2.2/drivers/block/ida_ioctl.h     2005-11-17 16:51:31.000000000 +0100
 531 @@ -0,0 +1,121 @@
 532 +/*
 533 + *    Disk Array driver for Compaq SMART2 Controllers
 534 + *    Copyright 1998 Compaq Computer Corporation
 535 + *
 536 + *    This program is free software; you can redistribute it and/or modify
 537 + *    it under the terms of the GNU General Public License as published by
 538 + *    the Free Software Foundation; either version 2 of the License, or
 539 + *    (at your option) any later version.
 540 + *
 541 + *    This program is distributed in the hope that it will be useful,
 542 + *    but WITHOUT ANY WARRANTY; without even the implied warranty of
 543 + *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 544 + *    NON INFRINGEMENT.  See the GNU General Public License for more details.
 545 + *
 546 + *    You should have received a copy of the GNU General Public License
 547 + *    along with this program; if not, write to the Free Software
 548 + *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 549 + *
 550 + *    Questions/Comments/Bugfixes to arrays@compaq.com
 551 + *
 552 + */
 553 +#ifndef IDA_IOCTL_H
 554 +#define IDA_IOCTL_H
 555 +
 556 +#include "ida_cmd.h"
 557 +#include "cpqarray.h"
 558 +
 559 +#define IDAGETDRVINFO          0x27272828
 560 +#define IDAPASSTHRU            0x28282929
 561 +#define IDAGETCTLRSIG          0x29293030
 562 +#define IDAREVALIDATEVOLS      0x30303131
 563 +#define IDADRIVERVERSION       0x31313232
 564 +#define IDAGETPCIINFO          0x32323333
 565 +#define IDADEREGDISK           0x33333434
 566 +#define IDAREGNEWDISK          0x34343535
 567 +#define IDAGETLOGINFO          0x35353636
 568 +#define IDABIGPASSTHRU          0x36363535
 569 +
 570 +typedef struct _ida_pci_info_struct
 571 +{
 572 +       unsigned char   bus;
 573 +       unsigned char   dev_fn;
 574 +       __u32           board_id;
 575 +} ida_pci_info_struct;
 576 +
 577 +typedef struct _idaLogvolInfo_struct{
 578 +int            LogVolID;
 579 +int            num_opens;  /* number of opens on the logical volume */
 580 +int            num_parts;  /* number of partitions configured on logvol */
 581 +} idaLogvolInfo_struct;
 582 +
 583 +/*
 584 + * Normally, the ioctl determines the logical unit for this command by
 585 + * the major,minor number of the fd passed to ioctl.  If you need to send
 586 + * a command to a different/nonexistant unit (such as during config), you
 587 + * can override the normal behavior by setting the unit valid bit. (Normally,
 588 + * it should be zero) The controller the command is sent to is still
 589 + * determined by the major number of the open device.
 590 + */
 591 +
 592 +#define UNITVALID      0x80
 593 +typedef struct {
 594 +       __u8    cmd;
 595 +       __u8    rcode;
 596 +       __u8    unit;
 597 +       __u32   blk;
 598 +       __u16   blk_cnt;
 599 +
 600 +/* currently, sg_cnt is assumed to be 1: only the 0th element of sg is used */
 601 +       struct {
 602 +               void    *addr;
 603 +               size_t  size;
 604 +       } sg[SG_MAX];
 605 +       int     sg_cnt;
 606 +
 607 +       union ctlr_cmds {
 608 +               drv_info_t              drv;
 609 +               unsigned char           buf[1024];
 610 +
 611 +               id_ctlr_t               id_ctlr;
 612 +               drv_param_t             drv_param;
 613 +               id_log_drv_t            id_log_drv;
 614 +               id_log_drv_ext_t        id_log_drv_ext;
 615 +               sense_log_drv_stat_t    sense_log_drv_stat;
 616 +               id_phys_drv_t           id_phys_drv;
 617 +               blink_drv_leds_t        blink_drv_leds;
 618 +               sense_blink_leds_t      sense_blink_leds;
 619 +               config_t                config;
 620 +               reorder_log_drv_t       reorder_log_drv;
 621 +               label_log_drv_t         label_log_drv;
 622 +               surf_delay_t            surf_delay;
 623 +               overhead_delay_t        overhead_delay;
 624 +               mp_delay_t              mp_delay;
 625 +               scsi_param_t            scsi_param;
 626 +       } c;
 627 +} ida_ioctl_t;
 628 +
 629 +#define IDA_MAX_KMALLOC_SIZE 128000
 630 +
 631 +/* transfer type of the commands */
 632 +#define IDA_XFER_NONE  0x00
 633 +#define IDA_XFER_READ  0x01
 634 +#define IDA_XFER_WRITE 0x02
 635 +#define IDA_XFER_BOTH  0x03
 636 +
 637 +typedef struct {
 638 +       __u8    cmd;
 639 +       __u8    rcode;
 640 +       __u8    unit;
 641 +       __u32   blk;
 642 +       __u16   blk_cnt;
 643 +
 644 +       __u8    xfer_type;
 645 +       __u8    *buff;
 646 +       size_t  buff_size;
 647 +       __u32   buff_malloc_size;
 648 +       scsi_param_t *scsi_param; /* used only for PASSTHRU_A */
 649 +
 650 +} ida_big_ioctl_t;
 651 +
 652 +#endif /* IDA_IOCTL_H */
 653 --- arrayprobe-2.0/probe.c.orig 2006-01-03 14:11:17.000000000 +0100
 654 +++ arrayprobe-2.0/probe.c      2007-06-14 19:17:32.393571925 +0200
 655 @@ -33,7 +33,6 @@
 656  #include <getopt.h>
 657  #include <errno.h>
 658
 659 -#include <linux/compiler.h>
 660  #include <linux/cciss_ioctl.h>
 661
 662  #include <ida_ioctl.h>